release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-omap2/id.c

   1 /*
   2  * linux/arch/arm/mach-omap2/id.c
   3  *
   4  * OMAP2 CPU identification code
   5  *
   6  * Copyright (C) 2005 Nokia Corporation
   7  * Written by Tony Lindgren <tony@atomide.com>
   8  *
   9  * Copyright (C) 2009 Texas Instruments
  10  * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
  11  *
  12  * This program is free software; you can redistribute it and/or modify
  13  * it under the terms of the GNU General Public License version 2 as
  14  * published by the Free Software Foundation.
  15  */
  16
  17 #include <linux/module.h>
  18 #include <linux/kernel.h>
  19 #include <linux/init.h>
  20 #include <linux/io.h>
  21
  22 #include <asm/cputype.h>
  23
  24 #include <plat/common.h>
  25 #include <plat/control.h>
  26 #include <plat/cpu.h>
  27
  28 #include <mach/id.h>
  29
  30 static struct omap_chip_id omap_chip;
  31 static unsigned int omap_revision;
  32
  33 u32 omap3_features;
  34
  35 unsigned int omap_rev(void)
  36 {
  37         return omap_revision;
  38 }
  39 EXPORT_SYMBOL(omap_rev);
  40
  41 /**
  42  * omap_chip_is - test whether currently running OMAP matches a chip type
  43  * @oc: omap_chip_t to test against
  44  *
  45  * Test whether the currently-running OMAP chip matches the supplied
  46  * chip type 'oc'.  Returns 1 upon a match; 0 upon failure.
  47  */
  48 int omap_chip_is(struct omap_chip_id oci)
  49 {
  50         return (oci.oc & omap_chip.oc) ? 1 : 0;
  51 }
  52 EXPORT_SYMBOL(omap_chip_is);
  53
  54 int omap_type(void)
  55 {
  56         u32 val = 0;
  57
  58         if (cpu_is_omap24xx()) {
  59                 val = omap_ctrl_readl(OMAP24XX_CONTROL_STATUS);
  60         } else if (cpu_is_omap34xx()) {
  61                 val = omap_ctrl_readl(OMAP343X_CONTROL_STATUS);
  62         } else if (cpu_is_omap44xx()) {
  63                 val = omap_ctrl_readl(OMAP44XX_CONTROL_STATUS);
  64         } else {
  65                 pr_err("Cannot detect omap type!\n");
  66                 goto out;
  67         }
  68
  69         val &= OMAP2_DEVICETYPE_MASK;
  70         val >>= 8;
  71
  72 out:
  73         return val;
  74 }
  75 EXPORT_SYMBOL(omap_type);
  76
  77
  78 /*----------------------------------------------------------------------------*/
  79
  80 #define OMAP_TAP_IDCODE         0x0204
  81 #define OMAP_TAP_DIE_ID_0       0x0218
  82 #define OMAP_TAP_DIE_ID_1       0x021C
  83 #define OMAP_TAP_DIE_ID_2       0x0220
  84 #define OMAP_TAP_DIE_ID_3       0x0224
  85
  86 #define read_tap_reg(reg)       __raw_readl(tap_base  + (reg))
  87
  88 struct omap_id {
  89         u16     hawkeye;        /* Silicon type (Hawkeye id) */
  90         u8      dev;            /* Device type from production_id reg */
  91         u32     type;           /* Combined type id copied to omap_revision */
  92 };
  93
  94 /* Register values to detect the OMAP version */
  95 static struct omap_id omap_ids[] __initdata = {
  96         { .hawkeye = 0xb5d9, .dev = 0x0, .type = 0x24200024 },
  97         { .hawkeye = 0xb5d9, .dev = 0x1, .type = 0x24201024 },
  98         { .hawkeye = 0xb5d9, .dev = 0x2, .type = 0x24202024 },
  99         { .hawkeye = 0xb5d9, .dev = 0x4, .type = 0x24220024 },
 100         { .hawkeye = 0xb5d9, .dev = 0x8, .type = 0x24230024 },
 101         { .hawkeye = 0xb68a, .dev = 0x0, .type = 0x24300024 },
 102 };
 103
 104 static void __iomem *tap_base;
 105 static u16 tap_prod_id;
 106
 107 void omap_get_die_id(struct omap_die_id *odi)
 108 {
 109         odi->id_0 = read_tap_reg(OMAP_TAP_DIE_ID_0);
 110         odi->id_1 = read_tap_reg(OMAP_TAP_DIE_ID_1);
 111         odi->id_2 = read_tap_reg(OMAP_TAP_DIE_ID_2);
 112         odi->id_3 = read_tap_reg(OMAP_TAP_DIE_ID_3);
 113 }
 114
 115 static void __init omap24xx_check_revision(void)
 116 {
 117         int i, j;
 118         u32 idcode, prod_id;
 119         u16 hawkeye;
 120         u8  dev_type, rev;
 121         struct omap_die_id odi;
 122
 123         idcode = read_tap_reg(OMAP_TAP_IDCODE);
 124         prod_id = read_tap_reg(tap_prod_id);
 125         hawkeye = (idcode >> 12) & 0xffff;
 126         rev = (idcode >> 28) & 0x0f;
 127         dev_type = (prod_id >> 16) & 0x0f;
 128         omap_get_die_id(&odi);
 129
 130         pr_debug("OMAP_TAP_IDCODE 0x%08x REV %i HAWKEYE 0x%04x MANF %03x\n",
 131                  idcode, rev, hawkeye, (idcode >> 1) & 0x7ff);
 132         pr_debug("OMAP_TAP_DIE_ID_0: 0x%08x\n", odi.id_0);
 133         pr_debug("OMAP_TAP_DIE_ID_1: 0x%08x DEV_REV: %i\n",
 134                  odi.id_1, (odi.id_1 >> 28) & 0xf);
 135         pr_debug("OMAP_TAP_DIE_ID_2: 0x%08x\n", odi.id_2);
 136         pr_debug("OMAP_TAP_DIE_ID_3: 0x%08x\n", odi.id_3);
 137         pr_debug("OMAP_TAP_PROD_ID_0: 0x%08x DEV_TYPE: %i\n",
 138                  prod_id, dev_type);
 139
 140         /* Check hawkeye ids */
 141         for (i = 0; i < ARRAY_SIZE(omap_ids); i++) {
 142                 if (hawkeye == omap_ids[i].hawkeye)
 143                         break;
 144         }
 145
 146         if (i == ARRAY_SIZE(omap_ids)) {
 147                 printk(KERN_ERR "Unknown OMAP CPU id\n");
 148                 return;
 149         }
 150
 151         for (j = i; j < ARRAY_SIZE(omap_ids); j++) {
 152                 if (dev_type == omap_ids[j].dev)
 153                         break;
 154         }
 155
 156         if (j == ARRAY_SIZE(omap_ids)) {
 157                 printk(KERN_ERR "Unknown OMAP device type. "
 158                                 "Handling it as OMAP%04x\n",
 159                                 omap_ids[i].type >> 16);
 160                 j = i;
 161         }
 162
 163         pr_info("OMAP%04x", omap_rev() >> 16);
 164         if ((omap_rev() >> 8) & 0x0f)
 165                 pr_info("ES%x", (omap_rev() >> 12) & 0xf);
 166         pr_info("\n");
 167 }
 168
 169 #define OMAP3_CHECK_FEATURE(status,feat)                                \
 170         if (((status & OMAP3_ ##feat## _MASK)                           \
 171                 >> OMAP3_ ##feat## _SHIFT) != FEAT_ ##feat## _NONE) {   \
 172                 omap3_features |= OMAP3_HAS_ ##feat;                    \
 173         }
 174
 175 static void __init omap3_check_features(void)
 176 {
 177         u32 status;
 178
 179         omap3_features = 0;
 180
 181         status = omap_ctrl_readl(OMAP3_CONTROL_OMAP_STATUS);
 182
 183         OMAP3_CHECK_FEATURE(status, L2CACHE);
 184         OMAP3_CHECK_FEATURE(status, IVA);
 185         OMAP3_CHECK_FEATURE(status, SGX);
 186         OMAP3_CHECK_FEATURE(status, NEON);
 187         OMAP3_CHECK_FEATURE(status, ISP);
 188         if (cpu_is_omap3630())
 189                 omap3_features |= OMAP3_HAS_192MHZ_CLK;
 190         if (!cpu_is_omap3505() && !cpu_is_omap3517())
 191                 omap3_features |= OMAP3_HAS_IO_WAKEUP;
 192
 193         /*
 194          * TODO: Get additional info (where applicable)
 195          *       e.g. Size of L2 cache.
 196          */
 197 }
 198
 199 static void __init omap3_check_revision(void)
 200 {
 201         u32 cpuid, idcode;
 202         u16 hawkeye;
 203         u8 rev;
 204
 205         omap_chip.oc = CHIP_IS_OMAP3430;
 206
 207         /*
 208          * We cannot access revision registers on ES1.0.
 209          * If the processor type is Cortex-A8 and the revision is 0x0
 210          * it means its Cortex r0p0 which is 3430 ES1.0.
 211          */
 212         cpuid = read_cpuid(CPUID_ID);
 213         if ((((cpuid >> 4) & 0xfff) == 0xc08) && ((cpuid & 0xf) == 0x0)) {
 214                 omap_revision = OMAP3430_REV_ES1_0;
 215                 omap_chip.oc |= CHIP_IS_OMAP3430ES1;
 216                 return;
 217         }
 218
 219         /*
 220          * Detection for 34xx ES2.0 and above can be done with just
 221          * hawkeye and rev. See TRM 1.5.2 Device Identification.
 222          * Note that rev does not map directly to our defined processor
 223          * revision numbers as ES1.0 uses value 0.
 224          */
 225         idcode = read_tap_reg(OMAP_TAP_IDCODE);
 226         hawkeye = (idcode >> 12) & 0xffff;
 227         rev = (idcode >> 28) & 0xff;
 228
 229         switch (hawkeye) {
 230         case 0xb7ae:
 231                 /* Handle 34xx/35xx devices */
 232                 switch (rev) {
 233                 case 0: /* Take care of early samples */
 234                 case 1:
 235                         omap_revision = OMAP3430_REV_ES2_0;
 236                         omap_chip.oc |= CHIP_IS_OMAP3430ES2;
 237                         break;
 238                 case 2:
 239                         omap_revision = OMAP3430_REV_ES2_1;
 240                         omap_chip.oc |= CHIP_IS_OMAP3430ES2;
 241                         break;
 242                 case 3:
 243                         omap_revision = OMAP3430_REV_ES3_0;
 244                         omap_chip.oc |= CHIP_IS_OMAP3430ES3_0;
 245                         break;
 246                 case 4:
 247                         omap_revision = OMAP3430_REV_ES3_1;
 248                         omap_chip.oc |= CHIP_IS_OMAP3430ES3_1;
 249                         break;
 250                 case 7:
 251                 /* FALLTHROUGH */
 252                 default:
 253                         /* Use the latest known revision as default */
 254                         omap_revision = OMAP3430_REV_ES3_1_2;
 255
 256                         /* REVISIT: Add CHIP_IS_OMAP3430ES3_1_2? */
 257                         omap_chip.oc |= CHIP_IS_OMAP3430ES3_1;
 258                 }
 259                 break;
 260         case 0xb868:
 261                 /* Handle OMAP35xx/AM35xx devices
 262                  *
 263                  * Set the device to be OMAP3505 here. Actual device
 264                  * is identified later based on the features.
 265                  *
 266                  * REVISIT: AM3505/AM3517 should have their own CHIP_IS
 267                  */
 268                 omap_revision = OMAP3505_REV(rev);
 269                 omap_chip.oc |= CHIP_IS_OMAP3430ES3_1;
 270                 break;
 271         case 0xb891:
 272                 /* Handle 36xx devices */
 273                 omap_chip.oc |= CHIP_IS_OMAP3630ES1;
 274
 275                 switch(rev) {
 276                 case 0: /* Take care of early samples */
 277                         omap_revision = OMAP3630_REV_ES1_0;
 278                         break;
 279                 case 1:
 280                         omap_revision = OMAP3630_REV_ES1_1;
 281                         omap_chip.oc |= CHIP_IS_OMAP3630ES1_1;
 282                         break;
 283                 case 2:
 284                 default:
 285                         omap_revision =  OMAP3630_REV_ES1_2;
 286                         omap_chip.oc |= CHIP_IS_OMAP3630ES1_2;
 287                 }
 288                 break;
 289         default:
 290                 /* Unknown default to latest silicon rev as default*/
 291                 omap_revision =  OMAP3630_REV_ES1_2;
 292                 omap_chip.oc |= CHIP_IS_OMAP3630ES1_2;
 293         }
 294 }
 295
 296 static void __init omap4_check_revision(void)
 297 {
 298         u32 idcode;
 299         u16 hawkeye;
 300         u8 rev;
 301         char *rev_name = "ES1.0";
 302
 303         /*
 304          * The IC rev detection is done with hawkeye and rev.
 305          * Note that rev does not map directly to defined processor
 306          * revision numbers as ES1.0 uses value 0.
 307          */
 308         idcode = read_tap_reg(OMAP_TAP_IDCODE);
 309         hawkeye = (idcode >> 12) & 0xffff;
 310         rev = (idcode >> 28) & 0xff;
 311
 312         if ((hawkeye == 0xb852) && (rev == 0x0)) {
 313                 omap_revision = OMAP4430_REV_ES1_0;
 314                 omap_chip.oc |= CHIP_IS_OMAP4430ES1;
 315                 pr_info("OMAP%04x %s\n", omap_rev() >> 16, rev_name);
 316                 return;
 317         }
 318
 319         pr_err("Unknown OMAP4 CPU id\n");
 320 }
 321
 322 #define OMAP3_SHOW_FEATURE(feat)                \
 323         if (omap3_has_ ##feat())                \
 324                 printk(#feat" ");
 325
 326 static void __init omap3_cpuinfo(void)
 327 {
 328         u8 rev = GET_OMAP_REVISION();
 329         char cpu_name[16], cpu_rev[16];
 330
 331         /* OMAP3430 and OMAP3530 are assumed to be same.
 332          *
 333          * OMAP3525, OMAP3515 and OMAP3503 can be detected only based
 334          * on available features. Upon detection, update the CPU id
 335          * and CPU class bits.
 336          */
 337         if (cpu_is_omap3630()) {
 338                 strcpy(cpu_name, "OMAP3630");
 339         } else if (cpu_is_omap3505()) {
 340                 /*
 341                  * AM35xx devices
 342                  */
 343                 if (omap3_has_sgx()) {
 344                         omap_revision = OMAP3517_REV(rev);
 345                         strcpy(cpu_name, "AM3517");
 346                 } else {
 347                         /* Already set in omap3_check_revision() */
 348                         strcpy(cpu_name, "AM3505");
 349                 }
 350         } else if (omap3_has_iva() && omap3_has_sgx()) {
 351                 /* OMAP3430, OMAP3525, OMAP3515, OMAP3503 devices */
 352                 strcpy(cpu_name, "OMAP3430/3530");
 353         } else if (omap3_has_iva()) {
 354                 omap_revision = OMAP3525_REV(rev);
 355                 strcpy(cpu_name, "OMAP3525");
 356         } else if (omap3_has_sgx()) {
 357                 omap_revision = OMAP3515_REV(rev);
 358                 strcpy(cpu_name, "OMAP3515");
 359         } else {
 360                 omap_revision = OMAP3503_REV(rev);
 361                 strcpy(cpu_name, "OMAP3503");
 362         }
 363
 364         switch (rev) {
 365         case OMAP_REVBITS_00:
 366                 strcpy(cpu_rev, "1.0");
 367                 break;
 368         case OMAP_REVBITS_01:
 369                 strcpy(cpu_rev, "1.1");
 370                 break;
 371         case OMAP_REVBITS_02:
 372                 strcpy(cpu_rev, "1.2");
 373                 break;
 374         case OMAP_REVBITS_10:
 375                 strcpy(cpu_rev, "2.0");
 376                 break;
 377         case OMAP_REVBITS_20:
 378                 strcpy(cpu_rev, "2.1");
 379                 break;
 380         case OMAP_REVBITS_30:
 381                 strcpy(cpu_rev, "3.0");
 382                 break;
 383         case OMAP_REVBITS_40:
 384         /* FALLTHROUGH */
 385         default:
 386                 /* Use the latest known revision as default */
 387                 strcpy(cpu_rev, "3.1");
 388         }
 389
 390         /* Print verbose information */
 391         pr_info("%s ES%s (", cpu_name, cpu_rev);
 392
 393         OMAP3_SHOW_FEATURE(l2cache);
 394         OMAP3_SHOW_FEATURE(iva);
 395         OMAP3_SHOW_FEATURE(sgx);
 396         OMAP3_SHOW_FEATURE(neon);
 397         OMAP3_SHOW_FEATURE(isp);
 398         OMAP3_SHOW_FEATURE(192mhz_clk);
 399
 400         printk(")\n");
 401 }
 402
 403 /*
 404  * Try to detect the exact revision of the omap we're running on
 405  */
 406 void __init omap2_check_revision(void)
 407 {
 408         /*
 409          * At this point we have an idea about the processor revision set
 410          * earlier with omap2_set_globals_tap().
 411          */
 412         if (cpu_is_omap24xx()) {
 413                 omap24xx_check_revision();
 414         } else if (cpu_is_omap34xx()) {
 415                 omap3_check_revision();
 416                 omap3_check_features();
 417                 omap3_cpuinfo();
 418                 return;
 419         } else if (cpu_is_omap44xx()) {
 420                 omap4_check_revision();
 421                 return;
 422         } else {
 423                 pr_err("OMAP revision unknown, please fix!\n");
 424         }
 425
 426         /*
 427          * OK, now we know the exact revision. Initialize omap_chip bits
 428          * for powerdowmain and clockdomain code.
 429          */
 430         if (cpu_is_omap243x()) {
 431                 /* Currently only supports 2430ES2.1 and 2430-all */
 432                 omap_chip.oc |= CHIP_IS_OMAP2430;
 433                 return;
 434         } else if (cpu_is_omap242x()) {
 435                 /* Currently only supports 2420ES2.1.1 and 2420-all */
 436                 omap_chip.oc |= CHIP_IS_OMAP2420;
 437                 return;
 438         }
 439
 440         pr_err("Uninitialized omap_chip, please fix!\n");
 441 }
 442
 443 /*
 444  * Set up things for map_io and processor detection later on. Gets called
 445  * pretty much first thing from board init. For multi-omap, this gets
 446  * cpu_is_omapxxxx() working accurately enough for map_io. Then we'll try to
 447  * detect the exact revision later on in omap2_detect_revision() once map_io
 448  * is done.
 449  */
 450 void __init omap2_set_globals_tap(struct omap_globals *omap2_globals)
 451 {
 452         omap_revision = omap2_globals->class;
 453         tap_base = omap2_globals->tap;
 454
 455         if (cpu_is_omap34xx())
 456                 tap_prod_id = 0x0210;
 457         else
 458                 tap_prod_id = 0x0208;
 459 }