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[tomato.git] / release / src-rt-6.x.4708 / linux / linux-2.6.36 / arch / arm / mach-davinci / board-da830-evm.c
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1 /*
2 * TI DA830/OMAP L137 EVM board
4 * Author: Mark A. Greer <mgreer@mvista.com>
5 * Derived from: arch/arm/mach-davinci/board-dm644x-evm.c
7 * 2007, 2009 (c) MontaVista Software, Inc. This file is licensed under
8 * the terms of the GNU General Public License version 2. This program
9 * is licensed "as is" without any warranty of any kind, whether express
10 * or implied.
12 #include <linux/kernel.h>
13 #include <linux/init.h>
14 #include <linux/console.h>
15 #include <linux/interrupt.h>
16 #include <linux/gpio.h>
17 #include <linux/platform_device.h>
18 #include <linux/i2c.h>
19 #include <linux/i2c/pcf857x.h>
20 #include <linux/i2c/at24.h>
21 #include <linux/mtd/mtd.h>
22 #include <linux/mtd/partitions.h>
24 #include <asm/mach-types.h>
25 #include <asm/mach/arch.h>
27 #include <mach/cp_intc.h>
28 #include <mach/mux.h>
29 #include <mach/nand.h>
30 #include <mach/da8xx.h>
31 #include <mach/usb.h>
33 #define DA830_EVM_PHY_MASK 0x0
34 #define DA830_EVM_MDIO_FREQUENCY 2200000 /* PHY bus frequency */
37 * USB1 VBUS is controlled by GPIO1[15], over-current is reported on GPIO2[4].
39 #define ON_BD_USB_DRV GPIO_TO_PIN(1, 15)
40 #define ON_BD_USB_OVC GPIO_TO_PIN(2, 4)
42 static const short da830_evm_usb11_pins[] = {
43 DA830_GPIO1_15, DA830_GPIO2_4,
47 static da8xx_ocic_handler_t da830_evm_usb_ocic_handler;
49 static int da830_evm_usb_set_power(unsigned port, int on)
51 gpio_set_value(ON_BD_USB_DRV, on);
52 return 0;
55 static int da830_evm_usb_get_power(unsigned port)
57 return gpio_get_value(ON_BD_USB_DRV);
60 static int da830_evm_usb_get_oci(unsigned port)
62 return !gpio_get_value(ON_BD_USB_OVC);
65 static irqreturn_t da830_evm_usb_ocic_irq(int, void *);
67 static int da830_evm_usb_ocic_notify(da8xx_ocic_handler_t handler)
69 int irq = gpio_to_irq(ON_BD_USB_OVC);
70 int error = 0;
72 if (handler != NULL) {
73 da830_evm_usb_ocic_handler = handler;
75 error = request_irq(irq, da830_evm_usb_ocic_irq, IRQF_DISABLED |
76 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
77 "OHCI over-current indicator", NULL);
78 if (error)
79 printk(KERN_ERR "%s: could not request IRQ to watch "
80 "over-current indicator changes\n", __func__);
81 } else
82 free_irq(irq, NULL);
84 return error;
87 static struct da8xx_ohci_root_hub da830_evm_usb11_pdata = {
88 .set_power = da830_evm_usb_set_power,
89 .get_power = da830_evm_usb_get_power,
90 .get_oci = da830_evm_usb_get_oci,
91 .ocic_notify = da830_evm_usb_ocic_notify,
93 /* TPS2065 switch @ 5V */
94 .potpgt = (3 + 1) / 2, /* 3 ms max */
97 static irqreturn_t da830_evm_usb_ocic_irq(int irq, void *dev_id)
99 da830_evm_usb_ocic_handler(&da830_evm_usb11_pdata, 1);
100 return IRQ_HANDLED;
103 static __init void da830_evm_usb_init(void)
105 u32 cfgchip2;
106 int ret;
109 * Set up USB clock/mode in the CFGCHIP2 register.
110 * FYI: CFGCHIP2 is 0x0000ef00 initially.
112 cfgchip2 = __raw_readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));
114 /* USB2.0 PHY reference clock is 24 MHz */
115 cfgchip2 &= ~CFGCHIP2_REFFREQ;
116 cfgchip2 |= CFGCHIP2_REFFREQ_24MHZ;
119 * Select internal reference clock for USB 2.0 PHY
120 * and use it as a clock source for USB 1.1 PHY
121 * (this is the default setting anyway).
123 cfgchip2 &= ~CFGCHIP2_USB1PHYCLKMUX;
124 cfgchip2 |= CFGCHIP2_USB2PHYCLKMUX;
127 * We have to override VBUS/ID signals when MUSB is configured into the
128 * host-only mode -- ID pin will float if no cable is connected, so the
129 * controller won't be able to drive VBUS thinking that it's a B-device.
130 * Otherwise, we want to use the OTG mode and enable VBUS comparators.
132 cfgchip2 &= ~CFGCHIP2_OTGMODE;
133 #ifdef CONFIG_USB_MUSB_HOST
134 cfgchip2 |= CFGCHIP2_FORCE_HOST;
135 #else
136 cfgchip2 |= CFGCHIP2_SESENDEN | CFGCHIP2_VBDTCTEN;
137 #endif
139 __raw_writel(cfgchip2, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));
141 /* USB_REFCLKIN is not used. */
142 ret = davinci_cfg_reg(DA830_USB0_DRVVBUS);
143 if (ret)
144 pr_warning("%s: USB 2.0 PinMux setup failed: %d\n",
145 __func__, ret);
146 else {
148 * TPS2065 switch @ 5V supplies 1 A (sustains 1.5 A),
149 * with the power on to power good time of 3 ms.
151 ret = da8xx_register_usb20(1000, 3);
152 if (ret)
153 pr_warning("%s: USB 2.0 registration failed: %d\n",
154 __func__, ret);
157 ret = davinci_cfg_reg_list(da830_evm_usb11_pins);
158 if (ret) {
159 pr_warning("%s: USB 1.1 PinMux setup failed: %d\n",
160 __func__, ret);
161 return;
164 ret = gpio_request(ON_BD_USB_DRV, "ON_BD_USB_DRV");
165 if (ret) {
166 printk(KERN_ERR "%s: failed to request GPIO for USB 1.1 port "
167 "power control: %d\n", __func__, ret);
168 return;
170 gpio_direction_output(ON_BD_USB_DRV, 0);
172 ret = gpio_request(ON_BD_USB_OVC, "ON_BD_USB_OVC");
173 if (ret) {
174 printk(KERN_ERR "%s: failed to request GPIO for USB 1.1 port "
175 "over-current indicator: %d\n", __func__, ret);
176 return;
178 gpio_direction_input(ON_BD_USB_OVC);
180 ret = da8xx_register_usb11(&da830_evm_usb11_pdata);
181 if (ret)
182 pr_warning("%s: USB 1.1 registration failed: %d\n",
183 __func__, ret);
186 static struct davinci_uart_config da830_evm_uart_config __initdata = {
187 .enabled_uarts = 0x7,
190 static const short da830_evm_mcasp1_pins[] = {
191 DA830_AHCLKX1, DA830_ACLKX1, DA830_AFSX1, DA830_AHCLKR1, DA830_AFSR1,
192 DA830_AMUTE1, DA830_AXR1_0, DA830_AXR1_1, DA830_AXR1_2, DA830_AXR1_5,
193 DA830_ACLKR1, DA830_AXR1_6, DA830_AXR1_7, DA830_AXR1_8, DA830_AXR1_10,
194 DA830_AXR1_11,
198 static u8 da830_iis_serializer_direction[] = {
199 RX_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
200 INACTIVE_MODE, TX_MODE, INACTIVE_MODE, INACTIVE_MODE,
201 INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
204 static struct snd_platform_data da830_evm_snd_data = {
205 .tx_dma_offset = 0x2000,
206 .rx_dma_offset = 0x2000,
207 .op_mode = DAVINCI_MCASP_IIS_MODE,
208 .num_serializer = ARRAY_SIZE(da830_iis_serializer_direction),
209 .tdm_slots = 2,
210 .serial_dir = da830_iis_serializer_direction,
211 .asp_chan_q = EVENTQ_0,
212 .version = MCASP_VERSION_2,
213 .txnumevt = 1,
214 .rxnumevt = 1,
218 * GPIO2[1] is used as MMC_SD_WP and GPIO2[2] as MMC_SD_INS.
220 static const short da830_evm_mmc_sd_pins[] = {
221 DA830_MMCSD_DAT_0, DA830_MMCSD_DAT_1, DA830_MMCSD_DAT_2,
222 DA830_MMCSD_DAT_3, DA830_MMCSD_DAT_4, DA830_MMCSD_DAT_5,
223 DA830_MMCSD_DAT_6, DA830_MMCSD_DAT_7, DA830_MMCSD_CLK,
224 DA830_MMCSD_CMD, DA830_GPIO2_1, DA830_GPIO2_2,
228 #define DA830_MMCSD_WP_PIN GPIO_TO_PIN(2, 1)
229 #define DA830_MMCSD_CD_PIN GPIO_TO_PIN(2, 2)
231 static int da830_evm_mmc_get_ro(int index)
233 return gpio_get_value(DA830_MMCSD_WP_PIN);
236 static int da830_evm_mmc_get_cd(int index)
238 return !gpio_get_value(DA830_MMCSD_CD_PIN);
241 static struct davinci_mmc_config da830_evm_mmc_config = {
242 .get_ro = da830_evm_mmc_get_ro,
243 .get_cd = da830_evm_mmc_get_cd,
244 .wires = 8,
245 .max_freq = 50000000,
246 .caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
247 .version = MMC_CTLR_VERSION_2,
250 static inline void da830_evm_init_mmc(void)
252 int ret;
254 ret = davinci_cfg_reg_list(da830_evm_mmc_sd_pins);
255 if (ret) {
256 pr_warning("da830_evm_init: mmc/sd mux setup failed: %d\n",
257 ret);
258 return;
261 ret = gpio_request(DA830_MMCSD_WP_PIN, "MMC WP");
262 if (ret) {
263 pr_warning("da830_evm_init: can not open GPIO %d\n",
264 DA830_MMCSD_WP_PIN);
265 return;
267 gpio_direction_input(DA830_MMCSD_WP_PIN);
269 ret = gpio_request(DA830_MMCSD_CD_PIN, "MMC CD\n");
270 if (ret) {
271 pr_warning("da830_evm_init: can not open GPIO %d\n",
272 DA830_MMCSD_CD_PIN);
273 return;
275 gpio_direction_input(DA830_MMCSD_CD_PIN);
277 ret = da8xx_register_mmcsd0(&da830_evm_mmc_config);
278 if (ret) {
279 pr_warning("da830_evm_init: mmc/sd registration failed: %d\n",
280 ret);
281 gpio_free(DA830_MMCSD_WP_PIN);
286 * UI board NAND/NOR flashes only use 8-bit data bus.
288 static const short da830_evm_emif25_pins[] = {
289 DA830_EMA_D_0, DA830_EMA_D_1, DA830_EMA_D_2, DA830_EMA_D_3,
290 DA830_EMA_D_4, DA830_EMA_D_5, DA830_EMA_D_6, DA830_EMA_D_7,
291 DA830_EMA_A_0, DA830_EMA_A_1, DA830_EMA_A_2, DA830_EMA_A_3,
292 DA830_EMA_A_4, DA830_EMA_A_5, DA830_EMA_A_6, DA830_EMA_A_7,
293 DA830_EMA_A_8, DA830_EMA_A_9, DA830_EMA_A_10, DA830_EMA_A_11,
294 DA830_EMA_A_12, DA830_EMA_BA_0, DA830_EMA_BA_1, DA830_NEMA_WE,
295 DA830_NEMA_CS_2, DA830_NEMA_CS_3, DA830_NEMA_OE, DA830_EMA_WAIT_0,
299 #if defined(CONFIG_MMC_DAVINCI) || defined(CONFIG_MMC_DAVINCI_MODULE)
300 #define HAS_MMC 1
301 #else
302 #define HAS_MMC 0
303 #endif
305 #ifdef CONFIG_DA830_UI_NAND
306 static struct mtd_partition da830_evm_nand_partitions[] = {
307 /* bootloader (U-Boot, etc) in first sector */
308 [0] = {
309 .name = "bootloader",
310 .offset = 0,
311 .size = SZ_128K,
312 .mask_flags = MTD_WRITEABLE, /* force read-only */
314 /* bootloader params in the next sector */
315 [1] = {
316 .name = "params",
317 .offset = MTDPART_OFS_APPEND,
318 .size = SZ_128K,
319 .mask_flags = MTD_WRITEABLE, /* force read-only */
321 /* kernel */
322 [2] = {
323 .name = "kernel",
324 .offset = MTDPART_OFS_APPEND,
325 .size = SZ_2M,
326 .mask_flags = 0,
328 /* file system */
329 [3] = {
330 .name = "filesystem",
331 .offset = MTDPART_OFS_APPEND,
332 .size = MTDPART_SIZ_FULL,
333 .mask_flags = 0,
337 /* flash bbt decriptors */
338 static uint8_t da830_evm_nand_bbt_pattern[] = { 'B', 'b', 't', '0' };
339 static uint8_t da830_evm_nand_mirror_pattern[] = { '1', 't', 'b', 'B' };
341 static struct nand_bbt_descr da830_evm_nand_bbt_main_descr = {
342 .options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE |
343 NAND_BBT_WRITE | NAND_BBT_2BIT |
344 NAND_BBT_VERSION | NAND_BBT_PERCHIP,
345 .offs = 2,
346 .len = 4,
347 .veroffs = 16,
348 .maxblocks = 4,
349 .pattern = da830_evm_nand_bbt_pattern
352 static struct nand_bbt_descr da830_evm_nand_bbt_mirror_descr = {
353 .options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE |
354 NAND_BBT_WRITE | NAND_BBT_2BIT |
355 NAND_BBT_VERSION | NAND_BBT_PERCHIP,
356 .offs = 2,
357 .len = 4,
358 .veroffs = 16,
359 .maxblocks = 4,
360 .pattern = da830_evm_nand_mirror_pattern
363 static struct davinci_nand_pdata da830_evm_nand_pdata = {
364 .parts = da830_evm_nand_partitions,
365 .nr_parts = ARRAY_SIZE(da830_evm_nand_partitions),
366 .ecc_mode = NAND_ECC_HW,
367 .ecc_bits = 4,
368 .options = NAND_USE_FLASH_BBT,
369 .bbt_td = &da830_evm_nand_bbt_main_descr,
370 .bbt_md = &da830_evm_nand_bbt_mirror_descr,
373 static struct resource da830_evm_nand_resources[] = {
374 [0] = { /* First memory resource is NAND I/O window */
375 .start = DA8XX_AEMIF_CS3_BASE,
376 .end = DA8XX_AEMIF_CS3_BASE + PAGE_SIZE - 1,
377 .flags = IORESOURCE_MEM,
379 [1] = { /* Second memory resource is AEMIF control registers */
380 .start = DA8XX_AEMIF_CTL_BASE,
381 .end = DA8XX_AEMIF_CTL_BASE + SZ_32K - 1,
382 .flags = IORESOURCE_MEM,
386 static struct platform_device da830_evm_nand_device = {
387 .name = "davinci_nand",
388 .id = 1,
389 .dev = {
390 .platform_data = &da830_evm_nand_pdata,
392 .num_resources = ARRAY_SIZE(da830_evm_nand_resources),
393 .resource = da830_evm_nand_resources,
396 static inline void da830_evm_init_nand(int mux_mode)
398 int ret;
400 if (HAS_MMC) {
401 pr_warning("WARNING: both MMC/SD and NAND are "
402 "enabled, but they share AEMIF pins.\n"
403 "\tDisable MMC/SD for NAND support.\n");
404 return;
407 ret = davinci_cfg_reg_list(da830_evm_emif25_pins);
408 if (ret)
409 pr_warning("da830_evm_init: emif25 mux setup failed: %d\n",
410 ret);
412 ret = platform_device_register(&da830_evm_nand_device);
413 if (ret)
414 pr_warning("da830_evm_init: NAND device not registered.\n");
416 gpio_direction_output(mux_mode, 1);
418 #else
419 static inline void da830_evm_init_nand(int mux_mode) { }
420 #endif
422 #ifdef CONFIG_DA830_UI_LCD
423 static inline void da830_evm_init_lcdc(int mux_mode)
425 int ret;
427 ret = davinci_cfg_reg_list(da830_lcdcntl_pins);
428 if (ret)
429 pr_warning("da830_evm_init: lcdcntl mux setup failed: %d\n",
430 ret);
432 ret = da8xx_register_lcdc(&sharp_lcd035q3dg01_pdata);
433 if (ret)
434 pr_warning("da830_evm_init: lcd setup failed: %d\n", ret);
436 gpio_direction_output(mux_mode, 0);
438 #else
439 static inline void da830_evm_init_lcdc(int mux_mode) { }
440 #endif
442 static struct at24_platform_data da830_evm_i2c_eeprom_info = {
443 .byte_len = SZ_256K / 8,
444 .page_size = 64,
445 .flags = AT24_FLAG_ADDR16,
446 .setup = davinci_get_mac_addr,
447 .context = (void *)0x7f00,
450 static int __init da830_evm_ui_expander_setup(struct i2c_client *client,
451 int gpio, unsigned ngpio, void *context)
453 gpio_request(gpio + 6, "UI MUX_MODE");
455 /* Drive mux mode low to match the default without UI card */
456 gpio_direction_output(gpio + 6, 0);
458 da830_evm_init_lcdc(gpio + 6);
460 da830_evm_init_nand(gpio + 6);
462 return 0;
465 static int da830_evm_ui_expander_teardown(struct i2c_client *client, int gpio,
466 unsigned ngpio, void *context)
468 gpio_free(gpio + 6);
469 return 0;
472 static struct pcf857x_platform_data __initdata da830_evm_ui_expander_info = {
473 .gpio_base = DAVINCI_N_GPIO,
474 .setup = da830_evm_ui_expander_setup,
475 .teardown = da830_evm_ui_expander_teardown,
478 static struct i2c_board_info __initdata da830_evm_i2c_devices[] = {
480 I2C_BOARD_INFO("24c256", 0x50),
481 .platform_data = &da830_evm_i2c_eeprom_info,
484 I2C_BOARD_INFO("tlv320aic3x", 0x18),
487 I2C_BOARD_INFO("pcf8574", 0x3f),
488 .platform_data = &da830_evm_ui_expander_info,
492 static struct davinci_i2c_platform_data da830_evm_i2c_0_pdata = {
493 .bus_freq = 100, /* kHz */
494 .bus_delay = 0, /* usec */
498 * The following EDMA channels/slots are not being used by drivers (for
499 * example: Timer, GPIO, UART events etc) on da830/omap-l137 EVM, hence
500 * they are being reserved for codecs on the DSP side.
502 static const s16 da830_dma_rsv_chans[][2] = {
503 /* (offset, number) */
504 { 8, 2},
505 {12, 2},
506 {24, 4},
507 {30, 2},
508 {-1, -1}
511 static const s16 da830_dma_rsv_slots[][2] = {
512 /* (offset, number) */
513 { 8, 2},
514 {12, 2},
515 {24, 4},
516 {30, 26},
517 {-1, -1}
520 static struct edma_rsv_info da830_edma_rsv[] = {
522 .rsv_chans = da830_dma_rsv_chans,
523 .rsv_slots = da830_dma_rsv_slots,
527 static __init void da830_evm_init(void)
529 struct davinci_soc_info *soc_info = &davinci_soc_info;
530 int ret;
532 ret = da830_register_edma(da830_edma_rsv);
533 if (ret)
534 pr_warning("da830_evm_init: edma registration failed: %d\n",
535 ret);
537 ret = davinci_cfg_reg_list(da830_i2c0_pins);
538 if (ret)
539 pr_warning("da830_evm_init: i2c0 mux setup failed: %d\n",
540 ret);
542 ret = da8xx_register_i2c(0, &da830_evm_i2c_0_pdata);
543 if (ret)
544 pr_warning("da830_evm_init: i2c0 registration failed: %d\n",
545 ret);
547 da830_evm_usb_init();
549 soc_info->emac_pdata->phy_mask = DA830_EVM_PHY_MASK;
550 soc_info->emac_pdata->mdio_max_freq = DA830_EVM_MDIO_FREQUENCY;
551 soc_info->emac_pdata->rmii_en = 1;
553 ret = davinci_cfg_reg_list(da830_cpgmac_pins);
554 if (ret)
555 pr_warning("da830_evm_init: cpgmac mux setup failed: %d\n",
556 ret);
558 ret = da8xx_register_emac();
559 if (ret)
560 pr_warning("da830_evm_init: emac registration failed: %d\n",
561 ret);
563 ret = da8xx_register_watchdog();
564 if (ret)
565 pr_warning("da830_evm_init: watchdog registration failed: %d\n",
566 ret);
568 davinci_serial_init(&da830_evm_uart_config);
569 i2c_register_board_info(1, da830_evm_i2c_devices,
570 ARRAY_SIZE(da830_evm_i2c_devices));
572 ret = davinci_cfg_reg_list(da830_evm_mcasp1_pins);
573 if (ret)
574 pr_warning("da830_evm_init: mcasp1 mux setup failed: %d\n",
575 ret);
577 da8xx_register_mcasp(1, &da830_evm_snd_data);
579 da830_evm_init_mmc();
581 ret = da8xx_register_rtc();
582 if (ret)
583 pr_warning("da830_evm_init: rtc setup failed: %d\n", ret);
586 #ifdef CONFIG_SERIAL_8250_CONSOLE
587 static int __init da830_evm_console_init(void)
589 return add_preferred_console("ttyS", 2, "115200");
591 console_initcall(da830_evm_console_init);
592 #endif
594 static void __init da830_evm_map_io(void)
596 da830_init();
599 MACHINE_START(DAVINCI_DA830_EVM, "DaVinci DA830/OMAP-L137 EVM")
600 .phys_io = IO_PHYS,
601 .io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc,
602 .boot_params = (DA8XX_DDR_BASE + 0x100),
603 .map_io = da830_evm_map_io,
604 .init_irq = cp_intc_init,
605 .timer = &davinci_timer,
606 .init_machine = da830_evm_init,
607 MACHINE_END