release/src-rt-6.x.4708/cfe/cfe/arch/mips/cpu/sb1250/src/diag_l1cache.h

   1 /*  *********************************************************************
   2     *  SB1250 Board Support Package
   3     *
   4     *  L2 Cache Diagnostic                      File: diag_l1cache.h
   5     *
   6     *  A diagnostic for the L2 cache.  On pass2 parts, this diag
   7     *  will disable portions of the cache as necessary.
   8     *
   9     *  Author:  Zongbo Chen (zongbo@broadcom.com)
  10     *
  11     *********************************************************************
  12     *
  13     *  Copyright 2000,2001,2002,2003
  14     *  Broadcom Corporation. All rights reserved.
  15     *
  16     *  This software is furnished under license and may be used and
  17     *  copied only in accordance with the following terms and
  18     *  conditions.  Subject to these conditions, you may download,
  19     *  copy, install, use, modify and distribute modified or unmodified
  20     *  copies of this software in source and/or binary form.  No title
  21     *  or ownership is transferred hereby.
  22     *
  23     *  1) Any source code used, modified or distributed must reproduce
  24     *     and retain this copyright notice and list of conditions
  25     *     as they appear in the source file.
  26     *
  27     *  2) No right is granted to use any trade name, trademark, or
  28     *     logo of Broadcom Corporation.  The "Broadcom Corporation"
  29     *     name may not be used to endorse or promote products derived
  30     *     from this software without the prior written permission of
  31     *     Broadcom Corporation.
  32     *
  33     *  3) THIS SOFTWARE IS PROVIDED "AS-IS" AND ANY EXPRESS OR
  34     *     IMPLIED WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED
  35     *     WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
  36     *     PURPOSE, OR NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT
  37     *     SHALL BROADCOM BE LIABLE FOR ANY DAMAGES WHATSOEVER, AND IN
  38     *     PARTICULAR, BROADCOM SHALL NOT BE LIABLE FOR DIRECT, INDIRECT,
  39     *     INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  40     *     (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
  41     *     GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
  42     *     BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
  43     *     OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
  44     *     TORT (INCLUDING NEGLIGENCE OR OTHERWISE), EVEN IF ADVISED OF
  45     *     THE POSSIBILITY OF SUCH DAMAGE.
  46     ********************************************************************* */
  47
  48 #define L1C_OP_IDXINVAL     0
  49 #define L1C_OP_IDXLOADTAG   1
  50 #define L1C_OP_IDXLOADDATA  1
  51 #define L1C_OP_IDXSTORETAG  2
  52 #define L1C_OP_IDXSTOREDATA 2
  53 #define L1C_OP_IMPLRSVD     3
  54 #define L1C_OP_HITINVAL     4
  55 #define L1C_OP_FILL         5
  56 #define L1C_OP_HIT_WB_INVAL 5
  57 #define L1C_OP_HITWRITEBACK 6
  58 #define L1C_OP_FETCHLOCK    7
  59
  60 #define L1C_I               0
  61 #define L1C_D               1
  62 #define L1CINDDATA_I        2   /* for index store/load data */
  63 #define L1CINDDATA_D        3
  64
  65 #define L1CACHEOP(cachename,op) ((cachename) | ((op) << 2))
  66
  67 #define UNMAPPED_UNCACHED_ADDR  0xa0000000
  68 #define UNMAPPED_CACHED_ADDR    0x80000000
  69
  70 /* masks and field values for taglo and taghi registers */
  71 #define DTAGLO_PTAG1_SHIFT      _SB_MAKE64(26)  /* Phy addr bits [39:26] */
  72 #define DTAGLO_PTAG1_MASK       _SB_MAKEMASK(14,DTAGLO_PTAG1_SHIFT)
  73 #define DTAGLO_PTAG0_SHIFT      _SB_MAKE64(13)  /* Phy addr bits [25:13] */
  74 #define DTAGLO_PTAG0_MASK       _SB_MAKEMASK(13,DTAGLO_PTAG0_SHIFT)
  75 #define DTAGLO_PTAG_SHIFT       _SB_MAKE64(13)  /* Phy addr bits [39:12] */
  76 #define DTAGLO_PTAG_MASK        _SB_MAKEMASK(27,DTAGLO_PTAG0_SHIFT)
  77 #define DTAGLO_P1_SHIFT         _SB_MAKE64(11)  /* parity bits for PTag1 */
  78 #define DTAGLO_P0_SHIFT         _SB_MAKE64(10)  /* parity bits for PTag0 */
  79
  80 #define DTAGHI_STATE_SHIFT      _SB_MAKE64(28)  /* state bits */
  81 #define DTAGHI_STATE_MASK       _SB_MAKEMASK(2,DTAGHI_STATE_SHIFT)
  82 #define DTAGHI_COH_SHIFT        _SB_MAKE64(27)
  83 #define DTAGHI_CHECK_SHIFT      _SB_MAKE64(25)
  84 #define DTAGHI_CHECK_MASK       _SB_MAKEMASK(2,DTAGHI_CHECK_SHIFT)
  85 #define DTAGHI_EXTNC_SHIFT      _SB_MAKE64(24)
  86 #define DTAGHI_STREAM_SHIFT     _SB_MAKE64(23)  /* Stream bit */
  87 #define DTAGHI_LU_SHIFT         _SB_MAKE64(22)  /* LU bit */
  88 #define DTAGHI_LRU_SHIFT        _SB_MAKE64(14)  /* LRU bits */
  89 #define DTAGHI_LRU_MASK         _SB_MAKEMASK(8,DTAGHI_LRU_SHIFT)
  90
  91 /* TAGHI state bits */
  92 #define DTAGHI_ST_INVALID       00
  93 #define DTAGHI_ST_SHARED        01
  94 #define DTAGHI_ST_EXC_CLEAN     02
  95 #define DTAGHI_ST_EXC_DIRTY     03
  96
  97 /* I Tag lo bits for  */
  98 #define ITAGLO_REGION_SHIFT     _SB_MAKE64(62)
  99 #define ITAGLO_REGION_MASK      _SB_MAKEMASK(2,ITAGLO_REGION_SHIFT)
 100 #ifdef RTL
 101 #define ITAGLO_VTAG1_SHIFT      _SB_MAKE64(24)
 102 #define ITAGLO_VTAG1_MASK       _SB_MAKEMASK(20,ITAGLO_VTAG1_SHIFT)
 103 #else
 104 #define ITAGLO_VTAG1_SHIFT      _SB_MAKE64(25)
 105 #define ITAGLO_VTAG1_MASK       _SB_MAKEMASK(19,ITAGLO_VTAG1_SHIFT)
 106 #endif
 107 #ifdef RTL
 108 #define ITAGLO_VTAG0_SHIFT      _SB_MAKE64(13)
 109 #define ITAGLO_VTAG0_MASK       _SB_MAKEMASK(11,ITAGLO_VTAG0_SHIFT)
 110 #else
 111 #define ITAGLO_VTAG0_SHIFT      _SB_MAKE64(13)
 112 #define ITAGLO_VTAG0_MASK       _SB_MAKEMASK(12,ITAGLO_VTAG0_SHIFT)
 113 #endif
 114 #define ITAGLO_P1_SHIFT         _SB_MAKE64(11)
 115 #define ITAGLO_P0_SHIFT         _SB_MAKE64(10)
 116 #define ITAGLO_GLOBAL_SHIFT     _SB_MAKE64(8)
 117 #define ITAGLO_ASID_SHIFT       _SB_MAKE64(0)
 118 #define ITAGLO_ASID_MASK        _SB_MAKEMASK(8,ITAGLO_ASID_SHIFT)
 119
 120 #define ITAGHI_VALID_SHIFT      _SB_MAKE64(29)
 121 #define ITAGHI_PARITY_SHIFT     _SB_MAKE64(27)
 122 #define ITAGHI_LRU_SHIFT        _SB_MAKE64(14)
 123 #define ITAGHI_LRU_MASK         _SB_MAKEMASK(8,ITAGHI_LRU_SHIFT)
 124 #define ITAGHI_LU_SHIFT         _SB_MAKE64(22)
 125
 126 #define DTAG_LO_PAT(ptag1,ptag0,parity_tag1,parity_tag0) \
 127                         ((_SB_MAKEVALUE(ptag1,DTAGLO_PTAG1_SHIFT) & \
 128                           DTAGLO_PTAG1_MASK) |\
 129                          (_SB_MAKEVALUE(ptag0,DTAGLO_PTAG0_SHIFT) & \
 130                           DTAGLO_PTAG0_MASK) |\
 131                          _SB_MAKEVALUE(parity_tag1,DTAGLO_P1_SHIFT) |\
 132                          _SB_MAKEVALUE(parity_tag0,DTAGLO_P0_SHIFT))
 133 #define DTAG_HI_PAT(state,coh,check,enc,stream,lu,lru)                  \
 134                         ((_SB_MAKEVALUE(state, DTAGHI_STATE_SHIFT)&     \
 135                           DTAGHI_STATE_MASK)|                           \
 136                          (_SB_MAKEVALUE(coh, DTAGHI_COH_SHIFT)) |       \
 137                          (_SB_MAKEVALUE(check, DTAGHI_CHECK_SHIFT) &    \
 138                           DTAGHI_CHECK_MASK) |                          \
 139                          _SB_MAKEVALUE(enc,DTAGHI_EXTNC_SHIFT) |        \
 140                          _SB_MAKEVALUE(stream,DTAGHI_STREAM_SHIFT) |    \
 141                          _SB_MAKEVALUE(lu,DTAGHI_LU_SHIFT) |            \
 142                          (_SB_MAKEVALUE(lru,DTAGHI_LRU_SHIFT) &         \
 143                           DTAGHI_LRU_MASK))
 144
 145 /* L1 characteristicts */
 146 #define MAX_WAYS        4
 147 #define MAX_LINES       LINES_TO_TEST
 148 #define DWORDS_PER_LINE 4
 149 #define MAX_PATTERN     12