release/src-rt-6.x.4708/cfe/cfe/arch/mips/board/bigsur/src/bigsur_init.S

   1 /*  *********************************************************************
   2     *  SB1250 Board Support Package
   3     *
   4     *  Board-specific initialization            File: BIGSUR_INIT.S
   5     *
   6     *  This module contains the assembly-language part of the init
   7     *  code for this board support package.  The routine
   8     *  "board_earlyinit" lives here.
   9     *
  10     *  Author:  Mitch Lichtenberg (mpl@broadcom.com)
  11     *
  12     *********************************************************************
  13     *
  14     *  Copyright 2000,2001,2002,2003
  15     *  Broadcom Corporation. All rights reserved.
  16     *
  17     *  This software is furnished under license and may be used and
  18     *  copied only in accordance with the following terms and
  19     *  conditions.  Subject to these conditions, you may download,
  20     *  copy, install, use, modify and distribute modified or unmodified
  21     *  copies of this software in source and/or binary form.  No title
  22     *  or ownership is transferred hereby.
  23     *
  24     *  1) Any source code used, modified or distributed must reproduce
  25     *     and retain this copyright notice and list of conditions
  26     *     as they appear in the source file.
  27     *
  28     *  2) No right is granted to use any trade name, trademark, or
  29     *     logo of Broadcom Corporation.  The "Broadcom Corporation"
  30     *     name may not be used to endorse or promote products derived
  31     *     from this software without the prior written permission of
  32     *     Broadcom Corporation.
  33     *
  34     *  3) THIS SOFTWARE IS PROVIDED "AS-IS" AND ANY EXPRESS OR
  35     *     IMPLIED WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED
  36     *     WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
  37     *     PURPOSE, OR NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT
  38     *     SHALL BROADCOM BE LIABLE FOR ANY DAMAGES WHATSOEVER, AND IN
  39     *     PARTICULAR, BROADCOM SHALL NOT BE LIABLE FOR DIRECT, INDIRECT,
  40     *     INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  41     *     (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
  42     *     GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
  43     *     BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
  44     *     OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
  45     *     TORT (INCLUDING NEGLIGENCE OR OTHERWISE), EVEN IF ADVISED OF
  46     *     THE POSSIBILITY OF SUCH DAMAGE.
  47     ********************************************************************* */
  48
  49
  50 #include "sbmips.h"
  51 #include "bcm1400_genbus.h"
  52 #include "bcm1400_regs.h"
  53 #include "bcm1400_scd.h"
  54 #include "bsp_config.h"
  55 #include "mipsmacros.h"
  56 #include "bigsur.h"
  57 #include "bcm1400_draminit.h"
  58
  59                 .text
  60
  61
  62
  63 /*  *********************************************************************
  64     *  Macros
  65     ********************************************************************* */
  66
  67 /* #define _SERIAL_PORT_LEDS_ */
  68
  69 #ifdef _SERIAL_PORT_LEDS_
  70 #include "bcm1400_uart.h"
  71 #endif
  72
  73 /*  *********************************************************************
  74     *  BOARD_EARLYINIT()
  75     *
  76     *  Initialize board registers.  This is the earliest
  77     *  time the BSP gets control.  This routine cannot assume that
  78     *  memory is operational, and therefore all code in this routine
  79     *  must run from registers only.  The $ra register must not
  80     *  be modified, as it contains the return address.
  81     *
  82     *  This routine will be called from uncached space, before
  83     *  the caches are initialized.  If you want to make
  84     *  subroutine calls from here, you must use the CALLKSEG1 macro.
  85     *
  86     *  Among other things, this is where the GPIO registers get
  87     *  programmed to make on-board LEDs function, or other startup
  88     *  that has to be done before anything will work.
  89     *
  90     *  Input parameters:
  91     *      nothing
  92     *
  93     *  Return value:
  94     *      nothing
  95     ********************************************************************* */
  96
  97 LEAF(board_earlyinit)
  98
  99
 100        #
 101        # Configure the GPIOs
 102        #
 103
 104                 li      t0,PHYS_TO_K1(A_GPIO_DIRECTION)
 105                 li      t1,GPIO_OUTPUT_MASK
 106                 sd      t1,0(t0)
 107
 108                 li      t0,PHYS_TO_K1(A_GPIO_INT_TYPE)
 109                 li      t1,GPIO_INTERRUPT_MASK
 110                 sd      t1,0(t0)
 111
 112        #
 113        # Turn off the diagnostic LED.
 114        #
 115                 li      t0,PHYS_TO_K1(A_GPIO_PIN_CLR)
 116                 li      t1,M_GPIO_DEBUG_LED
 117                 sd      t1,0(t0)
 118
 119
 120        #
 121        # Configure the alternate boot ROM
 122        #
 123
 124                 li      t0,PHYS_TO_K1(A_IO_EXT_CS_BASE(ALT_BOOTROM_CS))
 125
 126                 li      t1,ALT_BOOTROM_PHYS >> S_IO_ADDRBASE
 127                 sd      t1,R_IO_EXT_START_ADDR(t0)
 128
 129                 li      t1,ALT_BOOTROM_SIZE-1
 130                 sd      t1,R_IO_EXT_MULT_SIZE(t0)
 131
 132                 li      t1,ALT_BOOTROM_TIMING0
 133                 sd      t1,R_IO_EXT_TIME_CFG0(t0)
 134
 135                 li      t1,ALT_BOOTROM_TIMING1
 136                 sd      t1,R_IO_EXT_TIME_CFG1(t0)
 137
 138                 li      t1,ALT_BOOTROM_CONFIG
 139                 sd      t1,R_IO_EXT_CFG(t0)
 140
 141         #
 142         # Make sure that the mailbox register is cleared
 143         #
 144
 145                 li      t0,PHYS_TO_K1(A_IMR_REGISTER(0,R_IMR_MAILBOX_CLR_CPU))
 146                 nor     t1, zero, zero
 147                 sd      t1,(t0)
 148
 149 #ifdef _SERIAL_PORT_LEDS_
 150
 151         # Program the mode register for 8 bits/char, no parity
 152
 153                 li      t0,PHYS_TO_K1(A_DUART_MODE_REG_1_A)
 154                 li      t1,V_DUART_BITS_PER_CHAR_8 | V_DUART_PARITY_MODE_NONE
 155                 sd      t1,(t0)
 156
 157         # Program the mode register for 1 stop bit, ignore CTS
 158
 159                 li      t0,PHYS_TO_K1(A_DUART_MODE_REG_2_A)
 160                 li      t1,M_DUART_STOP_BIT_LEN_1
 161                 sd      t1,(t0)
 162
 163         # Program the baud rate to 115200
 164
 165                 li      t0,PHYS_TO_K1(A_DUART_CLK_SEL_A)
 166                 li      t1,V_DUART_BAUD_RATE(CFG_SERIAL_BAUD_RATE)
 167                 sd      t1,(t0)
 168
 169         # Dont use any interrupts
 170
 171                 li      t0,PHYS_TO_K1(A_DUART_IMR)
 172                 ld      t1,(t0)
 173                 and     t1,~M_DUART_IMR_ALL_A
 174                 sd      t1,(t0)
 175
 176         # Enable sending and receiving
 177
 178                 li      t0,PHYS_TO_K1(A_DUART_CMD_A)
 179                 li      t1,M_DUART_RX_EN | M_DUART_TX_EN
 180                 sd      t1,(t0)
 181
 182 #endif
 183
 184
 185                 j       ra
 186
 187 END(board_earlyinit)
 188
 189
 190 /*  *********************************************************************
 191     *  BOARD_DRAMINFO
 192     *
 193     *  Return the address of the DRAM information table
 194     *
 195     *  Input parameters:
 196     *      nothing
 197     *
 198     *  Return value:
 199     *      v0 - DRAM info table, return 0 to use default table
 200     ********************************************************************* */
 201
 202
 203 LEAF(board_draminfo)
 204
 205         #
 206         # This board has soldered-down memory. (?)
 207         #
 208
 209                 move    t0,ra
 210
 211                 LOADREL(v0,dramtab)
 212
 213                 move    ra,t0
 214                 j       ra
 215
 216
 217         /*
 218          * Regular DRAM for regular Bigsurs
 219          */
 220
 221 dramtab:
 222
 223         /*
 224          * DRAM globals: interleave OK
 225          */
 226
 227         DRAM_GLOBALS(CFG_DRAM_INTERLEAVE)
 228
 229
 230         /*
 231          * 128MB on MC 0 (JEDEC SDRAM)
 232          * Samsung K4H561638B - 16Mx16 chips
 233          *
 234          * Minimum tMEMCLK: 8.0ns (125Mhz max freq)
 235          *
 236          * CS0 Geometry: 13 rows, 9 columns, 2 bankbits
 237          *
 238          * 64khz refresh, CAS Latency 2.5
 239          * Timing (ns):   tCK=7.50 tRAS=45 tRP=20.00 tRRD=15.0 tRCD=20.0 tRFC=auto tRC=auto
 240          *
 241          * Clock Config: Default
 242          */
 243
 244         DRAM_CHAN_CFG(MC_CHAN0, DRT10(8,0), JEDEC, CASCHECK, BLKSIZE32, CFG_DRAM_CSINTERLEAVE, CFG_DRAM_ECC, 0)
 245         DRAM_CS_GEOM(MC_CS0, 13, 9, 2)
 246         DRAM_CS_TIMING(DRT10(7,5), JEDEC_RFSH_64khz, JEDEC_CASLAT_25, 0,  45, DRT4(20,0), DRT4(15,0),  DRT4(20,0),  0, 0)
 247
 248
 249         /*
 250          * 128MB on MC 1 (JEDEC SDRAM)
 251          * Samsung K4H561638B - 16Mx16 chips
 252          *
 253          * Minimum tMEMCLK: 8.0ns (125Mhz max freq)
 254          *
 255          * CS0 Geometry: 13 rows, 9 columns, 2 bankbits
 256          *
 257          * 64khz refresh, CAS Latency 2.5
 258          * Timing (ns):   tCK=7.50 tRAS=45 tRP=20.00 tRRD=15.0 tRCD=20.0 tRFC=auto tRC=auto
 259          *
 260          * Clock Config: Default
 261          */
 262
 263         DRAM_CHAN_CFG(MC_CHAN1, DRT10(8,0), JEDEC, CASCHECK, BLKSIZE32, CFG_DRAM_CSINTERLEAVE, CFG_DRAM_ECC, 0)
 264         DRAM_CS_GEOM(MC_CS0, 13, 9, 2)
 265         DRAM_CS_TIMING(DRT10(7,5), JEDEC_RFSH_64khz, JEDEC_CASLAT_25, 0,  45, DRT4(20,0), DRT4(15,0),  DRT4(20,0),  0, 0)
 266
 267         DRAM_EOT
 268
 269
 270 END(board_draminfo)
 271
 272
 273 /*  *********************************************************************
 274     *  BOARD_UARTA_TXCHAR
 275     *
 276     *  Transmit a single character via UART A
 277     *
 278     *  Input parameters:
 279     *      a0 - character to transmit (low-order 8 bits)
 280     *
 281     *  Return value:
 282     *      nothing
 283     *
 284     *  Registers used:
 285     *      t0,t1
 286     ********************************************************************* */
 287
 288 #ifdef _SERIAL_PORT_LEDS_
 289 LEAF(board_uarta_txchar)
 290
 291         # Wait until there is space in the transmit buffer
 292
 293 1:              li      t0,PHYS_TO_K1(A_DUART_STATUS_A)
 294                 ld      t1,(t0)                 # Get status bits
 295                 and     t1,M_DUART_TX_RDY       # test for ready
 296                 beq     t1,0,1b                 # keep going till ready
 297
 298         # Okay, now send the character.
 299
 300                 li      t0,PHYS_TO_K1(A_DUART_TX_HOLD_A)
 301                 sd      a0,(t0)
 302
 303         # done!
 304
 305                 j       ra
 306
 307 END(board_uarta_txchar)
 308 #endif
 309
 310 /*  *********************************************************************
 311     *  BOARD_SETLEDS(x)
 312     *
 313     *  Set LEDs for boot-time progress indication.  Not used if
 314     *  the board does not have progress LEDs.  This routine
 315     *  must not call any other routines, since it may be invoked
 316     *  either from KSEG0 or KSEG1 and it may be invoked
 317     *  whether or not the icache is operational.
 318     *
 319     *  Input parameters:
 320     *      a0 - LED value (8 bits per character, 4 characters)
 321     *
 322     *  Return value:
 323     *      nothing
 324     *
 325     *  Registers used:
 326     *      t0,t1,t2,t3
 327     ********************************************************************* */
 328
 329
 330 LEAF(board_setleds)
 331
 332 #ifdef _SERIAL_PORT_LEDS_
 333                 move    t3,ra
 334                 move    t2,a0
 335
 336                 li      a0,'['
 337                 bal     board_uarta_txchar
 338
 339                 move    a0,t2
 340                 rol     a0,8
 341                 bal     board_uarta_txchar
 342                 rol     a0,8
 343                 bal     board_uarta_txchar
 344                 rol     a0,8
 345                 bal     board_uarta_txchar
 346                 rol     a0,8
 347                 bal     board_uarta_txchar
 348
 349                 li      a0,']'
 350                 bal     board_uarta_txchar
 351
 352                 move    ra,t3
 353
 354 #endif
 355
 356                 j       ra
 357
 358 END(board_setleds)