release/src-rt-6.x.4708/cfe/cfe/arch/mips/board/bcm97115/include/bcm97115.h

   1 #define DDR_BASE_ADR_REG    0xFFE00000
   2
   3
   4 #define UARTA_BASE          0xFFFE00B0       /* UART A registers */
   5 #define UARTB_BASE          0xFFFE00C0       /* UART B registers */
   6 #define UARTC_BASE          0xFFFE01A0       /* UART C registers */
   7 #define UARTD_BASE          0xFFFE01A8       /* UART D registers */
   8 #define TIMR_ADR_BASE       0xFFFE0700       /* timer registers  */
   9 #define EBI_ADR_BASE        0xFFFE7000       /* EBI control registers */
  10
  11 #define PHYS_ROM_BASE       0x1FC00000
  12 #define PHYS_FLASH_BASE     0x1A000000       /* Flash Memory */
  13 #define PHYS_FLASH1_BASE    PHYS_FLASH_BASE  /* Flash Memory */
  14 #define PHYS_FLASH2_BASE    0x1C000000       /* Flash Memory */
  15 #define PHYS_BCM44XX_BASE   0x1B400000       /* HPNA */
  16
  17
  18 #define EBI_SIZE_8K        0
  19 #define EBI_SIZE_2M        8
  20 #define EBI_SIZE_4M        9
  21 #define EBI_SIZE_16M      11
  22
  23 #define CS0BASE         0x00
  24 #define CS0CNTL         0x04
  25 #define CS1BASE         0x08
  26 #define CS1CNTL         0x0c
  27 #define CS2BASE         0x10
  28 #define CS2CNTL         0x14
  29 #define CS8BASE         0x40
  30 #define CS8CNTL         0x44
  31
  32 #define EBI_ENABLE          0x00000001     /* .. enable this range */
  33 #define EBI_WORD_WIDE       0x00000010     /* .. 16-bit peripheral, else 8 */
  34 #define EBI_TS_TA_MODE      0x00000080     /* .. use TS/TA mode */
  35 #define SEVENWT             0x07000000     /* ..  7 WS */
  36 #define EBI_REV_END         0x00000400     /* .. Reverse Endian */
  37
  38 #define EBI_MASTER_ENABLE   0x80000000  /* allow external masters */
  39 #define EBICONFIG           0x100
  40
  41
  42 #define TIMER_0_CTL             0x04
  43 #define TIMER_1_CTL             0x08
  44 #define TIMER_2_CTL             0x0c
  45 #define TIMER_3_CTL             0x10
  46
  47 #define TIMER_MASK      2
  48 #define TIMER_INTS      3