allow coexistance of N build and AC build.
[tomato.git] / release / src-rt-6.x / linux / linux-2.6 / include / asm-sh / cpu-sh2a / cache.h
blob3e4b9e4809829ced0a5a9af35491c631db7a814e
1 /*
2 * include/asm-sh/cpu-sh2a/cache.h
4 * Copyright (C) 2004 Paul Mundt
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10 #ifndef __ASM_CPU_SH2A_CACHE_H
11 #define __ASM_CPU_SH2A_CACHE_H
13 #define L1_CACHE_SHIFT 4
15 #define CCR1 0xfffc1000
16 #define CCR2 0xfffc1004
18 /* CCR1 behaves more like the traditional CCR */
19 #define CCR CCR1
22 * Most of the SH-2A CCR1 definitions resemble the SH-4 ones. All others not
23 * listed here are reserved.
25 #define CCR_CACHE_CB 0x0000 /* Hack */
26 #define CCR_CACHE_OCE 0x0001
27 #define CCR_CACHE_WT 0x0002
28 #define CCR_CACHE_OCI 0x0008 /* OCF */
29 #define CCR_CACHE_ICE 0x0100
30 #define CCR_CACHE_ICI 0x0800 /* ICF */
32 #define CACHE_IC_ADDRESS_ARRAY 0xf0000000
33 #define CACHE_OC_ADDRESS_ARRAY 0xf0800000
35 #define CCR_CACHE_ENABLE (CCR_CACHE_OCE | CCR_CACHE_ICE)
36 #define CCR_CACHE_INVALIDATE (CCR_CACHE_OCI | CCR_CACHE_ICI)
38 #endif /* __ASM_CPU_SH2A_CACHE_H */