allow coexistance of N build and AC build.
[tomato.git] / release / src-rt-6.x / linux / linux-2.6 / include / asm-arm26 / pgtable.h
blob2b20e9f08857483a100b81fd25751c732682d247
1 /*
2 * linux/include/asm-arm26/pgtable.h
4 * Copyright (C) 2000-2002 Russell King
5 * Copyright (C) 2003 Ian Molton
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
11 #ifndef _ASMARM_PGTABLE_H
12 #define _ASMARM_PGTABLE_H
14 #include <asm-generic/4level-fixup.h>
16 #include <asm/memory.h>
19 * The table below defines the page protection levels that we insert into our
20 * Linux page table version. These get translated into the best that the
21 * architecture can perform. Note that on most ARM hardware:
22 * 1) We cannot do execute protection
23 * 2) If we could do execute protection, then read is implied
24 * 3) write implies read permissions
26 #define __P000 PAGE_NONE
27 #define __P001 PAGE_READONLY
28 #define __P010 PAGE_COPY
29 #define __P011 PAGE_COPY
30 #define __P100 PAGE_READONLY
31 #define __P101 PAGE_READONLY
32 #define __P110 PAGE_COPY
33 #define __P111 PAGE_COPY
35 #define __S000 PAGE_NONE
36 #define __S001 PAGE_READONLY
37 #define __S010 PAGE_SHARED
38 #define __S011 PAGE_SHARED
39 #define __S100 PAGE_READONLY
40 #define __S101 PAGE_READONLY
41 #define __S110 PAGE_SHARED
42 #define __S111 PAGE_SHARED
45 * PMD_SHIFT determines the size of the area a second-level page table can map
46 * PGDIR_SHIFT determines what a third-level page table entry can map
48 #define PGD_SHIFT 25
49 #define PMD_SHIFT 20
51 #define PGD_SIZE (1UL << PGD_SHIFT)
52 #define PGD_MASK (~(PGD_SIZE-1))
53 #define PMD_SIZE (1UL << PMD_SHIFT)
54 #define PMD_MASK (~(PMD_SIZE-1))
56 /* The kernel likes to use these names for the above (ick) */
57 #define PGDIR_SIZE PGD_SIZE
58 #define PGDIR_MASK PGD_MASK
60 #define PTRS_PER_PGD 32
61 #define PTRS_PER_PMD 1
62 #define PTRS_PER_PTE 32
65 * This is the lowest virtual address we can permit any user space
66 * mapping to be mapped at. This is particularly important for
67 * non-high vector CPUs.
69 #define FIRST_USER_ADDRESS PAGE_SIZE
71 #define FIRST_USER_PGD_NR 1
72 #define USER_PTRS_PER_PGD ((TASK_SIZE/PGD_SIZE) - FIRST_USER_PGD_NR)
74 // FIXME - WTF?
75 #define LIBRARY_TEXT_START 0x0c000000
79 #ifndef __ASSEMBLY__
80 extern void __pte_error(const char *file, int line, unsigned long val);
81 extern void __pmd_error(const char *file, int line, unsigned long val);
82 extern void __pgd_error(const char *file, int line, unsigned long val);
84 #define pte_ERROR(pte) __pte_error(__FILE__, __LINE__, pte_val(pte))
85 #define pmd_ERROR(pmd) __pmd_error(__FILE__, __LINE__, pmd_val(pmd))
86 #define pgd_ERROR(pgd) __pgd_error(__FILE__, __LINE__, pgd_val(pgd))
89 * ZERO_PAGE is a global shared page that is always zero: used
90 * for zero-mapped memory areas etc..
92 extern struct page *empty_zero_page;
93 #define ZERO_PAGE(vaddr) (empty_zero_page)
95 #define pte_pfn(pte) (pte_val(pte) >> PAGE_SHIFT)
96 #define pte_page(pte) (pfn_to_page(pte_pfn(pte)))
97 #define pfn_pte(pfn,prot) (__pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot)))
98 #define pages_to_mb(x) ((x) >> (20 - PAGE_SHIFT))
99 #define mk_pte(page,prot) pfn_pte(page_to_pfn(page),prot)
102 * Terminology: PGD = Page Directory, PMD = Page Middle Directory,
103 * PTE = Page Table Entry
105 * on arm26 we have no 2nd level page table. we simulate this by removing the
106 * PMD.
108 * pgd_none is 0 to prevernt pmd_alloc() calling __pmd_alloc(). This causes it
109 * to return pmd_offset(pgd,addr) which is a pointer to the pgd (IOW, a no-op).
111 * however, to work this way, whilst we are allocating 32 pgds, containing 32
112 * PTEs, the actual work is done on the PMDs, thus:
114 * instead of mm->pgd->pmd->pte
115 * we have mm->pgdpmd->pte
117 * IOW, think of PGD operations and PMD ones as being the same thing, just
118 * that PGD stuff deals with the mm_struct side of things, wheras PMD stuff
119 * deals with the pte side of things.
121 * additionally, we store some bits in the PGD and PTE pointers:
122 * PGDs:
123 * o The lowest (1) bit of the PGD is to determine if it is present or swap.
124 * o The 2nd bit of the PGD is unused and must be zero.
125 * o The top 6 bits of the PGD must be zero.
126 * PTEs:
127 * o The lower 5 bits of a pte are flags. bit 1 is the 'present' flag. The
128 * others determine the pages attributes.
130 * the pgd_val, pmd_val, and pte_val macros seem to be private to our code.
131 * They get the RAW value of the PGD/PMD/PTE entry, including our flags
132 * encoded into the pointers.
134 * The pgd_offset, pmd_offset, and pte_offset macros are used by the kernel,
135 * so they shouldnt have our flags attached.
137 * If you understood that, feel free to explain it to me...
141 #define _PMD_PRESENT (0x01)
143 /* These definitions allow us to optimise out stuff like pmd_alloc() */
144 #define pgd_none(pgd) (0)
145 #define pgd_bad(pgd) (0)
146 #define pgd_present(pgd) (1)
147 #define pgd_clear(pgdp) do { } while (0)
149 /* Whilst these handle our actual 'page directory' (the agglomeration of pgd and pmd)
151 #define pmd_none(pmd) (!pmd_val(pmd))
152 #define pmd_bad(pmd) ((pmd_val(pmd) & 0xfc000002))
153 #define pmd_present(pmd) (pmd_val(pmd) & _PMD_PRESENT)
154 #define set_pmd(pmd_ptr, pmd) ((*(pmd_ptr)) = (pmd))
155 #define pmd_clear(pmdp) set_pmd(pmdp, __pmd(0))
157 /* and these handle our pte tables */
158 #define pte_none(pte) (!pte_val(pte))
159 #define pte_present(pte) (pte_val(pte) & _PAGE_PRESENT)
160 #define set_pte(pte_ptr, pte) ((*(pte_ptr)) = (pte))
161 #define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)
162 #define pte_clear(mm,addr,ptep) set_pte_at((mm),(addr),(ptep), __pte(0))
164 /* macros to ease the getting of pointers to stuff... */
165 #define pgd_offset(mm, addr) ((pgd_t *)(mm)->pgd + __pgd_index(addr))
166 #define pmd_offset(pgd, addr) ((pmd_t *)(pgd))
167 #define pte_offset(pmd, addr) ((pte_t *)pmd_page(*(pmd)) + __pte_index(addr))
169 /* there is no __pmd_index as we dont use pmds */
170 #define __pgd_index(addr) ((addr) >> PGD_SHIFT)
171 #define __pte_index(addr) (((addr) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
174 /* Keep the kernel happy */
175 #define pgd_index(addr) __pgd_index(addr)
176 #define pgd_offset_k(addr) (pgd_offset(&init_mm, addr))
179 * The vmalloc() routines leaves a hole of 4kB between each vmalloced
180 * area for the same reason. ;) FIXME: surely 1 page not 4k ?
182 #define VMALLOC_START 0x01a00000
183 #define VMALLOC_END 0x01c00000
185 /* Is pmd_page supposed to return a pointer to a page in some arches? ours seems to
186 * return a pointer to memory (no special alignment)
188 #define pmd_page(pmd) ((struct page *)(pmd_val((pmd)) & ~_PMD_PRESENT))
189 #define pmd_page_vaddr(pmd) ((pte_t *)(pmd_val((pmd)) & ~_PMD_PRESENT))
191 #define pte_offset_kernel(dir,addr) (pmd_page_vaddr(*(dir)) + __pte_index(addr))
193 #define pte_offset_map(dir,addr) (pmd_page_vaddr(*(dir)) + __pte_index(addr))
194 #define pte_offset_map_nested(dir,addr) (pmd_page_vaddr(*(dir)) + __pte_index(addr))
195 #define pte_unmap(pte) do { } while (0)
196 #define pte_unmap_nested(pte) do { } while (0)
199 #define _PAGE_PRESENT 0x01
200 #define _PAGE_READONLY 0x02
201 #define _PAGE_NOT_USER 0x04
202 #define _PAGE_OLD 0x08
203 #define _PAGE_CLEAN 0x10
205 // an old page has never been read.
206 // a clean page has never been written.
208 /* -- present -- -- !dirty -- --- !write --- ---- !user --- */
209 #define PAGE_NONE __pgprot(_PAGE_PRESENT | _PAGE_CLEAN | _PAGE_READONLY | _PAGE_NOT_USER)
210 #define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_CLEAN )
211 #define PAGE_COPY __pgprot(_PAGE_PRESENT | _PAGE_CLEAN | _PAGE_READONLY )
212 #define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_CLEAN | _PAGE_READONLY )
213 #define PAGE_KERNEL __pgprot(_PAGE_PRESENT | _PAGE_NOT_USER)
215 #define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_OLD | _PAGE_CLEAN)
218 * The following only work if pte_present() is true.
219 * Undefined behaviour if not..
221 #define pte_read(pte) (!(pte_val(pte) & _PAGE_NOT_USER))
222 #define pte_write(pte) (!(pte_val(pte) & _PAGE_READONLY))
223 #define pte_exec(pte) (!(pte_val(pte) & _PAGE_NOT_USER))
224 #define pte_dirty(pte) (!(pte_val(pte) & _PAGE_CLEAN))
225 #define pte_young(pte) (!(pte_val(pte) & _PAGE_OLD))
226 //ONLY when !pte_present() I think. nicked from arm32 (FIXME!)
227 #define pte_file(pte) (!(pte_val(pte) & _PAGE_OLD))
229 #define PTE_BIT_FUNC(fn,op) \
230 static inline pte_t pte_##fn(pte_t pte) { pte_val(pte) op; return pte; }
232 PTE_BIT_FUNC(wrprotect, |= _PAGE_READONLY);
233 PTE_BIT_FUNC(mkwrite, &= ~_PAGE_READONLY);
234 PTE_BIT_FUNC(exprotect, |= _PAGE_NOT_USER);
235 PTE_BIT_FUNC(mkexec, &= ~_PAGE_NOT_USER);
236 PTE_BIT_FUNC(mkclean, |= _PAGE_CLEAN);
237 PTE_BIT_FUNC(mkdirty, &= ~_PAGE_CLEAN);
238 PTE_BIT_FUNC(mkold, |= _PAGE_OLD);
239 PTE_BIT_FUNC(mkyoung, &= ~_PAGE_OLD);
242 * We don't store cache state bits in the page table here. FIXME - or do we?
244 #define pgprot_noncached(prot) (prot)
245 #define pgprot_writecombine(prot) (prot) //FIXME - is a no-op?
247 extern void pgtable_cache_init(void);
249 //FIXME - nicked from arm32 and brutally hacked. probably wrong.
250 #define pte_to_pgoff(x) (pte_val(x) >> 2)
251 #define pgoff_to_pte(x) __pte(((x) << 2) & ~_PAGE_OLD)
253 //FIXME - next line borrowed from arm32. is it right?
254 #define PTE_FILE_MAX_BITS 30
257 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
259 pte_val(pte) = (pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot);
260 return pte;
263 extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
265 /* Encode and decode a swap entry.
267 * We support up to 32GB of swap on 4k machines
269 #define __swp_type(x) (((x).val >> 2) & 0x7f)
270 #define __swp_offset(x) ((x).val >> 9)
271 #define __swp_entry(type,offset) ((swp_entry_t) { ((type) << 2) | ((offset) << 9) })
272 #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
273 #define __swp_entry_to_pte(swp) ((pte_t) { (swp).val })
275 /* Needs to be defined here and not in linux/mm.h, as it is arch dependent */
276 /* FIXME: this is not correct */
277 #define kern_addr_valid(addr) (1)
280 * Conversion functions: convert a page and protection to a page entry,
281 * and a page entry and page directory to the page they refer to.
283 static inline pte_t mk_pte_phys(unsigned long physpage, pgprot_t pgprot)
285 pte_t pte;
286 pte_val(pte) = physpage | pgprot_val(pgprot);
287 return pte;
291 #include <asm-generic/pgtable.h>
294 * remap a physical page `pfn' of size `size' with page protection `prot'
295 * into virtual address `from'
297 #define io_remap_pfn_range(vma,from,pfn,size,prot) \
298 remap_pfn_range(vma, from, pfn, size, prot)
300 #endif /* !__ASSEMBLY__ */
302 #endif /* _ASMARM_PGTABLE_H */