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allow coexistance of N build and AC build.
[tomato.git] / release / src-rt-6.x / linux / linux-2.6 / drivers / media / dvb / bt8xx / bt878.c
blobdf72b4b8ee103d5284790e0c8c85169272a6a912
1 /*
2 * bt878.c: part of the driver for the Pinnacle PCTV Sat DVB PCI card
3 *
4 * Copyright (C) 2002 Peter Hettkamp <peter.hettkamp@htp-tel.de>
5 *
6 * large parts based on the bttv driver
7 * Copyright (C) 1996,97,98 Ralph Metzler (rjkm@metzlerbros.de)
8 * & Marcus Metzler (mocm@metzlerbros.de)
9 * (c) 1999,2000 Gerd Knorr <kraxel@goldbach.in-berlin.de>
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * as published by the Free Software Foundation; either version 2
14 * of the License, or (at your option) any later version.
15 *
16
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
26 * Or, point your browser to http://www.gnu.org/copyleft/gpl.html
27 *
28 */
29
30 #include <linux/module.h>
31 #include <linux/moduleparam.h>
32 #include <linux/kernel.h>
33 #include <linux/pci.h>
34 #include <asm/io.h>
35 #include <linux/ioport.h>
36 #include <asm/pgtable.h>
37 #include <asm/page.h>
38 #include <linux/types.h>
39 #include <linux/interrupt.h>
40 #include <linux/kmod.h>
41 #include <linux/vmalloc.h>
42 #include <linux/init.h>
43
44 #include "dmxdev.h"
45 #include "dvbdev.h"
46 #include "bt878.h"
47 #include "dst_priv.h"
48
49
50 /**************************************/
51 /* Miscellaneous utility definitions */
52 /**************************************/
53
54 static unsigned int bt878_verbose = 1;
55 static unsigned int bt878_debug;
56
57 module_param_named(verbose, bt878_verbose, int, 0444);
58 MODULE_PARM_DESC(verbose,
59 "verbose startup messages, default is 1 (yes)");
60 module_param_named(debug, bt878_debug, int, 0644);
61 MODULE_PARM_DESC(debug, "Turn on/off debugging, default is 0 (off).");
62
63 int bt878_num;
64 struct bt878 bt878[BT878_MAX];
65
66 EXPORT_SYMBOL(bt878_num);
67 EXPORT_SYMBOL(bt878);
68
69 #define btwrite(dat,adr) bmtwrite((dat), (bt->bt878_mem+(adr)))
70 #define btread(adr) bmtread(bt->bt878_mem+(adr))
71
72 #define btand(dat,adr) btwrite((dat) & btread(adr), adr)
73 #define btor(dat,adr) btwrite((dat) | btread(adr), adr)
74 #define btaor(dat,mask,adr) btwrite((dat) | ((mask) & btread(adr)), adr)
75
76 #if defined(dprintk)
77 #undef dprintk
78 #endif
79 #define dprintk if(bt878_debug) printk
80
81 static void bt878_mem_free(struct bt878 *bt)
82 {
83 if (bt->buf_cpu) {
84 pci_free_consistent(bt->dev, bt->buf_size, bt->buf_cpu,
85 bt->buf_dma);
86 bt->buf_cpu = NULL;
87 }
88
89 if (bt->risc_cpu) {
90 pci_free_consistent(bt->dev, bt->risc_size, bt->risc_cpu,
91 bt->risc_dma);
92 bt->risc_cpu = NULL;
93 }
94 }
95
96 static int bt878_mem_alloc(struct bt878 *bt)
97 {
98 if (!bt->buf_cpu) {
99 bt->buf_size = 128 * 1024;
100
101 bt->buf_cpu =
102 pci_alloc_consistent(bt->dev, bt->buf_size,
103 &bt->buf_dma);
104
105 if (!bt->buf_cpu)
106 return -ENOMEM;
107
108 memset(bt->buf_cpu, 0, bt->buf_size);
109 }
110
111 if (!bt->risc_cpu) {
112 bt->risc_size = PAGE_SIZE;
113 bt->risc_cpu =
114 pci_alloc_consistent(bt->dev, bt->risc_size,
115 &bt->risc_dma);
116
117 if (!bt->risc_cpu) {
118 bt878_mem_free(bt);
119 return -ENOMEM;
120 }
121
122 memset(bt->risc_cpu, 0, bt->risc_size);
123 }
124
125 return 0;
126 }
127
128 /* RISC instructions */
129 #define RISC_WRITE (0x01 << 28)
130 #define RISC_JUMP (0x07 << 28)
131 #define RISC_SYNC (0x08 << 28)
132
133 /* RISC bits */
134 #define RISC_WR_SOL (1 << 27)
135 #define RISC_WR_EOL (1 << 26)
136 #define RISC_IRQ (1 << 24)
137 #define RISC_STATUS(status) ((((~status) & 0x0F) << 20) | ((status & 0x0F) << 16))
138 #define RISC_SYNC_RESYNC (1 << 15)
139 #define RISC_SYNC_FM1 0x06
140 #define RISC_SYNC_VRO 0x0C
141
142 #define RISC_FLUSH() bt->risc_pos = 0
143 #define RISC_INSTR(instr) bt->risc_cpu[bt->risc_pos++] = cpu_to_le32(instr)
144
145 static int bt878_make_risc(struct bt878 *bt)
146 {
147 bt->block_bytes = bt->buf_size >> 4;
148 bt->block_count = 1 << 4;
149 bt->line_bytes = bt->block_bytes;
150 bt->line_count = bt->block_count;
151
152 while (bt->line_bytes > 4095) {
153 bt->line_bytes >>= 1;
154 bt->line_count <<= 1;
155 }
156
157 if (bt->line_count > 255) {
158 printk("bt878: buffer size error!\n");
159 return -EINVAL;
160 }
161 return 0;
162 }
163
164
165 static void bt878_risc_program(struct bt878 *bt, u32 op_sync_orin)
166 {
167 u32 buf_pos = 0;
168 u32 line;
169
170 RISC_FLUSH();
171 RISC_INSTR(RISC_SYNC | RISC_SYNC_FM1 | op_sync_orin);
172 RISC_INSTR(0);
173
174 dprintk("bt878: risc len lines %u, bytes per line %u\n",
175 bt->line_count, bt->line_bytes);
176 for (line = 0; line < bt->line_count; line++) {
177 // At the beginning of every block we issue an IRQ with previous (finished) block number set
178 if (!(buf_pos % bt->block_bytes))
179 RISC_INSTR(RISC_WRITE | RISC_WR_SOL | RISC_WR_EOL |
180 RISC_IRQ |
181 RISC_STATUS(((buf_pos /
182 bt->block_bytes) +
183 (bt->block_count -
184 1)) %
185 bt->block_count) | bt->
186 line_bytes);
187 else
188 RISC_INSTR(RISC_WRITE | RISC_WR_SOL | RISC_WR_EOL |
189 bt->line_bytes);
190 RISC_INSTR(bt->buf_dma + buf_pos);
191 buf_pos += bt->line_bytes;
192 }
193
194 RISC_INSTR(RISC_SYNC | op_sync_orin | RISC_SYNC_VRO);
195 RISC_INSTR(0);
196
197 RISC_INSTR(RISC_JUMP);
198 RISC_INSTR(bt->risc_dma);
199
200 btwrite((bt->line_count << 16) | bt->line_bytes, BT878_APACK_LEN);
201 }
202
203 /*****************************/
204 /* Start/Stop grabbing funcs */
205 /*****************************/
206
207 void bt878_start(struct bt878 *bt, u32 controlreg, u32 op_sync_orin,
208 u32 irq_err_ignore)
209 {
210 u32 int_mask;
211
212 dprintk("bt878 debug: bt878_start (ctl=%8.8x)\n", controlreg);
213 /* complete the writing of the risc dma program now we have
214 * the card specifics
215 */
216 bt878_risc_program(bt, op_sync_orin);
217 controlreg &= ~0x1f;
218 controlreg |= 0x1b;
219
220 btwrite(bt->risc_dma, BT878_ARISC_START);
221
222 /* original int mask had :
223 * 6 2 8 4 0
224 * 1111 1111 1000 0000 0000
225 * SCERR|OCERR|PABORT|RIPERR|FDSR|FTRGT|FBUS|RISCI
226 * Hacked for DST to:
227 * SCERR | OCERR | FDSR | FTRGT | FBUS | RISCI
228 */
229 int_mask = BT878_ASCERR | BT878_AOCERR | BT878_APABORT |
230 BT878_ARIPERR | BT878_APPERR | BT878_AFDSR | BT878_AFTRGT |
231 BT878_AFBUS | BT878_ARISCI;
232
233
234 /* ignore pesky bits */
235 int_mask &= ~irq_err_ignore;
236
237 btwrite(int_mask, BT878_AINT_MASK);
238 btwrite(controlreg, BT878_AGPIO_DMA_CTL);
239 }
240
241 void bt878_stop(struct bt878 *bt)
242 {
243 u32 stat;
244 int i = 0;
245
246 dprintk("bt878 debug: bt878_stop\n");
247
248 btwrite(0, BT878_AINT_MASK);
249 btand(~0x13, BT878_AGPIO_DMA_CTL);
250
251 do {
252 stat = btread(BT878_AINT_STAT);
253 if (!(stat & BT878_ARISC_EN))
254 break;
255 i++;
256 } while (i < 500);
257
258 dprintk("bt878(%d) debug: bt878_stop, i=%d, stat=0x%8.8x\n",
259 bt->nr, i, stat);
260 }
261
262 EXPORT_SYMBOL(bt878_start);
263 EXPORT_SYMBOL(bt878_stop);
264
265 /*****************************/
266 /* Interrupt service routine */
267 /*****************************/
268
269 static irqreturn_t bt878_irq(int irq, void *dev_id)
270 {
271 u32 stat, astat, mask;
272 int count;
273 struct bt878 *bt;
274
275 bt = (struct bt878 *) dev_id;
276
277 count = 0;
278 while (1) {
279 stat = btread(BT878_AINT_STAT);
280 mask = btread(BT878_AINT_MASK);
281 if (!(astat = (stat & mask)))
282 return IRQ_NONE; /* this interrupt is not for me */
283 /* dprintk("bt878(%d) debug: irq count %d, stat 0x%8.8x, mask 0x%8.8x\n",bt->nr,count,stat,mask); */
284 btwrite(astat, BT878_AINT_STAT); /* try to clear interupt condition */
285
286
287 if (astat & (BT878_ASCERR | BT878_AOCERR)) {
288 if (bt878_verbose) {
289 printk("bt878(%d): irq%s%s risc_pc=%08x\n",
290 bt->nr,
291 (astat & BT878_ASCERR) ? " SCERR" :
292 "",
293 (astat & BT878_AOCERR) ? " OCERR" :
294 "", btread(BT878_ARISC_PC));
295 }
296 }
297 if (astat & (BT878_APABORT | BT878_ARIPERR | BT878_APPERR)) {
298 if (bt878_verbose) {
299 printk
300 ("bt878(%d): irq%s%s%s risc_pc=%08x\n",
301 bt->nr,
302 (astat & BT878_APABORT) ? " PABORT" :
303 "",
304 (astat & BT878_ARIPERR) ? " RIPERR" :
305 "",
306 (astat & BT878_APPERR) ? " PPERR" :
307 "", btread(BT878_ARISC_PC));
308 }
309 }
310 if (astat & (BT878_AFDSR | BT878_AFTRGT | BT878_AFBUS)) {
311 if (bt878_verbose) {
312 printk
313 ("bt878(%d): irq%s%s%s risc_pc=%08x\n",
314 bt->nr,
315 (astat & BT878_AFDSR) ? " FDSR" : "",
316 (astat & BT878_AFTRGT) ? " FTRGT" :
317 "",
318 (astat & BT878_AFBUS) ? " FBUS" : "",
319 btread(BT878_ARISC_PC));
320 }
321 }
322 if (astat & BT878_ARISCI) {
323 bt->finished_block = (stat & BT878_ARISCS) >> 28;
324 tasklet_schedule(&bt->tasklet);
325 break;
326 }
327 count++;
328 if (count > 20) {
329 btwrite(0, BT878_AINT_MASK);
330 printk(KERN_ERR
331 "bt878(%d): IRQ lockup, cleared int mask\n",
332 bt->nr);
333 break;
334 }
335 }
336 return IRQ_HANDLED;
337 }
338
339 int
340 bt878_device_control(struct bt878 *bt, unsigned int cmd, union dst_gpio_packet *mp)
341 {
342 int retval;
343
344 retval = 0;
345 if (mutex_lock_interruptible(&bt->gpio_lock))
346 return -ERESTARTSYS;
347 /* special gpio signal */
348 switch (cmd) {
349 case DST_IG_ENABLE:
350 // dprintk("dvb_bt8xx: dst enable mask 0x%02x enb 0x%02x \n", mp->dstg.enb.mask, mp->dstg.enb.enable);
351 retval = bttv_gpio_enable(bt->bttv_nr,
352 mp->enb.mask,
353 mp->enb.enable);
354 break;
355 case DST_IG_WRITE:
356 // dprintk("dvb_bt8xx: dst write gpio mask 0x%02x out 0x%02x\n", mp->dstg.outp.mask, mp->dstg.outp.highvals);
357 retval = bttv_write_gpio(bt->bttv_nr,
358 mp->outp.mask,
359 mp->outp.highvals);
360
361 break;
362 case DST_IG_READ:
363 /* read */
364 retval = bttv_read_gpio(bt->bttv_nr, &mp->rd.value);
365 // dprintk("dvb_bt8xx: dst read gpio 0x%02x\n", (unsigned)mp->dstg.rd.value);
366 break;
367 case DST_IG_TS:
368 /* Set packet size */
369 bt->TS_Size = mp->psize;
370 break;
371
372 default:
373 retval = -EINVAL;
374 break;
375 }
376 mutex_unlock(&bt->gpio_lock);
377 return retval;
378 }
379
380 EXPORT_SYMBOL(bt878_device_control);
381
382
383 static struct cards card_list[] __devinitdata = {
384
385 { 0x01010071, BTTV_BOARD_NEBULA_DIGITV, "Nebula Electronics DigiTV" },
386 { 0x07611461, BTTV_BOARD_AVDVBT_761, "AverMedia AverTV DVB-T 761" },
387 { 0x001c11bd, BTTV_BOARD_PINNACLESAT, "Pinnacle PCTV Sat" },
388 { 0x002611bd, BTTV_BOARD_TWINHAN_DST, "Pinnacle PCTV SAT CI" },
389 { 0x00011822, BTTV_BOARD_TWINHAN_DST, "Twinhan VisionPlus DVB" },
390 { 0xfc00270f, BTTV_BOARD_TWINHAN_DST, "ChainTech digitop DST-1000 DVB-S" },
391 { 0x07711461, BTTV_BOARD_AVDVBT_771, "AVermedia AverTV DVB-T 771" },
392 { 0xdb1018ac, BTTV_BOARD_DVICO_DVBT_LITE, "DViCO FusionHDTV DVB-T Lite" },
393 { 0xdb1118ac, BTTV_BOARD_DVICO_DVBT_LITE, "Ultraview DVB-T Lite" },
394 { 0xd50018ac, BTTV_BOARD_DVICO_FUSIONHDTV_5_LITE, "DViCO FusionHDTV 5 Lite" },
395 { 0x20007063, BTTV_BOARD_PC_HDTV, "pcHDTV HD-2000 TV" },
396 { 0x00261822, BTTV_BOARD_TWINHAN_DST, "DNTV Live! Mini" }
397 };
398
399
400 /***********************/
401 /* PCI device handling */
402 /***********************/
403
404 static int __devinit bt878_probe(struct pci_dev *dev,
405 const struct pci_device_id *pci_id)
406 {
407 int result = 0, has_dvb = 0, i;
408 unsigned char lat;
409 struct bt878 *bt;
410 #if defined(__powerpc__)
411 unsigned int cmd;
412 #endif
413 unsigned int cardid;
414 unsigned short id;
415 struct cards *dvb_cards;
416
417 printk(KERN_INFO "bt878: Bt878 AUDIO function found (%d).\n",
418 bt878_num);
419 if (bt878_num >= BT878_MAX) {
420 printk(KERN_ERR "bt878: Too many devices inserted\n");
421 result = -ENOMEM;
422 goto fail0;
423 }
424 if (pci_enable_device(dev))
425 return -EIO;
426
427 pci_read_config_word(dev, PCI_SUBSYSTEM_ID, &id);
428 cardid = id << 16;
429 pci_read_config_word(dev, PCI_SUBSYSTEM_VENDOR_ID, &id);
430 cardid |= id;
431
432 for (i = 0, dvb_cards = card_list; i < ARRAY_SIZE(card_list); i++, dvb_cards++) {
433 if (cardid == dvb_cards->pci_id) {
434 printk("%s: card id=[0x%x],[ %s ] has DVB functions.\n",
435 __func__, cardid, dvb_cards->name);
436 has_dvb = 1;
437 }
438 }
439
440 if (!has_dvb) {
441 printk("%s: card id=[0x%x], Unknown card.\nExiting..\n", __func__, cardid);
442 result = -EINVAL;
443
444 goto fail0;
445 }
446
447 bt = &bt878[bt878_num];
448 bt->dev = dev;
449 bt->nr = bt878_num;
450 bt->shutdown = 0;
451
452 bt->id = dev->device;
453 bt->irq = dev->irq;
454 bt->bt878_adr = pci_resource_start(dev, 0);
455 if (!request_mem_region(pci_resource_start(dev, 0),
456 pci_resource_len(dev, 0), "bt878")) {
457 result = -EBUSY;
458 goto fail0;
459 }
460
461 pci_read_config_byte(dev, PCI_CLASS_REVISION, &bt->revision);
462 pci_read_config_byte(dev, PCI_LATENCY_TIMER, &lat);
463
464
465 printk(KERN_INFO "bt878(%d): Bt%x (rev %d) at %02x:%02x.%x, ",
466 bt878_num, bt->id, bt->revision, dev->bus->number,
467 PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
468 printk("irq: %d, latency: %d, memory: 0x%lx\n",
469 bt->irq, lat, bt->bt878_adr);
470
471
472 #if defined(__powerpc__)
473 /* on OpenFirmware machines (PowerMac at least), PCI memory cycle */
474 /* response on cards with no firmware is not enabled by OF */
475 pci_read_config_dword(dev, PCI_COMMAND, &cmd);
476 cmd = (cmd | PCI_COMMAND_MEMORY);
477 pci_write_config_dword(dev, PCI_COMMAND, cmd);
478 #endif
479
480 #ifdef __sparc__
481 bt->bt878_mem = (unsigned char *) bt->bt878_adr;
482 #else
483 bt->bt878_mem = ioremap(bt->bt878_adr, 0x1000);
484 #endif
485
486 /* clear interrupt mask */
487 btwrite(0, BT848_INT_MASK);
488
489 result = request_irq(bt->irq, bt878_irq,
490 IRQF_SHARED | IRQF_DISABLED, "bt878",
491 (void *) bt);
492 if (result == -EINVAL) {
493 printk(KERN_ERR "bt878(%d): Bad irq number or handler\n",
494 bt878_num);
495 goto fail1;
496 }
497 if (result == -EBUSY) {
498 printk(KERN_ERR
499 "bt878(%d): IRQ %d busy, change your PnP config in BIOS\n",
500 bt878_num, bt->irq);
501 goto fail1;
502 }
503 if (result < 0)
504 goto fail1;
505
506 pci_set_master(dev);
507 pci_set_drvdata(dev, bt);
508
509 /* if(init_bt878(btv) < 0) {
510 bt878_remove(dev);
511 return -EIO;
512 }
513 */
514
515 if ((result = bt878_mem_alloc(bt))) {
516 printk("bt878: failed to allocate memory!\n");
517 goto fail2;
518 }
519
520 bt878_make_risc(bt);
521 btwrite(0, BT878_AINT_MASK);
522 bt878_num++;
523
524 return 0;
525
526 fail2:
527 free_irq(bt->irq, bt);
528 fail1:
529 release_mem_region(pci_resource_start(bt->dev, 0),
530 pci_resource_len(bt->dev, 0));
531 fail0:
532 pci_disable_device(dev);
533 return result;
534 }
535
536 static void __devexit bt878_remove(struct pci_dev *pci_dev)
537 {
538 u8 command;
539 struct bt878 *bt = pci_get_drvdata(pci_dev);
540
541 if (bt878_verbose)
542 printk("bt878(%d): unloading\n", bt->nr);
543
544 /* turn off all capturing, DMA and IRQs */
545 btand(~0x13, BT878_AGPIO_DMA_CTL);
546
547 /* first disable interrupts before unmapping the memory! */
548 btwrite(0, BT878_AINT_MASK);
549 btwrite(~0U, BT878_AINT_STAT);
550
551 /* disable PCI bus-mastering */
552 pci_read_config_byte(bt->dev, PCI_COMMAND, &command);
553 /* Should this be &=~ ?? */
554 command &= ~PCI_COMMAND_MASTER;
555 pci_write_config_byte(bt->dev, PCI_COMMAND, command);
556
557 free_irq(bt->irq, bt);
558 printk(KERN_DEBUG "bt878_mem: 0x%p.\n", bt->bt878_mem);
559 if (bt->bt878_mem)
560 iounmap(bt->bt878_mem);
561
562 release_mem_region(pci_resource_start(bt->dev, 0),
563 pci_resource_len(bt->dev, 0));
564 /* wake up any waiting processes
565 because shutdown flag is set, no new processes (in this queue)
566 are expected
567 */
568 bt->shutdown = 1;
569 bt878_mem_free(bt);
570
571 pci_set_drvdata(pci_dev, NULL);
572 pci_disable_device(pci_dev);
573 return;
574 }
575
576 static struct pci_device_id bt878_pci_tbl[] __devinitdata = {
577 {PCI_VENDOR_ID_BROOKTREE, PCI_DEVICE_ID_BROOKTREE_878,
578 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
579 {0,}
580 };
581
582 MODULE_DEVICE_TABLE(pci, bt878_pci_tbl);
583
584 static struct pci_driver bt878_pci_driver = {
585 .name = "bt878",
586 .id_table = bt878_pci_tbl,
587 .probe = bt878_probe,
588 .remove = bt878_remove,
589 };
590
591 static int bt878_pci_driver_registered;
592
593 /*******************************/
594 /* Module management functions */
595 /*******************************/
596
597 static int bt878_init_module(void)
598 {
599 bt878_num = 0;
600 bt878_pci_driver_registered = 0;
601
602 printk(KERN_INFO "bt878: AUDIO driver version %d.%d.%d loaded\n",
603 (BT878_VERSION_CODE >> 16) & 0xff,
604 (BT878_VERSION_CODE >> 8) & 0xff,
605 BT878_VERSION_CODE & 0xff);
606 /*
607 bt878_check_chipset();
608 */
609 /* later we register inside of bt878_find_audio_dma()
610 * because we may want to ignore certain cards */
611 bt878_pci_driver_registered = 1;
612 return pci_register_driver(&bt878_pci_driver);
613 }
614
615 static void bt878_cleanup_module(void)
616 {
617 if (bt878_pci_driver_registered) {
618 bt878_pci_driver_registered = 0;
619 pci_unregister_driver(&bt878_pci_driver);
620 }
621 return;
622 }
623
624 module_init(bt878_init_module);
625 module_exit(bt878_cleanup_module);
626
627 //MODULE_AUTHOR("XXX");
628 MODULE_LICENSE("GPL");
629
630 /*
631 * Local variables:
632 * c-basic-offset: 8
633 * End:
634 */
Tomato firmware and modifications.