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allow coexistance of N build and AC build.
[tomato.git] / release / src-rt-6.x / linux / linux-2.6 / drivers / input / misc / hp_sdc_rtc.c
blobab76ea442fa56140a89d58df87cc934e1073ab2f
1 /*
2 * HP i8042 SDC + MSM-58321 BBRTC driver.
3 *
4 * Copyright (c) 2001 Brian S. Julin
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions, and the following disclaimer,
12 * without modification.
13 * 2. The name of the author may not be used to endorse or promote products
14 * derived from this software without specific prior written permission.
15 *
16 * Alternatively, this software may be distributed under the terms of the
17 * GNU General Public License ("GPL").
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28 *
29 * References:
30 * System Device Controller Microprocessor Firmware Theory of Operation
31 * for Part Number 1820-4784 Revision B. Dwg No. A-1820-4784-2
32 * efirtc.c by Stephane Eranian/Hewlett Packard
33 *
34 */
35
36 #include <linux/hp_sdc.h>
37 #include <linux/errno.h>
38 #include <linux/types.h>
39 #include <linux/init.h>
40 #include <linux/module.h>
41 #include <linux/time.h>
42 #include <linux/miscdevice.h>
43 #include <linux/proc_fs.h>
44 #include <linux/poll.h>
45 #include <linux/rtc.h>
46
47 MODULE_AUTHOR("Brian S. Julin <bri@calyx.com>");
48 MODULE_DESCRIPTION("HP i8042 SDC + MSM-58321 RTC Driver");
49 MODULE_LICENSE("Dual BSD/GPL");
50
51 #define RTC_VERSION "1.10d"
52
53 static unsigned long epoch = 2000;
54
55 static struct semaphore i8042tregs;
56
57 static hp_sdc_irqhook hp_sdc_rtc_isr;
58
59 static struct fasync_struct *hp_sdc_rtc_async_queue;
60
61 static DECLARE_WAIT_QUEUE_HEAD(hp_sdc_rtc_wait);
62
63 static ssize_t hp_sdc_rtc_read(struct file *file, char __user *buf,
64 size_t count, loff_t *ppos);
65
66 static int hp_sdc_rtc_ioctl(struct inode *inode, struct file *file,
67 unsigned int cmd, unsigned long arg);
68
69 static unsigned int hp_sdc_rtc_poll(struct file *file, poll_table *wait);
70
71 static int hp_sdc_rtc_open(struct inode *inode, struct file *file);
72 static int hp_sdc_rtc_release(struct inode *inode, struct file *file);
73 static int hp_sdc_rtc_fasync (int fd, struct file *filp, int on);
74
75 static int hp_sdc_rtc_read_proc(char *page, char **start, off_t off,
76 int count, int *eof, void *data);
77
78 static void hp_sdc_rtc_isr (int irq, void *dev_id,
79 uint8_t status, uint8_t data)
80 {
81 return;
82 }
83
84 static int hp_sdc_rtc_do_read_bbrtc (struct rtc_time *rtctm)
85 {
86 struct semaphore tsem;
87 hp_sdc_transaction t;
88 uint8_t tseq[91];
89 int i;
90
91 i = 0;
92 while (i < 91) {
93 tseq[i++] = HP_SDC_ACT_DATAREG |
94 HP_SDC_ACT_POSTCMD | HP_SDC_ACT_DATAIN;
95 tseq[i++] = 0x01; /* write i8042[0x70] */
96 tseq[i] = i / 7; /* BBRTC reg address */
97 i++;
98 tseq[i++] = HP_SDC_CMD_DO_RTCR; /* Trigger command */
99 tseq[i++] = 2; /* expect 1 stat/dat pair back. */
100 i++; i++; /* buffer for stat/dat pair */
101 }
102 tseq[84] |= HP_SDC_ACT_SEMAPHORE;
103 t.endidx = 91;
104 t.seq = tseq;
105 t.act.semaphore = &tsem;
106 init_MUTEX_LOCKED(&tsem);
107
108 if (hp_sdc_enqueue_transaction(&t)) return -1;
109
110 down_interruptible(&tsem); /* Put ourselves to sleep for results. */
111
112 /* Check for nonpresence of BBRTC */
113 if (!((tseq[83] | tseq[90] | tseq[69] | tseq[76] |
114 tseq[55] | tseq[62] | tseq[34] | tseq[41] |
115 tseq[20] | tseq[27] | tseq[6] | tseq[13]) & 0x0f))
116 return -1;
117
118 memset(rtctm, 0, sizeof(struct rtc_time));
119 rtctm->tm_year = (tseq[83] & 0x0f) + (tseq[90] & 0x0f) * 10;
120 rtctm->tm_mon = (tseq[69] & 0x0f) + (tseq[76] & 0x0f) * 10;
121 rtctm->tm_mday = (tseq[55] & 0x0f) + (tseq[62] & 0x0f) * 10;
122 rtctm->tm_wday = (tseq[48] & 0x0f);
123 rtctm->tm_hour = (tseq[34] & 0x0f) + (tseq[41] & 0x0f) * 10;
124 rtctm->tm_min = (tseq[20] & 0x0f) + (tseq[27] & 0x0f) * 10;
125 rtctm->tm_sec = (tseq[6] & 0x0f) + (tseq[13] & 0x0f) * 10;
126
127 return 0;
128 }
129
130 static int hp_sdc_rtc_read_bbrtc (struct rtc_time *rtctm)
131 {
132 struct rtc_time tm, tm_last;
133 int i = 0;
134
135 /* MSM-58321 has no read latch, so must read twice and compare. */
136
137 if (hp_sdc_rtc_do_read_bbrtc(&tm_last)) return -1;
138 if (hp_sdc_rtc_do_read_bbrtc(&tm)) return -1;
139
140 while (memcmp(&tm, &tm_last, sizeof(struct rtc_time))) {
141 if (i++ > 4) return -1;
142 memcpy(&tm_last, &tm, sizeof(struct rtc_time));
143 if (hp_sdc_rtc_do_read_bbrtc(&tm)) return -1;
144 }
145
146 memcpy(rtctm, &tm, sizeof(struct rtc_time));
147
148 return 0;
149 }
150
151
152 static int64_t hp_sdc_rtc_read_i8042timer (uint8_t loadcmd, int numreg)
153 {
154 hp_sdc_transaction t;
155 uint8_t tseq[26] = {
156 HP_SDC_ACT_PRECMD | HP_SDC_ACT_POSTCMD | HP_SDC_ACT_DATAIN,
157 0,
158 HP_SDC_CMD_READ_T1, 2, 0, 0,
159 HP_SDC_ACT_POSTCMD | HP_SDC_ACT_DATAIN,
160 HP_SDC_CMD_READ_T2, 2, 0, 0,
161 HP_SDC_ACT_POSTCMD | HP_SDC_ACT_DATAIN,
162 HP_SDC_CMD_READ_T3, 2, 0, 0,
163 HP_SDC_ACT_POSTCMD | HP_SDC_ACT_DATAIN,
164 HP_SDC_CMD_READ_T4, 2, 0, 0,
165 HP_SDC_ACT_POSTCMD | HP_SDC_ACT_DATAIN,
166 HP_SDC_CMD_READ_T5, 2, 0, 0
167 };
168
169 t.endidx = numreg * 5;
170
171 tseq[1] = loadcmd;
172 tseq[t.endidx - 4] |= HP_SDC_ACT_SEMAPHORE; /* numreg assumed > 1 */
173
174 t.seq = tseq;
175 t.act.semaphore = &i8042tregs;
176
177 down_interruptible(&i8042tregs); /* Sleep if output regs in use. */
178
179 if (hp_sdc_enqueue_transaction(&t)) return -1;
180
181 down_interruptible(&i8042tregs); /* Sleep until results come back. */
182 up(&i8042tregs);
183
184 return (tseq[5] |
185 ((uint64_t)(tseq[10]) << 8) | ((uint64_t)(tseq[15]) << 16) |
186 ((uint64_t)(tseq[20]) << 24) | ((uint64_t)(tseq[25]) << 32));
187 }
188
189
190 /* Read the i8042 real-time clock */
191 static inline int hp_sdc_rtc_read_rt(struct timeval *res) {
192 int64_t raw;
193 uint32_t tenms;
194 unsigned int days;
195
196 raw = hp_sdc_rtc_read_i8042timer(HP_SDC_CMD_LOAD_RT, 5);
197 if (raw < 0) return -1;
198
199 tenms = (uint32_t)raw & 0xffffff;
200 days = (unsigned int)(raw >> 24) & 0xffff;
201
202 res->tv_usec = (suseconds_t)(tenms % 100) * 10000;
203 res->tv_sec = (time_t)(tenms / 100) + days * 86400;
204
205 return 0;
206 }
207
208
209 /* Read the i8042 fast handshake timer */
210 static inline int hp_sdc_rtc_read_fhs(struct timeval *res) {
211 uint64_t raw;
212 unsigned int tenms;
213
214 raw = hp_sdc_rtc_read_i8042timer(HP_SDC_CMD_LOAD_FHS, 2);
215 if (raw < 0) return -1;
216
217 tenms = (unsigned int)raw & 0xffff;
218
219 res->tv_usec = (suseconds_t)(tenms % 100) * 10000;
220 res->tv_sec = (time_t)(tenms / 100);
221
222 return 0;
223 }
224
225
226 /* Read the i8042 match timer (a.k.a. alarm) */
227 static inline int hp_sdc_rtc_read_mt(struct timeval *res) {
228 int64_t raw;
229 uint32_t tenms;
230
231 raw = hp_sdc_rtc_read_i8042timer(HP_SDC_CMD_LOAD_MT, 3);
232 if (raw < 0) return -1;
233
234 tenms = (uint32_t)raw & 0xffffff;
235
236 res->tv_usec = (suseconds_t)(tenms % 100) * 10000;
237 res->tv_sec = (time_t)(tenms / 100);
238
239 return 0;
240 }
241
242
243 /* Read the i8042 delay timer */
244 static inline int hp_sdc_rtc_read_dt(struct timeval *res) {
245 int64_t raw;
246 uint32_t tenms;
247
248 raw = hp_sdc_rtc_read_i8042timer(HP_SDC_CMD_LOAD_DT, 3);
249 if (raw < 0) return -1;
250
251 tenms = (uint32_t)raw & 0xffffff;
252
253 res->tv_usec = (suseconds_t)(tenms % 100) * 10000;
254 res->tv_sec = (time_t)(tenms / 100);
255
256 return 0;
257 }
258
259
260 /* Read the i8042 cycle timer (a.k.a. periodic) */
261 static inline int hp_sdc_rtc_read_ct(struct timeval *res) {
262 int64_t raw;
263 uint32_t tenms;
264
265 raw = hp_sdc_rtc_read_i8042timer(HP_SDC_CMD_LOAD_CT, 3);
266 if (raw < 0) return -1;
267
268 tenms = (uint32_t)raw & 0xffffff;
269
270 res->tv_usec = (suseconds_t)(tenms % 100) * 10000;
271 res->tv_sec = (time_t)(tenms / 100);
272
273 return 0;
274 }
275
276
277 /* Set the i8042 real-time clock */
278 static int hp_sdc_rtc_set_rt (struct timeval *setto)
279 {
280 uint32_t tenms;
281 unsigned int days;
282 hp_sdc_transaction t;
283 uint8_t tseq[11] = {
284 HP_SDC_ACT_PRECMD | HP_SDC_ACT_DATAOUT,
285 HP_SDC_CMD_SET_RTMS, 3, 0, 0, 0,
286 HP_SDC_ACT_PRECMD | HP_SDC_ACT_DATAOUT,
287 HP_SDC_CMD_SET_RTD, 2, 0, 0
288 };
289
290 t.endidx = 10;
291
292 if (0xffff < setto->tv_sec / 86400) return -1;
293 days = setto->tv_sec / 86400;
294 if (0xffff < setto->tv_usec / 1000000 / 86400) return -1;
295 days += ((setto->tv_sec % 86400) + setto->tv_usec / 1000000) / 86400;
296 if (days > 0xffff) return -1;
297
298 if (0xffffff < setto->tv_sec) return -1;
299 tenms = setto->tv_sec * 100;
300 if (0xffffff < setto->tv_usec / 10000) return -1;
301 tenms += setto->tv_usec / 10000;
302 if (tenms > 0xffffff) return -1;
303
304 tseq[3] = (uint8_t)(tenms & 0xff);
305 tseq[4] = (uint8_t)((tenms >> 8) & 0xff);
306 tseq[5] = (uint8_t)((tenms >> 16) & 0xff);
307
308 tseq[9] = (uint8_t)(days & 0xff);
309 tseq[10] = (uint8_t)((days >> 8) & 0xff);
310
311 t.seq = tseq;
312
313 if (hp_sdc_enqueue_transaction(&t)) return -1;
314 return 0;
315 }
316
317 /* Set the i8042 fast handshake timer */
318 static int hp_sdc_rtc_set_fhs (struct timeval *setto)
319 {
320 uint32_t tenms;
321 hp_sdc_transaction t;
322 uint8_t tseq[5] = {
323 HP_SDC_ACT_PRECMD | HP_SDC_ACT_DATAOUT,
324 HP_SDC_CMD_SET_FHS, 2, 0, 0
325 };
326
327 t.endidx = 4;
328
329 if (0xffff < setto->tv_sec) return -1;
330 tenms = setto->tv_sec * 100;
331 if (0xffff < setto->tv_usec / 10000) return -1;
332 tenms += setto->tv_usec / 10000;
333 if (tenms > 0xffff) return -1;
334
335 tseq[3] = (uint8_t)(tenms & 0xff);
336 tseq[4] = (uint8_t)((tenms >> 8) & 0xff);
337
338 t.seq = tseq;
339
340 if (hp_sdc_enqueue_transaction(&t)) return -1;
341 return 0;
342 }
343
344
345 /* Set the i8042 match timer (a.k.a. alarm) */
346 #define hp_sdc_rtc_set_mt (setto) \
347 hp_sdc_rtc_set_i8042timer(setto, HP_SDC_CMD_SET_MT)
348
349 /* Set the i8042 delay timer */
350 #define hp_sdc_rtc_set_dt (setto) \
351 hp_sdc_rtc_set_i8042timer(setto, HP_SDC_CMD_SET_DT)
352
353 /* Set the i8042 cycle timer (a.k.a. periodic) */
354 #define hp_sdc_rtc_set_ct (setto) \
355 hp_sdc_rtc_set_i8042timer(setto, HP_SDC_CMD_SET_CT)
356
357 /* Set one of the i8042 3-byte wide timers */
358 static int hp_sdc_rtc_set_i8042timer (struct timeval *setto, uint8_t setcmd)
359 {
360 uint32_t tenms;
361 hp_sdc_transaction t;
362 uint8_t tseq[6] = {
363 HP_SDC_ACT_PRECMD | HP_SDC_ACT_DATAOUT,
364 0, 3, 0, 0, 0
365 };
366
367 t.endidx = 6;
368
369 if (0xffffff < setto->tv_sec) return -1;
370 tenms = setto->tv_sec * 100;
371 if (0xffffff < setto->tv_usec / 10000) return -1;
372 tenms += setto->tv_usec / 10000;
373 if (tenms > 0xffffff) return -1;
374
375 tseq[1] = setcmd;
376 tseq[3] = (uint8_t)(tenms & 0xff);
377 tseq[4] = (uint8_t)((tenms >> 8) & 0xff);
378 tseq[5] = (uint8_t)((tenms >> 16) & 0xff);
379
380 t.seq = tseq;
381
382 if (hp_sdc_enqueue_transaction(&t)) {
383 return -1;
384 }
385 return 0;
386 }
387
388 static ssize_t hp_sdc_rtc_read(struct file *file, char __user *buf,
389 size_t count, loff_t *ppos) {
390 ssize_t retval;
391
392 if (count < sizeof(unsigned long))
393 return -EINVAL;
394
395 retval = put_user(68, (unsigned long __user *)buf);
396 return retval;
397 }
398
399 static unsigned int hp_sdc_rtc_poll(struct file *file, poll_table *wait)
400 {
401 unsigned long l;
402
403 l = 0;
404 if (l != 0)
405 return POLLIN | POLLRDNORM;
406 return 0;
407 }
408
409 static int hp_sdc_rtc_open(struct inode *inode, struct file *file)
410 {
411 return 0;
412 }
413
414 static int hp_sdc_rtc_release(struct inode *inode, struct file *file)
415 {
416 /* Turn off interrupts? */
417
418 if (file->f_flags & FASYNC) {
419 hp_sdc_rtc_fasync (-1, file, 0);
420 }
421
422 return 0;
423 }
424
425 static int hp_sdc_rtc_fasync (int fd, struct file *filp, int on)
426 {
427 return fasync_helper (fd, filp, on, &hp_sdc_rtc_async_queue);
428 }
429
430 static int hp_sdc_rtc_proc_output (char *buf)
431 {
432 #define YN(bit) ("no")
433 #define NY(bit) ("yes")
434 char *p;
435 struct rtc_time tm;
436 struct timeval tv;
437
438 memset(&tm, 0, sizeof(struct rtc_time));
439
440 p = buf;
441
442 if (hp_sdc_rtc_read_bbrtc(&tm)) {
443 p += sprintf(p, "BBRTC\t\t: READ FAILED!\n");
444 } else {
445 p += sprintf(p,
446 "rtc_time\t: %02d:%02d:%02d\n"
447 "rtc_date\t: %04d-%02d-%02d\n"
448 "rtc_epoch\t: %04lu\n",
449 tm.tm_hour, tm.tm_min, tm.tm_sec,
450 tm.tm_year + 1900, tm.tm_mon + 1,
451 tm.tm_mday, epoch);
452 }
453
454 if (hp_sdc_rtc_read_rt(&tv)) {
455 p += sprintf(p, "i8042 rtc\t: READ FAILED!\n");
456 } else {
457 p += sprintf(p, "i8042 rtc\t: %ld.%02d seconds\n",
458 tv.tv_sec, tv.tv_usec/1000);
459 }
460
461 if (hp_sdc_rtc_read_fhs(&tv)) {
462 p += sprintf(p, "handshake\t: READ FAILED!\n");
463 } else {
464 p += sprintf(p, "handshake\t: %ld.%02d seconds\n",
465 tv.tv_sec, tv.tv_usec/1000);
466 }
467
468 if (hp_sdc_rtc_read_mt(&tv)) {
469 p += sprintf(p, "alarm\t\t: READ FAILED!\n");
470 } else {
471 p += sprintf(p, "alarm\t\t: %ld.%02d seconds\n",
472 tv.tv_sec, tv.tv_usec/1000);
473 }
474
475 if (hp_sdc_rtc_read_dt(&tv)) {
476 p += sprintf(p, "delay\t\t: READ FAILED!\n");
477 } else {
478 p += sprintf(p, "delay\t\t: %ld.%02d seconds\n",
479 tv.tv_sec, tv.tv_usec/1000);
480 }
481
482 if (hp_sdc_rtc_read_ct(&tv)) {
483 p += sprintf(p, "periodic\t: READ FAILED!\n");
484 } else {
485 p += sprintf(p, "periodic\t: %ld.%02d seconds\n",
486 tv.tv_sec, tv.tv_usec/1000);
487 }
488
489 p += sprintf(p,
490 "DST_enable\t: %s\n"
491 "BCD\t\t: %s\n"
492 "24hr\t\t: %s\n"
493 "square_wave\t: %s\n"
494 "alarm_IRQ\t: %s\n"
495 "update_IRQ\t: %s\n"
496 "periodic_IRQ\t: %s\n"
497 "periodic_freq\t: %ld\n"
498 "batt_status\t: %s\n",
499 YN(RTC_DST_EN),
500 NY(RTC_DM_BINARY),
501 YN(RTC_24H),
502 YN(RTC_SQWE),
503 YN(RTC_AIE),
504 YN(RTC_UIE),
505 YN(RTC_PIE),
506 1UL,
507 1 ? "okay" : "dead");
508
509 return p - buf;
510 #undef YN
511 #undef NY
512 }
513
514 static int hp_sdc_rtc_read_proc(char *page, char **start, off_t off,
515 int count, int *eof, void *data)
516 {
517 int len = hp_sdc_rtc_proc_output (page);
518 if (len <= off+count) *eof = 1;
519 *start = page + off;
520 len -= off;
521 if (len>count) len = count;
522 if (len<0) len = 0;
523 return len;
524 }
525
526 static int hp_sdc_rtc_ioctl(struct inode *inode, struct file *file,
527 unsigned int cmd, unsigned long arg)
528 {
529 #if 1
530 return -EINVAL;
531 #else
532
533 struct rtc_time wtime;
534 struct timeval ttime;
535 int use_wtime = 0;
536
537 /* This needs major work. */
538
539 switch (cmd) {
540
541 case RTC_AIE_OFF: /* Mask alarm int. enab. bit */
542 case RTC_AIE_ON: /* Allow alarm interrupts. */
543 case RTC_PIE_OFF: /* Mask periodic int. enab. bit */
544 case RTC_PIE_ON: /* Allow periodic ints */
545 case RTC_UIE_ON: /* Allow ints for RTC updates. */
546 case RTC_UIE_OFF: /* Allow ints for RTC updates. */
547 {
548 /* We cannot mask individual user timers and we
549 cannot tell them apart when they occur, so it
550 would be disingenuous to succeed these IOCTLs */
551 return -EINVAL;
552 }
553 case RTC_ALM_READ: /* Read the present alarm time */
554 {
555 if (hp_sdc_rtc_read_mt(&ttime)) return -EFAULT;
556 if (hp_sdc_rtc_read_bbrtc(&wtime)) return -EFAULT;
557
558 wtime.tm_hour = ttime.tv_sec / 3600; ttime.tv_sec %= 3600;
559 wtime.tm_min = ttime.tv_sec / 60; ttime.tv_sec %= 60;
560 wtime.tm_sec = ttime.tv_sec;
561
562 break;
563 }
564 case RTC_IRQP_READ: /* Read the periodic IRQ rate. */
565 {
566 return put_user(hp_sdc_rtc_freq, (unsigned long *)arg);
567 }
568 case RTC_IRQP_SET: /* Set periodic IRQ rate. */
569 {
570 /*
571 * The max we can do is 100Hz.
572 */
573
574 if ((arg < 1) || (arg > 100)) return -EINVAL;
575 ttime.tv_sec = 0;
576 ttime.tv_usec = 1000000 / arg;
577 if (hp_sdc_rtc_set_ct(&ttime)) return -EFAULT;
578 hp_sdc_rtc_freq = arg;
579 return 0;
580 }
581 case RTC_ALM_SET: /* Store a time into the alarm */
582 {
583 /*
584 * This expects a struct hp_sdc_rtc_time. Writing 0xff means
585 * "don't care" or "match all" for PC timers. The HP SDC
586 * does not support that perk, but it could be emulated fairly
587 * easily. Only the tm_hour, tm_min and tm_sec are used.
588 * We could do it with 10ms accuracy with the HP SDC, if the
589 * rtc interface left us a way to do that.
590 */
591 struct hp_sdc_rtc_time alm_tm;
592
593 if (copy_from_user(&alm_tm, (struct hp_sdc_rtc_time*)arg,
594 sizeof(struct hp_sdc_rtc_time)))
595 return -EFAULT;
596
597 if (alm_tm.tm_hour > 23) return -EINVAL;
598 if (alm_tm.tm_min > 59) return -EINVAL;
599 if (alm_tm.tm_sec > 59) return -EINVAL;
600
601 ttime.sec = alm_tm.tm_hour * 3600 +
602 alm_tm.tm_min * 60 + alm_tm.tm_sec;
603 ttime.usec = 0;
604 if (hp_sdc_rtc_set_mt(&ttime)) return -EFAULT;
605 return 0;
606 }
607 case RTC_RD_TIME: /* Read the time/date from RTC */
608 {
609 if (hp_sdc_rtc_read_bbrtc(&wtime)) return -EFAULT;
610 break;
611 }
612 case RTC_SET_TIME: /* Set the RTC */
613 {
614 struct rtc_time hp_sdc_rtc_tm;
615 unsigned char mon, day, hrs, min, sec, leap_yr;
616 unsigned int yrs;
617
618 if (!capable(CAP_SYS_TIME))
619 return -EACCES;
620 if (copy_from_user(&hp_sdc_rtc_tm, (struct rtc_time *)arg,
621 sizeof(struct rtc_time)))
622 return -EFAULT;
623
624 yrs = hp_sdc_rtc_tm.tm_year + 1900;
625 mon = hp_sdc_rtc_tm.tm_mon + 1; /* tm_mon starts at zero */
626 day = hp_sdc_rtc_tm.tm_mday;
627 hrs = hp_sdc_rtc_tm.tm_hour;
628 min = hp_sdc_rtc_tm.tm_min;
629 sec = hp_sdc_rtc_tm.tm_sec;
630
631 if (yrs < 1970)
632 return -EINVAL;
633
634 leap_yr = ((!(yrs % 4) && (yrs % 100)) || !(yrs % 400));
635
636 if ((mon > 12) || (day == 0))
637 return -EINVAL;
638 if (day > (days_in_mo[mon] + ((mon == 2) && leap_yr)))
639 return -EINVAL;
640 if ((hrs >= 24) || (min >= 60) || (sec >= 60))
641 return -EINVAL;
642
643 if ((yrs -= eH) > 255) /* They are unsigned */
644 return -EINVAL;
645
646
647 return 0;
648 }
649 case RTC_EPOCH_READ: /* Read the epoch. */
650 {
651 return put_user (epoch, (unsigned long *)arg);
652 }
653 case RTC_EPOCH_SET: /* Set the epoch. */
654 {
655 /*
656 * There were no RTC clocks before 1900.
657 */
658 if (arg < 1900)
659 return -EINVAL;
660 if (!capable(CAP_SYS_TIME))
661 return -EACCES;
662
663 epoch = arg;
664 return 0;
665 }
666 default:
667 return -EINVAL;
668 }
669 return copy_to_user((void *)arg, &wtime, sizeof wtime) ? -EFAULT : 0;
670 #endif
671 }
672
673 static const struct file_operations hp_sdc_rtc_fops = {
674 .owner = THIS_MODULE,
675 .llseek = no_llseek,
676 .read = hp_sdc_rtc_read,
677 .poll = hp_sdc_rtc_poll,
678 .ioctl = hp_sdc_rtc_ioctl,
679 .open = hp_sdc_rtc_open,
680 .release = hp_sdc_rtc_release,
681 .fasync = hp_sdc_rtc_fasync,
682 };
683
684 static struct miscdevice hp_sdc_rtc_dev = {
685 .minor = RTC_MINOR,
686 .name = "rtc_HIL",
687 .fops = &hp_sdc_rtc_fops
688 };
689
690 static int __init hp_sdc_rtc_init(void)
691 {
692 int ret;
693
694 init_MUTEX(&i8042tregs);
695
696 if ((ret = hp_sdc_request_timer_irq(&hp_sdc_rtc_isr)))
697 return ret;
698 if (misc_register(&hp_sdc_rtc_dev) != 0)
699 printk(KERN_INFO "Could not register misc. dev for i8042 rtc\n");
700
701 create_proc_read_entry ("driver/rtc", 0, NULL,
702 hp_sdc_rtc_read_proc, NULL);
703
704 printk(KERN_INFO "HP i8042 SDC + MSM-58321 RTC support loaded "
705 "(RTC v " RTC_VERSION ")\n");
706
707 return 0;
708 }
709
710 static void __exit hp_sdc_rtc_exit(void)
711 {
712 remove_proc_entry ("driver/rtc", NULL);
713 misc_deregister(&hp_sdc_rtc_dev);
714 hp_sdc_release_timer_irq(hp_sdc_rtc_isr);
715 printk(KERN_INFO "HP i8042 SDC + MSM-58321 RTC support unloaded\n");
716 }
717
718 module_init(hp_sdc_rtc_init);
719 module_exit(hp_sdc_rtc_exit);
Tomato firmware and modifications.