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allow coexistance of N build and AC build.
[tomato.git] / release / src-rt-6.x / linux / linux-2.6 / drivers / infiniband / hw / mthca / mthca_main.c
blobaa563e61de65cb3fb02f0129290b448dfb529936
1 /*
2 * Copyright (c) 2004, 2005 Topspin Communications. All rights reserved.
3 * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved.
4 * Copyright (c) 2005 Mellanox Technologies. All rights reserved.
5 *
6 * This software is available to you under a choice of one of two
7 * licenses. You may choose to be licensed under the terms of the GNU
8 * General Public License (GPL) Version 2, available from the file
9 * COPYING in the main directory of this source tree, or the
10 * OpenIB.org BSD license below:
11 *
12 * Redistribution and use in source and binary forms, with or
13 * without modification, are permitted provided that the following
14 * conditions are met:
15 *
16 * - Redistributions of source code must retain the above
17 * copyright notice, this list of conditions and the following
18 * disclaimer.
19 *
20 * - Redistributions in binary form must reproduce the above
21 * copyright notice, this list of conditions and the following
22 * disclaimer in the documentation and/or other materials
23 * provided with the distribution.
24 *
25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
26 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
27 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
29 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
32 * SOFTWARE.
33 *
34 * $Id: mthca_main.c 1396 2004-12-28 04:10:27Z roland $
35 */
36
37 #include <linux/module.h>
38 #include <linux/init.h>
39 #include <linux/errno.h>
40 #include <linux/pci.h>
41 #include <linux/interrupt.h>
42
43 #include "mthca_dev.h"
44 #include "mthca_config_reg.h"
45 #include "mthca_cmd.h"
46 #include "mthca_profile.h"
47 #include "mthca_memfree.h"
48
49 MODULE_AUTHOR("Roland Dreier");
50 MODULE_DESCRIPTION("Mellanox InfiniBand HCA low-level driver");
51 MODULE_LICENSE("Dual BSD/GPL");
52 MODULE_VERSION(DRV_VERSION);
53
54 #ifdef CONFIG_INFINIBAND_MTHCA_DEBUG
55
56 int mthca_debug_level = 0;
57 module_param_named(debug_level, mthca_debug_level, int, 0644);
58 MODULE_PARM_DESC(debug_level, "Enable debug tracing if > 0");
59
60 #endif /* CONFIG_INFINIBAND_MTHCA_DEBUG */
61
62 #ifdef CONFIG_PCI_MSI
63
64 static int msi_x = 0;
65 module_param(msi_x, int, 0444);
66 MODULE_PARM_DESC(msi_x, "attempt to use MSI-X if nonzero");
67
68 static int msi = 0;
69 module_param(msi, int, 0444);
70 MODULE_PARM_DESC(msi, "attempt to use MSI if nonzero");
71
72 #else /* CONFIG_PCI_MSI */
73
74 #define msi_x (0)
75 #define msi (0)
76
77 #endif /* CONFIG_PCI_MSI */
78
79 static int tune_pci = 0;
80 module_param(tune_pci, int, 0444);
81 MODULE_PARM_DESC(tune_pci, "increase PCI burst from the default set by BIOS if nonzero");
82
83 DEFINE_MUTEX(mthca_device_mutex);
84
85 #define MTHCA_DEFAULT_NUM_QP (1 << 16)
86 #define MTHCA_DEFAULT_RDB_PER_QP (1 << 2)
87 #define MTHCA_DEFAULT_NUM_CQ (1 << 16)
88 #define MTHCA_DEFAULT_NUM_MCG (1 << 13)
89 #define MTHCA_DEFAULT_NUM_MPT (1 << 17)
90 #define MTHCA_DEFAULT_NUM_MTT (1 << 20)
91 #define MTHCA_DEFAULT_NUM_UDAV (1 << 15)
92 #define MTHCA_DEFAULT_NUM_RESERVED_MTTS (1 << 18)
93 #define MTHCA_DEFAULT_NUM_UARC_SIZE (1 << 18)
94
95 static struct mthca_profile hca_profile = {
96 .num_qp = MTHCA_DEFAULT_NUM_QP,
97 .rdb_per_qp = MTHCA_DEFAULT_RDB_PER_QP,
98 .num_cq = MTHCA_DEFAULT_NUM_CQ,
99 .num_mcg = MTHCA_DEFAULT_NUM_MCG,
100 .num_mpt = MTHCA_DEFAULT_NUM_MPT,
101 .num_mtt = MTHCA_DEFAULT_NUM_MTT,
102 .num_udav = MTHCA_DEFAULT_NUM_UDAV, /* Tavor only */
103 .fmr_reserved_mtts = MTHCA_DEFAULT_NUM_RESERVED_MTTS, /* Tavor only */
104 .uarc_size = MTHCA_DEFAULT_NUM_UARC_SIZE, /* Arbel only */
105 };
106
107 module_param_named(num_qp, hca_profile.num_qp, int, 0444);
108 MODULE_PARM_DESC(num_qp, "maximum number of QPs per HCA");
109
110 module_param_named(rdb_per_qp, hca_profile.rdb_per_qp, int, 0444);
111 MODULE_PARM_DESC(rdb_per_qp, "number of RDB buffers per QP");
112
113 module_param_named(num_cq, hca_profile.num_cq, int, 0444);
114 MODULE_PARM_DESC(num_cq, "maximum number of CQs per HCA");
115
116 module_param_named(num_mcg, hca_profile.num_mcg, int, 0444);
117 MODULE_PARM_DESC(num_mcg, "maximum number of multicast groups per HCA");
118
119 module_param_named(num_mpt, hca_profile.num_mpt, int, 0444);
120 MODULE_PARM_DESC(num_mpt,
121 "maximum number of memory protection table entries per HCA");
122
123 module_param_named(num_mtt, hca_profile.num_mtt, int, 0444);
124 MODULE_PARM_DESC(num_mtt,
125 "maximum number of memory translation table segments per HCA");
126
127 module_param_named(num_udav, hca_profile.num_udav, int, 0444);
128 MODULE_PARM_DESC(num_udav, "maximum number of UD address vectors per HCA");
129
130 module_param_named(fmr_reserved_mtts, hca_profile.fmr_reserved_mtts, int, 0444);
131 MODULE_PARM_DESC(fmr_reserved_mtts,
132 "number of memory translation table segments reserved for FMR");
133
134 static const char mthca_version[] __devinitdata =
135 DRV_NAME ": Mellanox InfiniBand HCA driver v"
136 DRV_VERSION " (" DRV_RELDATE ")\n";
137
138 static int mthca_tune_pci(struct mthca_dev *mdev)
139 {
140 int cap;
141 u16 val;
142
143 if (!tune_pci)
144 return 0;
145
146 /* First try to max out Read Byte Count */
147 cap = pci_find_capability(mdev->pdev, PCI_CAP_ID_PCIX);
148 if (cap) {
149 if (pci_read_config_word(mdev->pdev, cap + PCI_X_CMD, &val)) {
150 mthca_err(mdev, "Couldn't read PCI-X command register, "
151 "aborting.\n");
152 return -ENODEV;
153 }
154 val = (val & ~PCI_X_CMD_MAX_READ) | (3 << 2);
155 if (pci_write_config_word(mdev->pdev, cap + PCI_X_CMD, val)) {
156 mthca_err(mdev, "Couldn't write PCI-X command register, "
157 "aborting.\n");
158 return -ENODEV;
159 }
160 } else if (!(mdev->mthca_flags & MTHCA_FLAG_PCIE))
161 mthca_info(mdev, "No PCI-X capability, not setting RBC.\n");
162
163 cap = pci_find_capability(mdev->pdev, PCI_CAP_ID_EXP);
164 if (cap) {
165 if (pci_read_config_word(mdev->pdev, cap + PCI_EXP_DEVCTL, &val)) {
166 mthca_err(mdev, "Couldn't read PCI Express device control "
167 "register, aborting.\n");
168 return -ENODEV;
169 }
170 val = (val & ~PCI_EXP_DEVCTL_READRQ) | (5 << 12);
171 if (pci_write_config_word(mdev->pdev, cap + PCI_EXP_DEVCTL, val)) {
172 mthca_err(mdev, "Couldn't write PCI Express device control "
173 "register, aborting.\n");
174 return -ENODEV;
175 }
176 } else if (mdev->mthca_flags & MTHCA_FLAG_PCIE)
177 mthca_info(mdev, "No PCI Express capability, "
178 "not setting Max Read Request Size.\n");
179
180 return 0;
181 }
182
183 static int mthca_dev_lim(struct mthca_dev *mdev, struct mthca_dev_lim *dev_lim)
184 {
185 int err;
186 u8 status;
187
188 err = mthca_QUERY_DEV_LIM(mdev, dev_lim, &status);
189 if (err) {
190 mthca_err(mdev, "QUERY_DEV_LIM command failed, aborting.\n");
191 return err;
192 }
193 if (status) {
194 mthca_err(mdev, "QUERY_DEV_LIM returned status 0x%02x, "
195 "aborting.\n", status);
196 return -EINVAL;
197 }
198 if (dev_lim->min_page_sz > PAGE_SIZE) {
199 mthca_err(mdev, "HCA minimum page size of %d bigger than "
200 "kernel PAGE_SIZE of %ld, aborting.\n",
201 dev_lim->min_page_sz, PAGE_SIZE);
202 return -ENODEV;
203 }
204 if (dev_lim->num_ports > MTHCA_MAX_PORTS) {
205 mthca_err(mdev, "HCA has %d ports, but we only support %d, "
206 "aborting.\n",
207 dev_lim->num_ports, MTHCA_MAX_PORTS);
208 return -ENODEV;
209 }
210
211 if (dev_lim->uar_size > pci_resource_len(mdev->pdev, 2)) {
212 mthca_err(mdev, "HCA reported UAR size of 0x%x bigger than "
213 "PCI resource 2 size of 0x%llx, aborting.\n",
214 dev_lim->uar_size,
215 (unsigned long long)pci_resource_len(mdev->pdev, 2));
216 return -ENODEV;
217 }
218
219 mdev->limits.num_ports = dev_lim->num_ports;
220 mdev->limits.vl_cap = dev_lim->max_vl;
221 mdev->limits.mtu_cap = dev_lim->max_mtu;
222 mdev->limits.gid_table_len = dev_lim->max_gids;
223 mdev->limits.pkey_table_len = dev_lim->max_pkeys;
224 mdev->limits.local_ca_ack_delay = dev_lim->local_ca_ack_delay;
225 mdev->limits.max_sg = dev_lim->max_sg;
226 mdev->limits.max_wqes = dev_lim->max_qp_sz;
227 mdev->limits.max_qp_init_rdma = dev_lim->max_requester_per_qp;
228 mdev->limits.reserved_qps = dev_lim->reserved_qps;
229 mdev->limits.max_srq_wqes = dev_lim->max_srq_sz;
230 mdev->limits.reserved_srqs = dev_lim->reserved_srqs;
231 mdev->limits.reserved_eecs = dev_lim->reserved_eecs;
232 mdev->limits.max_desc_sz = dev_lim->max_desc_sz;
233 mdev->limits.max_srq_sge = mthca_max_srq_sge(mdev);
234 /*
235 * Subtract 1 from the limit because we need to allocate a
236 * spare CQE so the HCA HW can tell the difference between an
237 * empty CQ and a full CQ.
238 */
239 mdev->limits.max_cqes = dev_lim->max_cq_sz - 1;
240 mdev->limits.reserved_cqs = dev_lim->reserved_cqs;
241 mdev->limits.reserved_eqs = dev_lim->reserved_eqs;
242 mdev->limits.reserved_mtts = dev_lim->reserved_mtts;
243 mdev->limits.reserved_mrws = dev_lim->reserved_mrws;
244 mdev->limits.reserved_uars = dev_lim->reserved_uars;
245 mdev->limits.reserved_pds = dev_lim->reserved_pds;
246 mdev->limits.port_width_cap = dev_lim->max_port_width;
247 mdev->limits.page_size_cap = ~(u32) (dev_lim->min_page_sz - 1);
248 mdev->limits.flags = dev_lim->flags;
249 /*
250 * For old FW that doesn't return static rate support, use a
251 * value of 0x3 (only static rate values of 0 or 1 are handled),
252 * except on Sinai, where even old FW can handle static rate
253 * values of 2 and 3.
254 */
255 if (dev_lim->stat_rate_support)
256 mdev->limits.stat_rate_support = dev_lim->stat_rate_support;
257 else if (mdev->mthca_flags & MTHCA_FLAG_SINAI_OPT)
258 mdev->limits.stat_rate_support = 0xf;
259 else
260 mdev->limits.stat_rate_support = 0x3;
261
262 /* IB_DEVICE_RESIZE_MAX_WR not supported by driver.
263 May be doable since hardware supports it for SRQ.
264
265 IB_DEVICE_N_NOTIFY_CQ is supported by hardware but not by driver.
266
267 IB_DEVICE_SRQ_RESIZE is supported by hardware but SRQ is not
268 supported by driver. */
269 mdev->device_cap_flags = IB_DEVICE_CHANGE_PHY_PORT |
270 IB_DEVICE_PORT_ACTIVE_EVENT |
271 IB_DEVICE_SYS_IMAGE_GUID |
272 IB_DEVICE_RC_RNR_NAK_GEN;
273
274 if (dev_lim->flags & DEV_LIM_FLAG_BAD_PKEY_CNTR)
275 mdev->device_cap_flags |= IB_DEVICE_BAD_PKEY_CNTR;
276
277 if (dev_lim->flags & DEV_LIM_FLAG_BAD_QKEY_CNTR)
278 mdev->device_cap_flags |= IB_DEVICE_BAD_QKEY_CNTR;
279
280 if (dev_lim->flags & DEV_LIM_FLAG_RAW_MULTI)
281 mdev->device_cap_flags |= IB_DEVICE_RAW_MULTI;
282
283 if (dev_lim->flags & DEV_LIM_FLAG_AUTO_PATH_MIG)
284 mdev->device_cap_flags |= IB_DEVICE_AUTO_PATH_MIG;
285
286 if (dev_lim->flags & DEV_LIM_FLAG_UD_AV_PORT_ENFORCE)
287 mdev->device_cap_flags |= IB_DEVICE_UD_AV_PORT_ENFORCE;
288
289 if (dev_lim->flags & DEV_LIM_FLAG_SRQ)
290 mdev->mthca_flags |= MTHCA_FLAG_SRQ;
291
292 return 0;
293 }
294
295 static int mthca_init_tavor(struct mthca_dev *mdev)
296 {
297 u8 status;
298 int err;
299 struct mthca_dev_lim dev_lim;
300 struct mthca_profile profile;
301 struct mthca_init_hca_param init_hca;
302
303 err = mthca_SYS_EN(mdev, &status);
304 if (err) {
305 mthca_err(mdev, "SYS_EN command failed, aborting.\n");
306 return err;
307 }
308 if (status) {
309 mthca_err(mdev, "SYS_EN returned status 0x%02x, "
310 "aborting.\n", status);
311 return -EINVAL;
312 }
313
314 err = mthca_QUERY_FW(mdev, &status);
315 if (err) {
316 mthca_err(mdev, "QUERY_FW command failed, aborting.\n");
317 goto err_disable;
318 }
319 if (status) {
320 mthca_err(mdev, "QUERY_FW returned status 0x%02x, "
321 "aborting.\n", status);
322 err = -EINVAL;
323 goto err_disable;
324 }
325 err = mthca_QUERY_DDR(mdev, &status);
326 if (err) {
327 mthca_err(mdev, "QUERY_DDR command failed, aborting.\n");
328 goto err_disable;
329 }
330 if (status) {
331 mthca_err(mdev, "QUERY_DDR returned status 0x%02x, "
332 "aborting.\n", status);
333 err = -EINVAL;
334 goto err_disable;
335 }
336
337 err = mthca_dev_lim(mdev, &dev_lim);
338 if (err) {
339 mthca_err(mdev, "QUERY_DEV_LIM command failed, aborting.\n");
340 goto err_disable;
341 }
342
343 profile = hca_profile;
344 profile.num_uar = dev_lim.uar_size / PAGE_SIZE;
345 profile.uarc_size = 0;
346 if (mdev->mthca_flags & MTHCA_FLAG_SRQ)
347 profile.num_srq = dev_lim.max_srqs;
348
349 err = mthca_make_profile(mdev, &profile, &dev_lim, &init_hca);
350 if (err < 0)
351 goto err_disable;
352
353 err = mthca_INIT_HCA(mdev, &init_hca, &status);
354 if (err) {
355 mthca_err(mdev, "INIT_HCA command failed, aborting.\n");
356 goto err_disable;
357 }
358 if (status) {
359 mthca_err(mdev, "INIT_HCA returned status 0x%02x, "
360 "aborting.\n", status);
361 err = -EINVAL;
362 goto err_disable;
363 }
364
365 return 0;
366
367 err_disable:
368 mthca_SYS_DIS(mdev, &status);
369
370 return err;
371 }
372
373 static int mthca_load_fw(struct mthca_dev *mdev)
374 {
375 u8 status;
376 int err;
377
378 /* FIXME: use HCA-attached memory for FW if present */
379
380 mdev->fw.arbel.fw_icm =
381 mthca_alloc_icm(mdev, mdev->fw.arbel.fw_pages,
382 GFP_HIGHUSER | __GFP_NOWARN, 0);
383 if (!mdev->fw.arbel.fw_icm) {
384 mthca_err(mdev, "Couldn't allocate FW area, aborting.\n");
385 return -ENOMEM;
386 }
387
388 err = mthca_MAP_FA(mdev, mdev->fw.arbel.fw_icm, &status);
389 if (err) {
390 mthca_err(mdev, "MAP_FA command failed, aborting.\n");
391 goto err_free;
392 }
393 if (status) {
394 mthca_err(mdev, "MAP_FA returned status 0x%02x, aborting.\n", status);
395 err = -EINVAL;
396 goto err_free;
397 }
398 err = mthca_RUN_FW(mdev, &status);
399 if (err) {
400 mthca_err(mdev, "RUN_FW command failed, aborting.\n");
401 goto err_unmap_fa;
402 }
403 if (status) {
404 mthca_err(mdev, "RUN_FW returned status 0x%02x, aborting.\n", status);
405 err = -EINVAL;
406 goto err_unmap_fa;
407 }
408
409 return 0;
410
411 err_unmap_fa:
412 mthca_UNMAP_FA(mdev, &status);
413
414 err_free:
415 mthca_free_icm(mdev, mdev->fw.arbel.fw_icm, 0);
416 return err;
417 }
418
419 static int mthca_init_icm(struct mthca_dev *mdev,
420 struct mthca_dev_lim *dev_lim,
421 struct mthca_init_hca_param *init_hca,
422 u64 icm_size)
423 {
424 u64 aux_pages;
425 u8 status;
426 int err;
427
428 err = mthca_SET_ICM_SIZE(mdev, icm_size, &aux_pages, &status);
429 if (err) {
430 mthca_err(mdev, "SET_ICM_SIZE command failed, aborting.\n");
431 return err;
432 }
433 if (status) {
434 mthca_err(mdev, "SET_ICM_SIZE returned status 0x%02x, "
435 "aborting.\n", status);
436 return -EINVAL;
437 }
438
439 mthca_dbg(mdev, "%lld KB of HCA context requires %lld KB aux memory.\n",
440 (unsigned long long) icm_size >> 10,
441 (unsigned long long) aux_pages << 2);
442
443 mdev->fw.arbel.aux_icm = mthca_alloc_icm(mdev, aux_pages,
444 GFP_HIGHUSER | __GFP_NOWARN, 0);
445 if (!mdev->fw.arbel.aux_icm) {
446 mthca_err(mdev, "Couldn't allocate aux memory, aborting.\n");
447 return -ENOMEM;
448 }
449
450 err = mthca_MAP_ICM_AUX(mdev, mdev->fw.arbel.aux_icm, &status);
451 if (err) {
452 mthca_err(mdev, "MAP_ICM_AUX command failed, aborting.\n");
453 goto err_free_aux;
454 }
455 if (status) {
456 mthca_err(mdev, "MAP_ICM_AUX returned status 0x%02x, aborting.\n", status);
457 err = -EINVAL;
458 goto err_free_aux;
459 }
460
461 err = mthca_map_eq_icm(mdev, init_hca->eqc_base);
462 if (err) {
463 mthca_err(mdev, "Failed to map EQ context memory, aborting.\n");
464 goto err_unmap_aux;
465 }
466
467 /* CPU writes to non-reserved MTTs, while HCA might DMA to reserved mtts */
468 mdev->limits.reserved_mtts = ALIGN(mdev->limits.reserved_mtts * MTHCA_MTT_SEG_SIZE,
469 dma_get_cache_alignment()) / MTHCA_MTT_SEG_SIZE;
470
471 mdev->mr_table.mtt_table = mthca_alloc_icm_table(mdev, init_hca->mtt_base,
472 MTHCA_MTT_SEG_SIZE,
473 mdev->limits.num_mtt_segs,
474 mdev->limits.reserved_mtts,
475 1, 0);
476 if (!mdev->mr_table.mtt_table) {
477 mthca_err(mdev, "Failed to map MTT context memory, aborting.\n");
478 err = -ENOMEM;
479 goto err_unmap_eq;
480 }
481
482 mdev->mr_table.mpt_table = mthca_alloc_icm_table(mdev, init_hca->mpt_base,
483 dev_lim->mpt_entry_sz,
484 mdev->limits.num_mpts,
485 mdev->limits.reserved_mrws,
486 1, 1);
487 if (!mdev->mr_table.mpt_table) {
488 mthca_err(mdev, "Failed to map MPT context memory, aborting.\n");
489 err = -ENOMEM;
490 goto err_unmap_mtt;
491 }
492
493 mdev->qp_table.qp_table = mthca_alloc_icm_table(mdev, init_hca->qpc_base,
494 dev_lim->qpc_entry_sz,
495 mdev->limits.num_qps,
496 mdev->limits.reserved_qps,
497 0, 0);
498 if (!mdev->qp_table.qp_table) {
499 mthca_err(mdev, "Failed to map QP context memory, aborting.\n");
500 err = -ENOMEM;
501 goto err_unmap_mpt;
502 }
503
504 mdev->qp_table.eqp_table = mthca_alloc_icm_table(mdev, init_hca->eqpc_base,
505 dev_lim->eqpc_entry_sz,
506 mdev->limits.num_qps,
507 mdev->limits.reserved_qps,
508 0, 0);
509 if (!mdev->qp_table.eqp_table) {
510 mthca_err(mdev, "Failed to map EQP context memory, aborting.\n");
511 err = -ENOMEM;
512 goto err_unmap_qp;
513 }
514
515 mdev->qp_table.rdb_table = mthca_alloc_icm_table(mdev, init_hca->rdb_base,
516 MTHCA_RDB_ENTRY_SIZE,
517 mdev->limits.num_qps <<
518 mdev->qp_table.rdb_shift, 0,
519 0, 0);
520 if (!mdev->qp_table.rdb_table) {
521 mthca_err(mdev, "Failed to map RDB context memory, aborting\n");
522 err = -ENOMEM;
523 goto err_unmap_eqp;
524 }
525
526 mdev->cq_table.table = mthca_alloc_icm_table(mdev, init_hca->cqc_base,
527 dev_lim->cqc_entry_sz,
528 mdev->limits.num_cqs,
529 mdev->limits.reserved_cqs,
530 0, 0);
531 if (!mdev->cq_table.table) {
532 mthca_err(mdev, "Failed to map CQ context memory, aborting.\n");
533 err = -ENOMEM;
534 goto err_unmap_rdb;
535 }
536
537 if (mdev->mthca_flags & MTHCA_FLAG_SRQ) {
538 mdev->srq_table.table =
539 mthca_alloc_icm_table(mdev, init_hca->srqc_base,
540 dev_lim->srq_entry_sz,
541 mdev->limits.num_srqs,
542 mdev->limits.reserved_srqs,
543 0, 0);
544 if (!mdev->srq_table.table) {
545 mthca_err(mdev, "Failed to map SRQ context memory, "
546 "aborting.\n");
547 err = -ENOMEM;
548 goto err_unmap_cq;
549 }
550 }
551
552 /*
553 * It's not strictly required, but for simplicity just map the
554 * whole multicast group table now. The table isn't very big
555 * and it's a lot easier than trying to track ref counts.
556 */
557 mdev->mcg_table.table = mthca_alloc_icm_table(mdev, init_hca->mc_base,
558 MTHCA_MGM_ENTRY_SIZE,
559 mdev->limits.num_mgms +
560 mdev->limits.num_amgms,
561 mdev->limits.num_mgms +
562 mdev->limits.num_amgms,
563 0, 0);
564 if (!mdev->mcg_table.table) {
565 mthca_err(mdev, "Failed to map MCG context memory, aborting.\n");
566 err = -ENOMEM;
567 goto err_unmap_srq;
568 }
569
570 return 0;
571
572 err_unmap_srq:
573 if (mdev->mthca_flags & MTHCA_FLAG_SRQ)
574 mthca_free_icm_table(mdev, mdev->srq_table.table);
575
576 err_unmap_cq:
577 mthca_free_icm_table(mdev, mdev->cq_table.table);
578
579 err_unmap_rdb:
580 mthca_free_icm_table(mdev, mdev->qp_table.rdb_table);
581
582 err_unmap_eqp:
583 mthca_free_icm_table(mdev, mdev->qp_table.eqp_table);
584
585 err_unmap_qp:
586 mthca_free_icm_table(mdev, mdev->qp_table.qp_table);
587
588 err_unmap_mpt:
589 mthca_free_icm_table(mdev, mdev->mr_table.mpt_table);
590
591 err_unmap_mtt:
592 mthca_free_icm_table(mdev, mdev->mr_table.mtt_table);
593
594 err_unmap_eq:
595 mthca_unmap_eq_icm(mdev);
596
597 err_unmap_aux:
598 mthca_UNMAP_ICM_AUX(mdev, &status);
599
600 err_free_aux:
601 mthca_free_icm(mdev, mdev->fw.arbel.aux_icm, 0);
602
603 return err;
604 }
605
606 static void mthca_free_icms(struct mthca_dev *mdev)
607 {
608 u8 status;
609
610 mthca_free_icm_table(mdev, mdev->mcg_table.table);
611 if (mdev->mthca_flags & MTHCA_FLAG_SRQ)
612 mthca_free_icm_table(mdev, mdev->srq_table.table);
613 mthca_free_icm_table(mdev, mdev->cq_table.table);
614 mthca_free_icm_table(mdev, mdev->qp_table.rdb_table);
615 mthca_free_icm_table(mdev, mdev->qp_table.eqp_table);
616 mthca_free_icm_table(mdev, mdev->qp_table.qp_table);
617 mthca_free_icm_table(mdev, mdev->mr_table.mpt_table);
618 mthca_free_icm_table(mdev, mdev->mr_table.mtt_table);
619 mthca_unmap_eq_icm(mdev);
620
621 mthca_UNMAP_ICM_AUX(mdev, &status);
622 mthca_free_icm(mdev, mdev->fw.arbel.aux_icm, 0);
623 }
624
625 static int mthca_init_arbel(struct mthca_dev *mdev)
626 {
627 struct mthca_dev_lim dev_lim;
628 struct mthca_profile profile;
629 struct mthca_init_hca_param init_hca;
630 u64 icm_size;
631 u8 status;
632 int err;
633
634 err = mthca_QUERY_FW(mdev, &status);
635 if (err) {
636 mthca_err(mdev, "QUERY_FW command failed, aborting.\n");
637 return err;
638 }
639 if (status) {
640 mthca_err(mdev, "QUERY_FW returned status 0x%02x, "
641 "aborting.\n", status);
642 return -EINVAL;
643 }
644
645 err = mthca_ENABLE_LAM(mdev, &status);
646 if (err) {
647 mthca_err(mdev, "ENABLE_LAM command failed, aborting.\n");
648 return err;
649 }
650 if (status == MTHCA_CMD_STAT_LAM_NOT_PRE) {
651 mthca_dbg(mdev, "No HCA-attached memory (running in MemFree mode)\n");
652 mdev->mthca_flags |= MTHCA_FLAG_NO_LAM;
653 } else if (status) {
654 mthca_err(mdev, "ENABLE_LAM returned status 0x%02x, "
655 "aborting.\n", status);
656 return -EINVAL;
657 }
658
659 err = mthca_load_fw(mdev);
660 if (err) {
661 mthca_err(mdev, "Failed to start FW, aborting.\n");
662 goto err_disable;
663 }
664
665 err = mthca_dev_lim(mdev, &dev_lim);
666 if (err) {
667 mthca_err(mdev, "QUERY_DEV_LIM command failed, aborting.\n");
668 goto err_stop_fw;
669 }
670
671 profile = hca_profile;
672 profile.num_uar = dev_lim.uar_size / PAGE_SIZE;
673 profile.num_udav = 0;
674 if (mdev->mthca_flags & MTHCA_FLAG_SRQ)
675 profile.num_srq = dev_lim.max_srqs;
676
677 icm_size = mthca_make_profile(mdev, &profile, &dev_lim, &init_hca);
678 if ((int) icm_size < 0) {
679 err = icm_size;
680 goto err_stop_fw;
681 }
682
683 err = mthca_init_icm(mdev, &dev_lim, &init_hca, icm_size);
684 if (err)
685 goto err_stop_fw;
686
687 err = mthca_INIT_HCA(mdev, &init_hca, &status);
688 if (err) {
689 mthca_err(mdev, "INIT_HCA command failed, aborting.\n");
690 goto err_free_icm;
691 }
692 if (status) {
693 mthca_err(mdev, "INIT_HCA returned status 0x%02x, "
694 "aborting.\n", status);
695 err = -EINVAL;
696 goto err_free_icm;
697 }
698
699 return 0;
700
701 err_free_icm:
702 mthca_free_icms(mdev);
703
704 err_stop_fw:
705 mthca_UNMAP_FA(mdev, &status);
706 mthca_free_icm(mdev, mdev->fw.arbel.fw_icm, 0);
707
708 err_disable:
709 if (!(mdev->mthca_flags & MTHCA_FLAG_NO_LAM))
710 mthca_DISABLE_LAM(mdev, &status);
711
712 return err;
713 }
714
715 static void mthca_close_hca(struct mthca_dev *mdev)
716 {
717 u8 status;
718
719 mthca_CLOSE_HCA(mdev, 0, &status);
720
721 if (mthca_is_memfree(mdev)) {
722 mthca_free_icms(mdev);
723
724 mthca_UNMAP_FA(mdev, &status);
725 mthca_free_icm(mdev, mdev->fw.arbel.fw_icm, 0);
726
727 if (!(mdev->mthca_flags & MTHCA_FLAG_NO_LAM))
728 mthca_DISABLE_LAM(mdev, &status);
729 } else
730 mthca_SYS_DIS(mdev, &status);
731 }
732
733 static int mthca_init_hca(struct mthca_dev *mdev)
734 {
735 u8 status;
736 int err;
737 struct mthca_adapter adapter;
738
739 if (mthca_is_memfree(mdev))
740 err = mthca_init_arbel(mdev);
741 else
742 err = mthca_init_tavor(mdev);
743
744 if (err)
745 return err;
746
747 err = mthca_QUERY_ADAPTER(mdev, &adapter, &status);
748 if (err) {
749 mthca_err(mdev, "QUERY_ADAPTER command failed, aborting.\n");
750 goto err_close;
751 }
752 if (status) {
753 mthca_err(mdev, "QUERY_ADAPTER returned status 0x%02x, "
754 "aborting.\n", status);
755 err = -EINVAL;
756 goto err_close;
757 }
758
759 mdev->eq_table.inta_pin = adapter.inta_pin;
760 mdev->rev_id = adapter.revision_id;
761 memcpy(mdev->board_id, adapter.board_id, sizeof mdev->board_id);
762
763 return 0;
764
765 err_close:
766 mthca_close_hca(mdev);
767 return err;
768 }
769
770 static int mthca_setup_hca(struct mthca_dev *dev)
771 {
772 int err;
773 u8 status;
774
775 MTHCA_INIT_DOORBELL_LOCK(&dev->doorbell_lock);
776
777 err = mthca_init_uar_table(dev);
778 if (err) {
779 mthca_err(dev, "Failed to initialize "
780 "user access region table, aborting.\n");
781 return err;
782 }
783
784 err = mthca_uar_alloc(dev, &dev->driver_uar);
785 if (err) {
786 mthca_err(dev, "Failed to allocate driver access region, "
787 "aborting.\n");
788 goto err_uar_table_free;
789 }
790
791 dev->kar = ioremap(dev->driver_uar.pfn << PAGE_SHIFT, PAGE_SIZE);
792 if (!dev->kar) {
793 mthca_err(dev, "Couldn't map kernel access region, "
794 "aborting.\n");
795 err = -ENOMEM;
796 goto err_uar_free;
797 }
798
799 err = mthca_init_pd_table(dev);
800 if (err) {
801 mthca_err(dev, "Failed to initialize "
802 "protection domain table, aborting.\n");
803 goto err_kar_unmap;
804 }
805
806 err = mthca_init_mr_table(dev);
807 if (err) {
808 mthca_err(dev, "Failed to initialize "
809 "memory region table, aborting.\n");
810 goto err_pd_table_free;
811 }
812
813 err = mthca_pd_alloc(dev, 1, &dev->driver_pd);
814 if (err) {
815 mthca_err(dev, "Failed to create driver PD, "
816 "aborting.\n");
817 goto err_mr_table_free;
818 }
819
820 err = mthca_init_eq_table(dev);
821 if (err) {
822 mthca_err(dev, "Failed to initialize "
823 "event queue table, aborting.\n");
824 goto err_pd_free;
825 }
826
827 err = mthca_cmd_use_events(dev);
828 if (err) {
829 mthca_err(dev, "Failed to switch to event-driven "
830 "firmware commands, aborting.\n");
831 goto err_eq_table_free;
832 }
833
834 err = mthca_NOP(dev, &status);
835 if (err || status) {
836 mthca_err(dev, "NOP command failed to generate interrupt (IRQ %d), aborting.\n",
837 dev->mthca_flags & MTHCA_FLAG_MSI_X ?
838 dev->eq_table.eq[MTHCA_EQ_CMD].msi_x_vector :
839 dev->pdev->irq);
840 if (dev->mthca_flags & (MTHCA_FLAG_MSI | MTHCA_FLAG_MSI_X))
841 mthca_err(dev, "Try again with MSI/MSI-X disabled.\n");
842 else
843 mthca_err(dev, "BIOS or ACPI interrupt routing problem?\n");
844
845 goto err_cmd_poll;
846 }
847
848 mthca_dbg(dev, "NOP command IRQ test passed\n");
849
850 err = mthca_init_cq_table(dev);
851 if (err) {
852 mthca_err(dev, "Failed to initialize "
853 "completion queue table, aborting.\n");
854 goto err_cmd_poll;
855 }
856
857 err = mthca_init_srq_table(dev);
858 if (err) {
859 mthca_err(dev, "Failed to initialize "
860 "shared receive queue table, aborting.\n");
861 goto err_cq_table_free;
862 }
863
864 err = mthca_init_qp_table(dev);
865 if (err) {
866 mthca_err(dev, "Failed to initialize "
867 "queue pair table, aborting.\n");
868 goto err_srq_table_free;
869 }
870
871 err = mthca_init_av_table(dev);
872 if (err) {
873 mthca_err(dev, "Failed to initialize "
874 "address vector table, aborting.\n");
875 goto err_qp_table_free;
876 }
877
878 err = mthca_init_mcg_table(dev);
879 if (err) {
880 mthca_err(dev, "Failed to initialize "
881 "multicast group table, aborting.\n");
882 goto err_av_table_free;
883 }
884
885 return 0;
886
887 err_av_table_free:
888 mthca_cleanup_av_table(dev);
889
890 err_qp_table_free:
891 mthca_cleanup_qp_table(dev);
892
893 err_srq_table_free:
894 mthca_cleanup_srq_table(dev);
895
896 err_cq_table_free:
897 mthca_cleanup_cq_table(dev);
898
899 err_cmd_poll:
900 mthca_cmd_use_polling(dev);
901
902 err_eq_table_free:
903 mthca_cleanup_eq_table(dev);
904
905 err_pd_free:
906 mthca_pd_free(dev, &dev->driver_pd);
907
908 err_mr_table_free:
909 mthca_cleanup_mr_table(dev);
910
911 err_pd_table_free:
912 mthca_cleanup_pd_table(dev);
913
914 err_kar_unmap:
915 iounmap(dev->kar);
916
917 err_uar_free:
918 mthca_uar_free(dev, &dev->driver_uar);
919
920 err_uar_table_free:
921 mthca_cleanup_uar_table(dev);
922 return err;
923 }
924
925 static int mthca_request_regions(struct pci_dev *pdev, int ddr_hidden)
926 {
927 int err;
928
929 /*
930 * We can't just use pci_request_regions() because the MSI-X
931 * table is right in the middle of the first BAR. If we did
932 * pci_request_region and grab all of the first BAR, then
933 * setting up MSI-X would fail, since the PCI core wants to do
934 * request_mem_region on the MSI-X vector table.
935 *
936 * So just request what we need right now, and request any
937 * other regions we need when setting up EQs.
938 */
939 if (!request_mem_region(pci_resource_start(pdev, 0) + MTHCA_HCR_BASE,
940 MTHCA_HCR_SIZE, DRV_NAME))
941 return -EBUSY;
942
943 err = pci_request_region(pdev, 2, DRV_NAME);
944 if (err)
945 goto err_bar2_failed;
946
947 if (!ddr_hidden) {
948 err = pci_request_region(pdev, 4, DRV_NAME);
949 if (err)
950 goto err_bar4_failed;
951 }
952
953 return 0;
954
955 err_bar4_failed:
956 pci_release_region(pdev, 2);
957
958 err_bar2_failed:
959 release_mem_region(pci_resource_start(pdev, 0) + MTHCA_HCR_BASE,
960 MTHCA_HCR_SIZE);
961
962 return err;
963 }
964
965 static void mthca_release_regions(struct pci_dev *pdev,
966 int ddr_hidden)
967 {
968 if (!ddr_hidden)
969 pci_release_region(pdev, 4);
970
971 pci_release_region(pdev, 2);
972
973 release_mem_region(pci_resource_start(pdev, 0) + MTHCA_HCR_BASE,
974 MTHCA_HCR_SIZE);
975 }
976
977 static int mthca_enable_msi_x(struct mthca_dev *mdev)
978 {
979 struct msix_entry entries[3];
980 int err;
981
982 entries[0].entry = 0;
983 entries[1].entry = 1;
984 entries[2].entry = 2;
985
986 err = pci_enable_msix(mdev->pdev, entries, ARRAY_SIZE(entries));
987 if (err) {
988 if (err > 0)
989 mthca_info(mdev, "Only %d MSI-X vectors available, "
990 "not using MSI-X\n", err);
991 return err;
992 }
993
994 mdev->eq_table.eq[MTHCA_EQ_COMP ].msi_x_vector = entries[0].vector;
995 mdev->eq_table.eq[MTHCA_EQ_ASYNC].msi_x_vector = entries[1].vector;
996 mdev->eq_table.eq[MTHCA_EQ_CMD ].msi_x_vector = entries[2].vector;
997
998 return 0;
999 }
1000
1001 /* Types of supported HCA */
1002 enum {
1003 TAVOR, /* MT23108 */
1004 ARBEL_COMPAT, /* MT25208 in Tavor compat mode */
1005 ARBEL_NATIVE, /* MT25208 with extended features */
1006 SINAI /* MT25204 */
1007 };
1008
1009 #define MTHCA_FW_VER(major, minor, subminor) \
1010 (((u64) (major) << 32) | ((u64) (minor) << 16) | (u64) (subminor))
1011
1012 static struct {
1013 u64 latest_fw;
1014 u32 flags;
1015 } mthca_hca_table[] = {
1016 [TAVOR] = { .latest_fw = MTHCA_FW_VER(3, 5, 0),
1017 .flags = 0 },
1018 [ARBEL_COMPAT] = { .latest_fw = MTHCA_FW_VER(4, 8, 200),
1019 .flags = MTHCA_FLAG_PCIE },
1020 [ARBEL_NATIVE] = { .latest_fw = MTHCA_FW_VER(5, 2, 0),
1021 .flags = MTHCA_FLAG_MEMFREE |
1022 MTHCA_FLAG_PCIE },
1023 [SINAI] = { .latest_fw = MTHCA_FW_VER(1, 2, 0),
1024 .flags = MTHCA_FLAG_MEMFREE |
1025 MTHCA_FLAG_PCIE |
1026 MTHCA_FLAG_SINAI_OPT }
1027 };
1028
1029 static int __mthca_init_one(struct pci_dev *pdev, int hca_type)
1030 {
1031 int ddr_hidden = 0;
1032 int err;
1033 struct mthca_dev *mdev;
1034
1035 printk(KERN_INFO PFX "Initializing %s\n",
1036 pci_name(pdev));
1037
1038 err = pci_enable_device(pdev);
1039 if (err) {
1040 dev_err(&pdev->dev, "Cannot enable PCI device, "
1041 "aborting.\n");
1042 return err;
1043 }
1044
1045 /*
1046 * Check for BARs. We expect 0: 1MB, 2: 8MB, 4: DDR (may not
1047 * be present)
1048 */
1049 if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM) ||
1050 pci_resource_len(pdev, 0) != 1 << 20) {
1051 dev_err(&pdev->dev, "Missing DCS, aborting.\n");
1052 err = -ENODEV;
1053 goto err_disable_pdev;
1054 }
1055 if (!(pci_resource_flags(pdev, 2) & IORESOURCE_MEM)) {
1056 dev_err(&pdev->dev, "Missing UAR, aborting.\n");
1057 err = -ENODEV;
1058 goto err_disable_pdev;
1059 }
1060 if (!(pci_resource_flags(pdev, 4) & IORESOURCE_MEM))
1061 ddr_hidden = 1;
1062
1063 err = mthca_request_regions(pdev, ddr_hidden);
1064 if (err) {
1065 dev_err(&pdev->dev, "Cannot obtain PCI resources, "
1066 "aborting.\n");
1067 goto err_disable_pdev;
1068 }
1069
1070 pci_set_master(pdev);
1071
1072 err = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
1073 if (err) {
1074 dev_warn(&pdev->dev, "Warning: couldn't set 64-bit PCI DMA mask.\n");
1075 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
1076 if (err) {
1077 dev_err(&pdev->dev, "Can't set PCI DMA mask, aborting.\n");
1078 goto err_free_res;
1079 }
1080 }
1081 err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK);
1082 if (err) {
1083 dev_warn(&pdev->dev, "Warning: couldn't set 64-bit "
1084 "consistent PCI DMA mask.\n");
1085 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
1086 if (err) {
1087 dev_err(&pdev->dev, "Can't set consistent PCI DMA mask, "
1088 "aborting.\n");
1089 goto err_free_res;
1090 }
1091 }
1092
1093 mdev = (struct mthca_dev *) ib_alloc_device(sizeof *mdev);
1094 if (!mdev) {
1095 dev_err(&pdev->dev, "Device struct alloc failed, "
1096 "aborting.\n");
1097 err = -ENOMEM;
1098 goto err_free_res;
1099 }
1100
1101 mdev->pdev = pdev;
1102
1103 mdev->mthca_flags = mthca_hca_table[hca_type].flags;
1104 if (ddr_hidden)
1105 mdev->mthca_flags |= MTHCA_FLAG_DDR_HIDDEN;
1106
1107 /*
1108 * Now reset the HCA before we touch the PCI capabilities or
1109 * attempt a firmware command, since a boot ROM may have left
1110 * the HCA in an undefined state.
1111 */
1112 err = mthca_reset(mdev);
1113 if (err) {
1114 mthca_err(mdev, "Failed to reset HCA, aborting.\n");
1115 goto err_free_dev;
1116 }
1117
1118 if (msi_x && !mthca_enable_msi_x(mdev))
1119 mdev->mthca_flags |= MTHCA_FLAG_MSI_X;
1120 if (msi && !(mdev->mthca_flags & MTHCA_FLAG_MSI_X) &&
1121 !pci_enable_msi(pdev))
1122 mdev->mthca_flags |= MTHCA_FLAG_MSI;
1123
1124 if (mthca_cmd_init(mdev)) {
1125 mthca_err(mdev, "Failed to init command interface, aborting.\n");
1126 goto err_free_dev;
1127 }
1128
1129 err = mthca_tune_pci(mdev);
1130 if (err)
1131 goto err_cmd;
1132
1133 err = mthca_init_hca(mdev);
1134 if (err)
1135 goto err_cmd;
1136
1137 if (mdev->fw_ver < mthca_hca_table[hca_type].latest_fw) {
1138 mthca_warn(mdev, "HCA FW version %d.%d.%3d is old (%d.%d.%3d is current).\n",
1139 (int) (mdev->fw_ver >> 32), (int) (mdev->fw_ver >> 16) & 0xffff,
1140 (int) (mdev->fw_ver & 0xffff),
1141 (int) (mthca_hca_table[hca_type].latest_fw >> 32),
1142 (int) (mthca_hca_table[hca_type].latest_fw >> 16) & 0xffff,
1143 (int) (mthca_hca_table[hca_type].latest_fw & 0xffff));
1144 mthca_warn(mdev, "If you have problems, try updating your HCA FW.\n");
1145 }
1146
1147 err = mthca_setup_hca(mdev);
1148 if (err)
1149 goto err_close;
1150
1151 err = mthca_register_device(mdev);
1152 if (err)
1153 goto err_cleanup;
1154
1155 err = mthca_create_agents(mdev);
1156 if (err)
1157 goto err_unregister;
1158
1159 pci_set_drvdata(pdev, mdev);
1160 mdev->hca_type = hca_type;
1161
1162 return 0;
1163
1164 err_unregister:
1165 mthca_unregister_device(mdev);
1166
1167 err_cleanup:
1168 mthca_cleanup_mcg_table(mdev);
1169 mthca_cleanup_av_table(mdev);
1170 mthca_cleanup_qp_table(mdev);
1171 mthca_cleanup_srq_table(mdev);
1172 mthca_cleanup_cq_table(mdev);
1173 mthca_cmd_use_polling(mdev);
1174 mthca_cleanup_eq_table(mdev);
1175
1176 mthca_pd_free(mdev, &mdev->driver_pd);
1177
1178 mthca_cleanup_mr_table(mdev);
1179 mthca_cleanup_pd_table(mdev);
1180 mthca_cleanup_uar_table(mdev);
1181
1182 err_close:
1183 mthca_close_hca(mdev);
1184
1185 err_cmd:
1186 mthca_cmd_cleanup(mdev);
1187
1188 err_free_dev:
1189 if (mdev->mthca_flags & MTHCA_FLAG_MSI_X)
1190 pci_disable_msix(pdev);
1191 if (mdev->mthca_flags & MTHCA_FLAG_MSI)
1192 pci_disable_msi(pdev);
1193
1194 ib_dealloc_device(&mdev->ib_dev);
1195
1196 err_free_res:
1197 mthca_release_regions(pdev, ddr_hidden);
1198
1199 err_disable_pdev:
1200 pci_disable_device(pdev);
1201 pci_set_drvdata(pdev, NULL);
1202 return err;
1203 }
1204
1205 static void __mthca_remove_one(struct pci_dev *pdev)
1206 {
1207 struct mthca_dev *mdev = pci_get_drvdata(pdev);
1208 u8 status;
1209 int p;
1210
1211 if (mdev) {
1212 mthca_free_agents(mdev);
1213 mthca_unregister_device(mdev);
1214
1215 for (p = 1; p <= mdev->limits.num_ports; ++p)
1216 mthca_CLOSE_IB(mdev, p, &status);
1217
1218 mthca_cleanup_mcg_table(mdev);
1219 mthca_cleanup_av_table(mdev);
1220 mthca_cleanup_qp_table(mdev);
1221 mthca_cleanup_srq_table(mdev);
1222 mthca_cleanup_cq_table(mdev);
1223 mthca_cmd_use_polling(mdev);
1224 mthca_cleanup_eq_table(mdev);
1225
1226 mthca_pd_free(mdev, &mdev->driver_pd);
1227
1228 mthca_cleanup_mr_table(mdev);
1229 mthca_cleanup_pd_table(mdev);
1230
1231 iounmap(mdev->kar);
1232 mthca_uar_free(mdev, &mdev->driver_uar);
1233 mthca_cleanup_uar_table(mdev);
1234 mthca_close_hca(mdev);
1235 mthca_cmd_cleanup(mdev);
1236
1237 if (mdev->mthca_flags & MTHCA_FLAG_MSI_X)
1238 pci_disable_msix(pdev);
1239 if (mdev->mthca_flags & MTHCA_FLAG_MSI)
1240 pci_disable_msi(pdev);
1241
1242 ib_dealloc_device(&mdev->ib_dev);
1243 mthca_release_regions(pdev, mdev->mthca_flags &
1244 MTHCA_FLAG_DDR_HIDDEN);
1245 pci_disable_device(pdev);
1246 pci_set_drvdata(pdev, NULL);
1247 }
1248 }
1249
1250 int __mthca_restart_one(struct pci_dev *pdev)
1251 {
1252 struct mthca_dev *mdev;
1253 int hca_type;
1254
1255 mdev = pci_get_drvdata(pdev);
1256 if (!mdev)
1257 return -ENODEV;
1258 hca_type = mdev->hca_type;
1259 __mthca_remove_one(pdev);
1260 return __mthca_init_one(pdev, hca_type);
1261 }
1262
1263 static int __devinit mthca_init_one(struct pci_dev *pdev,
1264 const struct pci_device_id *id)
1265 {
1266 static int mthca_version_printed = 0;
1267 int ret;
1268
1269 mutex_lock(&mthca_device_mutex);
1270
1271 if (!mthca_version_printed) {
1272 printk(KERN_INFO "%s", mthca_version);
1273 ++mthca_version_printed;
1274 }
1275
1276 if (id->driver_data >= ARRAY_SIZE(mthca_hca_table)) {
1277 printk(KERN_ERR PFX "%s has invalid driver data %lx\n",
1278 pci_name(pdev), id->driver_data);
1279 mutex_unlock(&mthca_device_mutex);
1280 return -ENODEV;
1281 }
1282
1283 ret = __mthca_init_one(pdev, id->driver_data);
1284
1285 mutex_unlock(&mthca_device_mutex);
1286
1287 return ret;
1288 }
1289
1290 static void __devexit mthca_remove_one(struct pci_dev *pdev)
1291 {
1292 mutex_lock(&mthca_device_mutex);
1293 __mthca_remove_one(pdev);
1294 mutex_unlock(&mthca_device_mutex);
1295 }
1296
1297 static struct pci_device_id mthca_pci_table[] = {
1298 { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_TAVOR),
1299 .driver_data = TAVOR },
1300 { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_TAVOR),
1301 .driver_data = TAVOR },
1302 { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_ARBEL_COMPAT),
1303 .driver_data = ARBEL_COMPAT },
1304 { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_ARBEL_COMPAT),
1305 .driver_data = ARBEL_COMPAT },
1306 { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_ARBEL),
1307 .driver_data = ARBEL_NATIVE },
1308 { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_ARBEL),
1309 .driver_data = ARBEL_NATIVE },
1310 { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_SINAI),
1311 .driver_data = SINAI },
1312 { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_SINAI),
1313 .driver_data = SINAI },
1314 { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_SINAI_OLD),
1315 .driver_data = SINAI },
1316 { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_SINAI_OLD),
1317 .driver_data = SINAI },
1318 { 0, }
1319 };
1320
1321 MODULE_DEVICE_TABLE(pci, mthca_pci_table);
1322
1323 static struct pci_driver mthca_driver = {
1324 .name = DRV_NAME,
1325 .id_table = mthca_pci_table,
1326 .probe = mthca_init_one,
1327 .remove = __devexit_p(mthca_remove_one)
1328 };
1329
1330 static void __init __mthca_check_profile_val(const char *name, int *pval,
1331 int pval_default)
1332 {
1333 /* value must be positive and power of 2 */
1334 int old_pval = *pval;
1335
1336 if (old_pval <= 0)
1337 *pval = pval_default;
1338 else
1339 *pval = roundup_pow_of_two(old_pval);
1340
1341 if (old_pval != *pval) {
1342 printk(KERN_WARNING PFX "Invalid value %d for %s in module parameter.\n",
1343 old_pval, name);
1344 printk(KERN_WARNING PFX "Corrected %s to %d.\n", name, *pval);
1345 }
1346 }
1347
1348 #define mthca_check_profile_val(name, default) \
1349 __mthca_check_profile_val(#name, &hca_profile.name, default)
1350
1351 static void __init mthca_validate_profile(void)
1352 {
1353 mthca_check_profile_val(num_qp, MTHCA_DEFAULT_NUM_QP);
1354 mthca_check_profile_val(rdb_per_qp, MTHCA_DEFAULT_RDB_PER_QP);
1355 mthca_check_profile_val(num_cq, MTHCA_DEFAULT_NUM_CQ);
1356 mthca_check_profile_val(num_mcg, MTHCA_DEFAULT_NUM_MCG);
1357 mthca_check_profile_val(num_mpt, MTHCA_DEFAULT_NUM_MPT);
1358 mthca_check_profile_val(num_mtt, MTHCA_DEFAULT_NUM_MTT);
1359 mthca_check_profile_val(num_udav, MTHCA_DEFAULT_NUM_UDAV);
1360 mthca_check_profile_val(fmr_reserved_mtts, MTHCA_DEFAULT_NUM_RESERVED_MTTS);
1361
1362 if (hca_profile.fmr_reserved_mtts >= hca_profile.num_mtt) {
1363 printk(KERN_WARNING PFX "Invalid fmr_reserved_mtts module parameter %d.\n",
1364 hca_profile.fmr_reserved_mtts);
1365 printk(KERN_WARNING PFX "(Must be smaller than num_mtt %d)\n",
1366 hca_profile.num_mtt);
1367 hca_profile.fmr_reserved_mtts = hca_profile.num_mtt / 2;
1368 printk(KERN_WARNING PFX "Corrected fmr_reserved_mtts to %d.\n",
1369 hca_profile.fmr_reserved_mtts);
1370 }
1371 }
1372
1373 static int __init mthca_init(void)
1374 {
1375 int ret;
1376
1377 mthca_validate_profile();
1378
1379 ret = mthca_catas_init();
1380 if (ret)
1381 return ret;
1382
1383 ret = pci_register_driver(&mthca_driver);
1384 if (ret < 0) {
1385 mthca_catas_cleanup();
1386 return ret;
1387 }
1388
1389 return 0;
1390 }
1391
1392 static void __exit mthca_cleanup(void)
1393 {
1394 pci_unregister_driver(&mthca_driver);
1395 mthca_catas_cleanup();
1396 }
1397
1398 module_init(mthca_init);
1399 module_exit(mthca_cleanup);
Tomato firmware and modifications.