release/src-rt-6.x/linux/linux-2.6/arch/arm/mach-footbridge/dc21285-timer.c

   1 /*
   2  *  linux/arch/arm/mach-footbridge/dc21285-timer.c
   3  *
   4  *  Copyright (C) 1998 Russell King.
   5  *  Copyright (C) 1998 Phil Blundell
   6  */
   7 #include <linux/init.h>
   8 #include <linux/interrupt.h>
   9 #include <linux/irq.h>
  10
  11 #include <asm/irq.h>
  12
  13 #include <asm/hardware/dec21285.h>
  14 #include <asm/mach/time.h>
  15
  16 #include "common.h"
  17
  18 /*
  19  * Footbridge timer 1 support.
  20  */
  21 static unsigned long timer1_latch;
  22
  23 static unsigned long timer1_gettimeoffset (void)
  24 {
  25         unsigned long value = timer1_latch - *CSR_TIMER1_VALUE;
  26
  27         return ((tick_nsec / 1000) * value) / timer1_latch;
  28 }
  29
  30 static irqreturn_t
  31 timer1_interrupt(int irq, void *dev_id)
  32 {
  33         write_seqlock(&xtime_lock);
  34
  35         *CSR_TIMER1_CLR = 0;
  36
  37         timer_tick();
  38
  39         write_sequnlock(&xtime_lock);
  40
  41         return IRQ_HANDLED;
  42 }
  43
  44 static struct irqaction footbridge_timer_irq = {
  45         .name           = "Timer1 timer tick",
  46         .handler        = timer1_interrupt,
  47         .flags          = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
  48 };
  49
  50 /*
  51  * Set up timer interrupt.
  52  */
  53 static void __init footbridge_timer_init(void)
  54 {
  55         timer1_latch = (mem_fclk_21285 + 8 * HZ) / (16 * HZ);
  56
  57         *CSR_TIMER1_CLR  = 0;
  58         *CSR_TIMER1_LOAD = timer1_latch;
  59         *CSR_TIMER1_CNTL = TIMER_CNTL_ENABLE | TIMER_CNTL_AUTORELOAD | TIMER_CNTL_DIV16;
  60
  61         setup_irq(IRQ_TIMER1, &footbridge_timer_irq);
  62
  63         isa_rtc_init();
  64 }
  65
  66 struct sys_timer footbridge_timer = {
  67         .init           = footbridge_timer_init,
  68         .offset         = timer1_gettimeoffset,
  69 };