release/src-rt-6.x/cfe/cfe/arch/mips/board/bcm1250cpci/src/bcm1250cpci_devs.c

   1 /*  *********************************************************************
   2     *  Broadcom Common Firmware Environment (CFE)
   3     *
   4     *  Board device initialization              File: bcm1250cpci_devs.c
   5     *
   6     *  This is the "C" part of the board support package.  The
   7     *  routines to create and initialize the console, wire up
   8     *  device drivers, and do other customization live here.
   9     *
  10     *  Author:  Mitch Lichtenberg (mpl@broadcom.com)
  11     *
  12     *********************************************************************
  13     *
  14     *  Copyright 2000,2001,2002,2003
  15     *  Broadcom Corporation. All rights reserved.
  16     *
  17     *  This software is furnished under license and may be used and
  18     *  copied only in accordance with the following terms and
  19     *  conditions.  Subject to these conditions, you may download,
  20     *  copy, install, use, modify and distribute modified or unmodified
  21     *  copies of this software in source and/or binary form.  No title
  22     *  or ownership is transferred hereby.
  23     *
  24     *  1) Any source code used, modified or distributed must reproduce
  25     *     and retain this copyright notice and list of conditions
  26     *     as they appear in the source file.
  27     *
  28     *  2) No right is granted to use any trade name, trademark, or
  29     *     logo of Broadcom Corporation.  The "Broadcom Corporation"
  30     *     name may not be used to endorse or promote products derived
  31     *     from this software without the prior written permission of
  32     *     Broadcom Corporation.
  33     *
  34     *  3) THIS SOFTWARE IS PROVIDED "AS-IS" AND ANY EXPRESS OR
  35     *     IMPLIED WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED
  36     *     WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
  37     *     PURPOSE, OR NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT
  38     *     SHALL BROADCOM BE LIABLE FOR ANY DAMAGES WHATSOEVER, AND IN
  39     *     PARTICULAR, BROADCOM SHALL NOT BE LIABLE FOR DIRECT, INDIRECT,
  40     *     INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  41     *     (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
  42     *     GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
  43     *     BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
  44     *     OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
  45     *     TORT (INCLUDING NEGLIGENCE OR OTHERWISE), EVEN IF ADVISED OF
  46     *     THE POSSIBILITY OF SUCH DAMAGE.
  47     ********************************************************************* */
  48
  49
  50
  51 #include "sbmips.h"
  52 #include "lib_types.h"
  53 #include "lib_queue.h"
  54 #include "lib_printf.h"
  55 #include "cfe_iocb.h"
  56 #include "cfe_device.h"
  57 #include "cfe_timer.h"
  58 #include "env_subr.h"
  59 #include "cfe.h"
  60
  61 #include "sb1250_defs.h"
  62 #include "sb1250_regs.h"
  63 #include "sb1250_pci.h"
  64 #include "sb1250_ldt.h"
  65 #include "sb1250_scd.h"
  66 #include "sb1250_smbus.h"
  67 #include "dev_ide.h"
  68 #include "dev_newflash.h"
  69
  70 #include "bsp_config.h"
  71
  72 #include "bcm1250cpci.h"
  73
  74
  75 /*  *********************************************************************
  76     *  Devices we're importing
  77     ********************************************************************* */
  78
  79 extern cfe_driver_t promice_uart;               /* promice serial port */
  80 extern cfe_driver_t sb1250_uart;                /* SB1250 serial ports */
  81 extern cfe_driver_t sb1250_ether;               /* SB1250 MACs */
  82 extern cfe_driver_t sb1250_x1240eeprom;         /* Xicor SMBus NVRAM */
  83 extern cfe_driver_t sb1250_24lc128eeprom;       /* Microchip EEPROM */
  84 extern cfe_driver_t newflashdrv;                /* AMD-style flash */
  85 extern cfe_driver_t idedrv;                     /* IDE disk */
  86 extern cfe_driver_t pcmciadrv;                  /* PCMCIA card */
  87 extern cfe_driver_t x1241_clock;                /* Xicor SMBus RTC */
  88 extern cfe_driver_t m41t81_clock;               /* M41T81 SMBus RTC */
  89
  90 extern cfe_driver_t sb1250_pcihost;             /* driver for host downloads */
  91 #if CFG_PCI
  92 extern cfe_driver_t pciidedrv;                  /* PCI IDE controller */
  93 extern cfe_driver_t dc21143drv;                 /* Tulip Ethernet */
  94 #if CFG_DOWNLOAD
  95 extern cfe_driver_t bcm1250drv;                 /* BCM1250 as a device */
  96 #endif
  97 #endif
  98
  99 extern int ui_init_cpu1cmds(void);
 100 extern int ui_init_bcm1250cpcicmds(void);
 101 extern int ui_init_usbcmds(void);
 102 extern int ui_init_corecmds(void);
 103 extern int ui_init_soccmds(void);
 104 extern int ui_init_testcmds(void);
 105 extern int ui_init_toyclockcmds(void);
 106 extern int ui_init_tempsensorcmds(void);
 107 extern int ui_init_memtestcmds(void);
 108 extern int ui_init_resetcmds(void);
 109 extern int ui_init_phycmds(void);
 110
 111 extern int cfe_device_download(int boot, char *options);
 112
 113 extern void sb1250_show_cpu_type(void);
 114
 115 /*  *********************************************************************
 116     *  Some board-specific parameters
 117     ********************************************************************* */
 118
 119 /*
 120  * Note!  Configure the PROMICE for burst mode zero (one byte per
 121  * access).
 122  */
 123
 124 #define PROMICE_BASE    (0x1FDFFC00)
 125 #define PROMICE_WORDSIZE 1
 126
 127 #define REAL_BOOTROM_SIZE       (2*1024*1024)   /* region is 4MB, but rom is 2MB */
 128
 129 /*  *********************************************************************
 130     *  SysConfig switch settings and related parameters
 131     ********************************************************************* */
 132
 133 int bcm1250cpci_board_rev;
 134 int bcm1250cpci_config_switch;
 135
 136 #define SWARM_PROMICE_CONSOLE   0x00000001
 137 #define DEVICE_DOWNLOAD         0x00000002
 138 #define DEVICE_EXECUTE          0x00000004
 139 #define DEVICE_REBOOT           (DEVICE_DOWNLOAD|DEVICE_EXECUTE)
 140
 141 const unsigned int bcm1250cpci_startflags[16] = {
 142     0,                                          /* 0 : UART console, no PCI */
 143     SWARM_PROMICE_CONSOLE,                      /* 1 : PromICE console, no PCI */
 144     CFE_INIT_PCI,                               /* 2 : UART console, PCI */
 145     CFE_INIT_PCI | SWARM_PROMICE_CONSOLE,       /* 3 : PromICE console, PCI */
 146     0,                                          /* 4 : unused  */
 147     0,                                          /* 5 : unused */
 148     CFE_INIT_PCI | CFE_LDT_SLAVE,               /* 6 : 2, plus LDT slave mode */
 149     CFE_INIT_SAFE,                              /* 7 : UART console, no pci, safe mode */
 150     CFE_INIT_PCI | DEVICE_DOWNLOAD,             /* 8 : UART console, PCI, download */
 151     CFE_INIT_PCI | DEVICE_REBOOT,               /* 9 : UART console, PCI, reboot */
 152     0,                                          /* 10 : unused */
 153     0,                                          /* 11 : unused */
 154     0,                                          /* 12 : unused */
 155     0,                                          /* 13 : unused */
 156     0,                                          /* 14 : unused */
 157     0,                                          /* 15 : unused */
 158 };
 159
 160
 161 unsigned int cpu_revision;
 162
 163 #define SB1250_PASS1 (V_SYS_PART(K_SYS_PART_SB1250) | V_SYS_REVISION(K_SYS_REVISION_PASS1))
 164 #define SB1250_PASS2 (V_SYS_PART(K_SYS_PART_SB1250) | V_SYS_REVISION(K_SYS_REVISION_PASS2))
 165
 166 /*  *********************************************************************
 167     *  board_console_init()
 168     *
 169     *  Add the console device and set it to be the primary
 170     *  console.
 171     *
 172     *  Input parameters:
 173     *      nothing
 174     *
 175     *  Return value:
 176     *      nothing
 177     ********************************************************************* */
 178
 179 void board_console_init(void)
 180 {
 181     uint64_t syscfg;
 182     int plldiv;
 183
 184     syscfg = SBREADCSR(A_SCD_SYSTEM_CFG);
 185
 186     cpu_revision = (unsigned int) (SBREADCSR(A_SCD_SYSTEM_REVISION) &
 187                                    (M_SYS_PART | M_SYS_REVISION));
 188
 189     /* Console */
 190     cfe_add_device(&sb1250_uart,A_DUART,0,0);                           /* BCM 1250 UART A */
 191     cfe_add_device(&promice_uart,PROMICE_BASE,PROMICE_WORDSIZE,0);      /* External PROMICE UART */
 192
 193     /*
 194      * Read the config switch and decide how we are going to set up
 195      * the console.  This is actually board revision dependent.
 196      *
 197      * Note that the human-readable board revision is (swarm_board_rev+1).
 198      */
 199
 200     bcm1250cpci_board_rev = G_SYS_CONFIG(syscfg) & 0x3;
 201
 202     bcm1250cpci_config_switch = (G_SYS_CONFIG(syscfg) >> 2) & 0x0F;
 203
 204     cfe_startflags = bcm1250cpci_startflags[bcm1250cpci_config_switch];
 205
 206     if (cfe_startflags & SWARM_PROMICE_CONSOLE) {
 207         cfe_set_console("promice0");
 208         }
 209     else {
 210         cfe_set_console("uart0");
 211         }
 212
 213     /*
 214      * Set variable that contains CPU speed, spit out config register
 215      */
 216
 217     plldiv = G_SYS_PLL_DIV(syscfg);
 218     if (plldiv == 0) {
 219         plldiv = 6;
 220         }
 221
 222 #ifdef _FUNCSIM_
 223     cfe_cpu_speed = 500000;                                     /* wire func sim at 500KHz */
 224 #else
 225     cfe_cpu_speed = 50000000 * plldiv;          /* use PLL divisor */
 226 #endif
 227
 228     /*
 229      * NVRAM (environment variables
 230          In the first version of the board, The Xicor X1240 was suppose to be the NVRAM.
 231          Due to the part being obsoleted, It was decided to give up boot capability from the
 232          EEPROM to allow for a consistent NVRAM storage area
 233      */
 234
 235     cfe_add_device(&sb1250_24lc128eeprom,M24LC128_0_SMBUS_CHAN,M24LC128_0_SMBUS_DEV,0);
 236     cfe_set_envdevice("eeprom0");                       /* Connect NVRAM subsystem to EEPROM */
 237
 238 }
 239
 240
 241
 242 /*  *********************************************************************
 243     *  board_device_init()
 244     *
 245     *  Initialize and add other devices.  Add everything you need
 246     *  for bootstrap here, like disk drives, flash memory, UARTs,
 247     *  network controllers, etc.
 248     *
 249     *  Input parameters:
 250     *      nothing
 251     *
 252     *  Return value:
 253     *      nothing
 254     ********************************************************************* */
 255
 256 void board_device_init(void)
 257 {
 258     /*
 259      * Print out the board version number.
 260      */
 261     printf("%s board revision %d\n", CFG_BOARDNAME, bcm1250cpci_board_rev + 1);
 262
 263     /*
 264      * UART channel B
 265      */
 266
 267     cfe_add_device(&sb1250_uart,A_DUART,1,0);
 268
 269     /*
 270      * Boot ROM
 271      */
 272
 273     cfe_add_device(&newflashdrv,
 274                    BOOTROM_PHYS,
 275                    (BOOTROM_SIZE*K64) | FLASH_FLG_BUS8 | FLASH_FLG_DEV16,
 276                    NULL);
 277     cfe_add_device(&newflashdrv,
 278                    ALT_BOOTROM_PHYS,
 279                    (ALT_BOOTROM_SIZE*K64) | FLASH_FLG_BUS8 | FLASH_FLG_DEV16,
 280                    NULL);
 281 #ifdef _FUNCSIM_
 282     cfe_add_device(&newflashdrv,0x11000000,64*1024*1024,NULL);
 283 #endif
 284
 285
 286         /*
 287         Add Second EEPROM if not board rev 0
 288         NOTE: Board rev 0 has the Xicor X1251 clock chip
 289         NOTE: Board rev 1 has a second 24lc128 chip
 290         */
 291     switch (bcm1250cpci_board_rev) {
 292         case 0:
 293     cfe_add_device(&sb1250_x1240eeprom,X1240_SMBUS_CHAN,X1240_SMBUS_DEV,0);
 294         break;
 295
 296         default:
 297     cfe_add_device(&sb1250_24lc128eeprom,M24LC128_1_SMBUS_CHAN,M24LC128_1_SMBUS_DEV,0);
 298         break;
 299
 300         }
 301
 302     /*
 303      * MACs - must init after environment, since the hw address is stored there
 304      */
 305     cfe_add_device(&sb1250_ether,A_MAC_BASE_0,0,env_getenv("ETH0_HWADDR"));
 306     cfe_add_device(&sb1250_ether,A_MAC_BASE_1,1,env_getenv("ETH1_HWADDR"));
 307     cfe_add_device(&sb1250_ether,A_MAC_BASE_2,2,env_getenv("ETH2_HWADDR"));
 308
 309     /*
 310      * IDE disks and PCMCIA
 311      */
 312     cfe_add_device(&idedrv,IDE_PHYS+(0x1F0<<5),
 313                    IDE_PROBE_MASTER_TYPE(IDE_DEVTYPE_DISK) |
 314                    IDE_PROBE_SLAVE_TYPE(IDE_DEVTYPE_NOPROBE),
 315                    NULL);
 316
 317     /*
 318      * Enable PCMCIA support
 319      * NOTE : PCMCIA support is not completely working on REV 0 of the board.  There are some
 320      * Crossed signals with board detect, voltage detect.
 321      */
 322     switch (bcm1250cpci_board_rev) {
 323         case 0:
 324             break;
 325
 326         default:
 327             cfe_add_device(&pcmciadrv,PCMCIA_PHYS,0,NULL);
 328             break;
 329         }
 330
 331 #if CFG_PCI
 332     /*
 333      * Add some sample PCI devices
 334      */
 335      if (cfe_startflags & CFE_INIT_PCI) {
 336          cfe_add_device(&pciidedrv,0,IDE_PROBE_MASTER_TYPE(IDE_DEVTYPE_DISK),NULL);
 337          cfe_add_device(&dc21143drv,0,0,env_getenv("TULIP0_HWADDR"));
 338
 339 #if CFG_DOWNLOAD
 340          /* Access to bcm1250 in PCI device mode */
 341          cfe_add_device(&bcm1250drv,0,0,NULL);
 342      printf("Adding PCI download driver\n");
 343 #endif
 344          }
 345 #endif
 346
 347      /*
 348       * Clock
 349       * NOTE : On rev 0 of the board, the clock supplied is the X1241 and does not work on some boards
 350       * NOTE : On rev 1 of the board, the clock supplied is the ST and does not work on some boards
 351       */
 352     switch (bcm1250cpci_board_rev) {
 353         case 0:
 354     cfe_add_device(&x1241_clock,X1240_SMBUS_CHAN,X1240_SMBUS_DEV,0);
 355         break;
 356
 357         default:
 358         cfe_add_device(&m41t81_clock,M41T81_SMBUS_CHAN,M41T81_SMBUS_DEV,0);
 359         break;
 360
 361         }
 362
 363     /*
 364      * Host download interface.
 365      */
 366 //    cfe_add_device(&sb1250_pcihost,0,0,NULL);
 367
 368
 369     /*
 370      * Set variable that contains CPU speed, spit out config register
 371      */
 372
 373
 374     printf("Config switch: %d\n", bcm1250cpci_config_switch);
 375
 376     sb1250_show_cpu_type();
 377
 378 }
 379
 380
 381
 382 /*  *********************************************************************
 383     *  board_device_reset()
 384     *
 385     *  Reset devices.  This call is done when the firmware is restarted,
 386     *  as might happen when an operating system exits, just before the
 387     *  "reset" command is applied to the installed devices.   You can
 388     *  do whatever board-specific things are here to keep the system
 389     *  stable, like stopping DMA sources, interrupts, etc.
 390     *
 391     *  Input parameters:
 392     *      nothing
 393     *
 394     *  Return value:
 395     *      nothing
 396     ********************************************************************* */
 397
 398 void board_device_reset(void)
 399 {
 400         /* Nothing to be done */
 401 }
 402
 403
 404 /*  *********************************************************************
 405     *  board_final_init()
 406     *
 407     *  Do any final initialization, such as adding commands to the
 408     *  user interface.
 409     *
 410     *  If you don't want a user interface, put the startup code here.
 411     *  This routine is called just before CFE starts its user interface.
 412     *
 413     *  Input parameters:
 414     *      nothing
 415     *
 416     *  Return value:
 417     *      nothing
 418     ********************************************************************* */
 419
 420 void board_final_init(void)
 421 {
 422
 423     ui_init_cpu1cmds();                 /* Add CPU1 command for running VxWorks */
 424     ui_init_bcm1250cpcicmds();          /* Add bcm1250 specific cmds */
 425     ui_init_usbcmds();                  /* Add USB commands */
 426     ui_init_corecmds();                 /* Add bcm1250 core commands */
 427     ui_init_soccmds();                  /* Add system on chip commands */
 428     ui_init_testcmds();                 /* Add test commands */
 429     ui_init_toyclockcmds();             /* Add clock commands */
 430     ui_init_tempsensorcmds();           /* Add temp sensor commands */
 431     ui_init_memtestcmds();              /* Add memory test commands */
 432     ui_init_resetcmds();                /* Add reset commands */
 433     ui_init_phycmds();                  /* Add phy commands commands */
 434
 435         /* If download mode is selected, then setup for download receive */
 436     if (cfe_startflags & DEVICE_DOWNLOAD) {
 437         cfe_device_download((cfe_startflags & DEVICE_EXECUTE), "");
 438         }
 439
 440 }