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RT-AC56 3.0.0.4.374.37 core
[tomato.git] / release / src-rt-6.x.4708 / linux / linux-2.6.36 / sound / pci / ice1712 / ice1724.c
blob8852a8c78d508adc7413f45ed9f26954a2f64cc2
1 /*
2 * ALSA driver for VT1724 ICEnsemble ICE1724 / VIA VT1724 (Envy24HT)
3 * VIA VT1720 (Envy24PT)
4 *
5 * Copyright (c) 2000 Jaroslav Kysela <perex@perex.cz>
6 * 2002 James Stafford <jstafford@ampltd.com>
7 * 2003 Takashi Iwai <tiwai@suse.de>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 *
23 */
24
25 #include <linux/io.h>
26 #include <linux/delay.h>
27 #include <linux/interrupt.h>
28 #include <linux/init.h>
29 #include <linux/pci.h>
30 #include <linux/slab.h>
31 #include <linux/moduleparam.h>
32 #include <linux/mutex.h>
33 #include <sound/core.h>
34 #include <sound/info.h>
35 #include <sound/rawmidi.h>
36 #include <sound/initval.h>
37
38 #include <sound/asoundef.h>
39
40 #include "ice1712.h"
41 #include "envy24ht.h"
42
43 /* lowlevel routines */
44 #include "amp.h"
45 #include "revo.h"
46 #include "aureon.h"
47 #include "vt1720_mobo.h"
48 #include "pontis.h"
49 #include "prodigy192.h"
50 #include "prodigy_hifi.h"
51 #include "juli.h"
52 #include "maya44.h"
53 #include "phase.h"
54 #include "wtm.h"
55 #include "se.h"
56 #include "quartet.h"
57
58 MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
59 MODULE_DESCRIPTION("VIA ICEnsemble ICE1724/1720 (Envy24HT/PT)");
60 MODULE_LICENSE("GPL");
61 MODULE_SUPPORTED_DEVICE("{"
62 REVO_DEVICE_DESC
63 AMP_AUDIO2000_DEVICE_DESC
64 AUREON_DEVICE_DESC
65 VT1720_MOBO_DEVICE_DESC
66 PONTIS_DEVICE_DESC
67 PRODIGY192_DEVICE_DESC
68 PRODIGY_HIFI_DEVICE_DESC
69 JULI_DEVICE_DESC
70 MAYA44_DEVICE_DESC
71 PHASE_DEVICE_DESC
72 WTM_DEVICE_DESC
73 SE_DEVICE_DESC
74 QTET_DEVICE_DESC
75 "{VIA,VT1720},"
76 "{VIA,VT1724},"
77 "{ICEnsemble,Generic ICE1724},"
78 "{ICEnsemble,Generic Envy24HT}"
79 "{ICEnsemble,Generic Envy24PT}}");
80
81 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
82 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
83 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
84 static char *model[SNDRV_CARDS];
85
86 module_param_array(index, int, NULL, 0444);
87 MODULE_PARM_DESC(index, "Index value for ICE1724 soundcard.");
88 module_param_array(id, charp, NULL, 0444);
89 MODULE_PARM_DESC(id, "ID string for ICE1724 soundcard.");
90 module_param_array(enable, bool, NULL, 0444);
91 MODULE_PARM_DESC(enable, "Enable ICE1724 soundcard.");
92 module_param_array(model, charp, NULL, 0444);
93 MODULE_PARM_DESC(model, "Use the given board model.");
94
95
96 /* Both VT1720 and VT1724 have the same PCI IDs */
97 static DEFINE_PCI_DEVICE_TABLE(snd_vt1724_ids) = {
98 { PCI_VDEVICE(ICE, PCI_DEVICE_ID_VT1724), 0 },
99 { 0, }
100 };
101
102 MODULE_DEVICE_TABLE(pci, snd_vt1724_ids);
103
104
105 static int PRO_RATE_LOCKED;
106 static int PRO_RATE_RESET = 1;
107 static unsigned int PRO_RATE_DEFAULT = 44100;
108
109 static char *ext_clock_names[1] = { "IEC958 In" };
110
111 /*
112 * Basic I/O
113 */
114
115 /*
116 * default rates, default clock routines
117 */
118
119 /* check whether the clock mode is spdif-in */
120 static inline int stdclock_is_spdif_master(struct snd_ice1712 *ice)
121 {
122 return (inb(ICEMT1724(ice, RATE)) & VT1724_SPDIF_MASTER) ? 1 : 0;
123 }
124
125 /*
126 * locking rate makes sense only for internal clock mode
127 */
128 static inline int is_pro_rate_locked(struct snd_ice1712 *ice)
129 {
130 return (!ice->is_spdif_master(ice)) && PRO_RATE_LOCKED;
131 }
132
133 /*
134 * ac97 section
135 */
136
137 static unsigned char snd_vt1724_ac97_ready(struct snd_ice1712 *ice)
138 {
139 unsigned char old_cmd;
140 int tm;
141 for (tm = 0; tm < 0x10000; tm++) {
142 old_cmd = inb(ICEMT1724(ice, AC97_CMD));
143 if (old_cmd & (VT1724_AC97_WRITE | VT1724_AC97_READ))
144 continue;
145 if (!(old_cmd & VT1724_AC97_READY))
146 continue;
147 return old_cmd;
148 }
149 snd_printd(KERN_ERR "snd_vt1724_ac97_ready: timeout\n");
150 return old_cmd;
151 }
152
153 static int snd_vt1724_ac97_wait_bit(struct snd_ice1712 *ice, unsigned char bit)
154 {
155 int tm;
156 for (tm = 0; tm < 0x10000; tm++)
157 if ((inb(ICEMT1724(ice, AC97_CMD)) & bit) == 0)
158 return 0;
159 snd_printd(KERN_ERR "snd_vt1724_ac97_wait_bit: timeout\n");
160 return -EIO;
161 }
162
163 static void snd_vt1724_ac97_write(struct snd_ac97 *ac97,
164 unsigned short reg,
165 unsigned short val)
166 {
167 struct snd_ice1712 *ice = ac97->private_data;
168 unsigned char old_cmd;
169
170 old_cmd = snd_vt1724_ac97_ready(ice);
171 old_cmd &= ~VT1724_AC97_ID_MASK;
172 old_cmd |= ac97->num;
173 outb(reg, ICEMT1724(ice, AC97_INDEX));
174 outw(val, ICEMT1724(ice, AC97_DATA));
175 outb(old_cmd | VT1724_AC97_WRITE, ICEMT1724(ice, AC97_CMD));
176 snd_vt1724_ac97_wait_bit(ice, VT1724_AC97_WRITE);
177 }
178
179 static unsigned short snd_vt1724_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
180 {
181 struct snd_ice1712 *ice = ac97->private_data;
182 unsigned char old_cmd;
183
184 old_cmd = snd_vt1724_ac97_ready(ice);
185 old_cmd &= ~VT1724_AC97_ID_MASK;
186 old_cmd |= ac97->num;
187 outb(reg, ICEMT1724(ice, AC97_INDEX));
188 outb(old_cmd | VT1724_AC97_READ, ICEMT1724(ice, AC97_CMD));
189 if (snd_vt1724_ac97_wait_bit(ice, VT1724_AC97_READ) < 0)
190 return ~0;
191 return inw(ICEMT1724(ice, AC97_DATA));
192 }
193
194
195 /*
196 * GPIO operations
197 */
198
199 /* set gpio direction 0 = read, 1 = write */
200 static void snd_vt1724_set_gpio_dir(struct snd_ice1712 *ice, unsigned int data)
201 {
202 outl(data, ICEREG1724(ice, GPIO_DIRECTION));
203 inw(ICEREG1724(ice, GPIO_DIRECTION)); /* dummy read for pci-posting */
204 }
205
206 /* get gpio direction 0 = read, 1 = write */
207 static unsigned int snd_vt1724_get_gpio_dir(struct snd_ice1712 *ice)
208 {
209 return inl(ICEREG1724(ice, GPIO_DIRECTION));
210 }
211
212 /* set the gpio mask (0 = writable) */
213 static void snd_vt1724_set_gpio_mask(struct snd_ice1712 *ice, unsigned int data)
214 {
215 outw(data, ICEREG1724(ice, GPIO_WRITE_MASK));
216 if (!ice->vt1720) /* VT1720 supports only 16 GPIO bits */
217 outb((data >> 16) & 0xff, ICEREG1724(ice, GPIO_WRITE_MASK_22));
218 inw(ICEREG1724(ice, GPIO_WRITE_MASK)); /* dummy read for pci-posting */
219 }
220
221 static unsigned int snd_vt1724_get_gpio_mask(struct snd_ice1712 *ice)
222 {
223 unsigned int mask;
224 if (!ice->vt1720)
225 mask = (unsigned int)inb(ICEREG1724(ice, GPIO_WRITE_MASK_22));
226 else
227 mask = 0;
228 mask = (mask << 16) | inw(ICEREG1724(ice, GPIO_WRITE_MASK));
229 return mask;
230 }
231
232 static void snd_vt1724_set_gpio_data(struct snd_ice1712 *ice, unsigned int data)
233 {
234 outw(data, ICEREG1724(ice, GPIO_DATA));
235 if (!ice->vt1720)
236 outb(data >> 16, ICEREG1724(ice, GPIO_DATA_22));
237 inw(ICEREG1724(ice, GPIO_DATA)); /* dummy read for pci-posting */
238 }
239
240 static unsigned int snd_vt1724_get_gpio_data(struct snd_ice1712 *ice)
241 {
242 unsigned int data;
243 if (!ice->vt1720)
244 data = (unsigned int)inb(ICEREG1724(ice, GPIO_DATA_22));
245 else
246 data = 0;
247 data = (data << 16) | inw(ICEREG1724(ice, GPIO_DATA));
248 return data;
249 }
250
251 /*
252 * MIDI
253 */
254
255 static void vt1724_midi_clear_rx(struct snd_ice1712 *ice)
256 {
257 unsigned int count;
258
259 for (count = inb(ICEREG1724(ice, MPU_RXFIFO)); count > 0; --count)
260 inb(ICEREG1724(ice, MPU_DATA));
261 }
262
263 static inline struct snd_rawmidi_substream *
264 get_rawmidi_substream(struct snd_ice1712 *ice, unsigned int stream)
265 {
266 return list_first_entry(&ice->rmidi[0]->streams[stream].substreams,
267 struct snd_rawmidi_substream, list);
268 }
269
270 static void enable_midi_irq(struct snd_ice1712 *ice, u8 flag, int enable);
271
272 static void vt1724_midi_write(struct snd_ice1712 *ice)
273 {
274 struct snd_rawmidi_substream *s;
275 int count, i;
276 u8 buffer[32];
277
278 s = get_rawmidi_substream(ice, SNDRV_RAWMIDI_STREAM_OUTPUT);
279 count = 31 - inb(ICEREG1724(ice, MPU_TXFIFO));
280 if (count > 0) {
281 count = snd_rawmidi_transmit(s, buffer, count);
282 for (i = 0; i < count; ++i)
283 outb(buffer[i], ICEREG1724(ice, MPU_DATA));
284 }
285 /* mask irq when all bytes have been transmitted.
286 * enabled again in output_trigger when the new data comes in.
287 */
288 enable_midi_irq(ice, VT1724_IRQ_MPU_TX,
289 !snd_rawmidi_transmit_empty(s));
290 }
291
292 static void vt1724_midi_read(struct snd_ice1712 *ice)
293 {
294 struct snd_rawmidi_substream *s;
295 int count, i;
296 u8 buffer[32];
297
298 s = get_rawmidi_substream(ice, SNDRV_RAWMIDI_STREAM_INPUT);
299 count = inb(ICEREG1724(ice, MPU_RXFIFO));
300 if (count > 0) {
301 count = min(count, 32);
302 for (i = 0; i < count; ++i)
303 buffer[i] = inb(ICEREG1724(ice, MPU_DATA));
304 snd_rawmidi_receive(s, buffer, count);
305 }
306 }
307
308 /* call with ice->reg_lock */
309 static void enable_midi_irq(struct snd_ice1712 *ice, u8 flag, int enable)
310 {
311 u8 mask = inb(ICEREG1724(ice, IRQMASK));
312 if (enable)
313 mask &= ~flag;
314 else
315 mask |= flag;
316 outb(mask, ICEREG1724(ice, IRQMASK));
317 }
318
319 static void vt1724_enable_midi_irq(struct snd_rawmidi_substream *substream,
320 u8 flag, int enable)
321 {
322 struct snd_ice1712 *ice = substream->rmidi->private_data;
323
324 spin_lock_irq(&ice->reg_lock);
325 enable_midi_irq(ice, flag, enable);
326 spin_unlock_irq(&ice->reg_lock);
327 }
328
329 static int vt1724_midi_output_open(struct snd_rawmidi_substream *s)
330 {
331 return 0;
332 }
333
334 static int vt1724_midi_output_close(struct snd_rawmidi_substream *s)
335 {
336 return 0;
337 }
338
339 static void vt1724_midi_output_trigger(struct snd_rawmidi_substream *s, int up)
340 {
341 struct snd_ice1712 *ice = s->rmidi->private_data;
342 unsigned long flags;
343
344 spin_lock_irqsave(&ice->reg_lock, flags);
345 if (up) {
346 ice->midi_output = 1;
347 vt1724_midi_write(ice);
348 } else {
349 ice->midi_output = 0;
350 enable_midi_irq(ice, VT1724_IRQ_MPU_TX, 0);
351 }
352 spin_unlock_irqrestore(&ice->reg_lock, flags);
353 }
354
355 static void vt1724_midi_output_drain(struct snd_rawmidi_substream *s)
356 {
357 struct snd_ice1712 *ice = s->rmidi->private_data;
358 unsigned long timeout;
359
360 vt1724_enable_midi_irq(s, VT1724_IRQ_MPU_TX, 0);
361 /* 32 bytes should be transmitted in less than about 12 ms */
362 timeout = jiffies + msecs_to_jiffies(15);
363 do {
364 if (inb(ICEREG1724(ice, MPU_CTRL)) & VT1724_MPU_TX_EMPTY)
365 break;
366 schedule_timeout_uninterruptible(1);
367 } while (time_after(timeout, jiffies));
368 }
369
370 static struct snd_rawmidi_ops vt1724_midi_output_ops = {
371 .open = vt1724_midi_output_open,
372 .close = vt1724_midi_output_close,
373 .trigger = vt1724_midi_output_trigger,
374 .drain = vt1724_midi_output_drain,
375 };
376
377 static int vt1724_midi_input_open(struct snd_rawmidi_substream *s)
378 {
379 vt1724_midi_clear_rx(s->rmidi->private_data);
380 vt1724_enable_midi_irq(s, VT1724_IRQ_MPU_RX, 1);
381 return 0;
382 }
383
384 static int vt1724_midi_input_close(struct snd_rawmidi_substream *s)
385 {
386 vt1724_enable_midi_irq(s, VT1724_IRQ_MPU_RX, 0);
387 return 0;
388 }
389
390 static void vt1724_midi_input_trigger(struct snd_rawmidi_substream *s, int up)
391 {
392 struct snd_ice1712 *ice = s->rmidi->private_data;
393 unsigned long flags;
394
395 spin_lock_irqsave(&ice->reg_lock, flags);
396 if (up) {
397 ice->midi_input = 1;
398 vt1724_midi_read(ice);
399 } else {
400 ice->midi_input = 0;
401 }
402 spin_unlock_irqrestore(&ice->reg_lock, flags);
403 }
404
405 static struct snd_rawmidi_ops vt1724_midi_input_ops = {
406 .open = vt1724_midi_input_open,
407 .close = vt1724_midi_input_close,
408 .trigger = vt1724_midi_input_trigger,
409 };
410
411
412 /*
413 * Interrupt handler
414 */
415
416 static irqreturn_t snd_vt1724_interrupt(int irq, void *dev_id)
417 {
418 struct snd_ice1712 *ice = dev_id;
419 unsigned char status;
420 unsigned char status_mask =
421 VT1724_IRQ_MPU_RX | VT1724_IRQ_MPU_TX | VT1724_IRQ_MTPCM;
422 int handled = 0;
423 int timeout = 0;
424
425 while (1) {
426 status = inb(ICEREG1724(ice, IRQSTAT));
427 status &= status_mask;
428 if (status == 0)
429 break;
430 spin_lock(&ice->reg_lock);
431 if (++timeout > 10) {
432 status = inb(ICEREG1724(ice, IRQSTAT));
433 printk(KERN_ERR "ice1724: Too long irq loop, "
434 "status = 0x%x\n", status);
435 if (status & VT1724_IRQ_MPU_TX) {
436 printk(KERN_ERR "ice1724: Disabling MPU_TX\n");
437 enable_midi_irq(ice, VT1724_IRQ_MPU_TX, 0);
438 }
439 spin_unlock(&ice->reg_lock);
440 break;
441 }
442 handled = 1;
443 if (status & VT1724_IRQ_MPU_TX) {
444 if (ice->midi_output)
445 vt1724_midi_write(ice);
446 else
447 enable_midi_irq(ice, VT1724_IRQ_MPU_TX, 0);
448 /* Due to mysterical reasons, MPU_TX is always
449 * generated (and can't be cleared) when a PCM
450 * playback is going. So let's ignore at the
451 * next loop.
452 */
453 status_mask &= ~VT1724_IRQ_MPU_TX;
454 }
455 if (status & VT1724_IRQ_MPU_RX) {
456 if (ice->midi_input)
457 vt1724_midi_read(ice);
458 else
459 vt1724_midi_clear_rx(ice);
460 }
461 /* ack MPU irq */
462 outb(status, ICEREG1724(ice, IRQSTAT));
463 spin_unlock(&ice->reg_lock);
464 if (status & VT1724_IRQ_MTPCM) {
465 /*
466 * Multi-track PCM
467 * PCM assignment are:
468 * Playback DMA0 (M/C) = playback_pro_substream
469 * Playback DMA1 = playback_con_substream_ds[0]
470 * Playback DMA2 = playback_con_substream_ds[1]
471 * Playback DMA3 = playback_con_substream_ds[2]
472 * Playback DMA4 (SPDIF) = playback_con_substream
473 * Record DMA0 = capture_pro_substream
474 * Record DMA1 = capture_con_substream
475 */
476 unsigned char mtstat = inb(ICEMT1724(ice, IRQ));
477 if (mtstat & VT1724_MULTI_PDMA0) {
478 if (ice->playback_pro_substream)
479 snd_pcm_period_elapsed(ice->playback_pro_substream);
480 }
481 if (mtstat & VT1724_MULTI_RDMA0) {
482 if (ice->capture_pro_substream)
483 snd_pcm_period_elapsed(ice->capture_pro_substream);
484 }
485 if (mtstat & VT1724_MULTI_PDMA1) {
486 if (ice->playback_con_substream_ds[0])
487 snd_pcm_period_elapsed(ice->playback_con_substream_ds[0]);
488 }
489 if (mtstat & VT1724_MULTI_PDMA2) {
490 if (ice->playback_con_substream_ds[1])
491 snd_pcm_period_elapsed(ice->playback_con_substream_ds[1]);
492 }
493 if (mtstat & VT1724_MULTI_PDMA3) {
494 if (ice->playback_con_substream_ds[2])
495 snd_pcm_period_elapsed(ice->playback_con_substream_ds[2]);
496 }
497 if (mtstat & VT1724_MULTI_PDMA4) {
498 if (ice->playback_con_substream)
499 snd_pcm_period_elapsed(ice->playback_con_substream);
500 }
501 if (mtstat & VT1724_MULTI_RDMA1) {
502 if (ice->capture_con_substream)
503 snd_pcm_period_elapsed(ice->capture_con_substream);
504 }
505 /* ack anyway to avoid freeze */
506 outb(mtstat, ICEMT1724(ice, IRQ));
507 /* ought to really handle this properly */
508 if (mtstat & VT1724_MULTI_FIFO_ERR) {
509 unsigned char fstat = inb(ICEMT1724(ice, DMA_FIFO_ERR));
510 outb(fstat, ICEMT1724(ice, DMA_FIFO_ERR));
511 outb(VT1724_MULTI_FIFO_ERR | inb(ICEMT1724(ice, DMA_INT_MASK)), ICEMT1724(ice, DMA_INT_MASK));
512 /* If I don't do this, I get machine lockup due to continual interrupts */
513 }
514
515 }
516 }
517 return IRQ_RETVAL(handled);
518 }
519
520 /*
521 * PCM code - professional part (multitrack)
522 */
523
524 static unsigned int rates[] = {
525 8000, 9600, 11025, 12000, 16000, 22050, 24000,
526 32000, 44100, 48000, 64000, 88200, 96000,
527 176400, 192000,
528 };
529
530 static struct snd_pcm_hw_constraint_list hw_constraints_rates_96 = {
531 .count = ARRAY_SIZE(rates) - 2, /* up to 96000 */
532 .list = rates,
533 .mask = 0,
534 };
535
536 static struct snd_pcm_hw_constraint_list hw_constraints_rates_48 = {
537 .count = ARRAY_SIZE(rates) - 5, /* up to 48000 */
538 .list = rates,
539 .mask = 0,
540 };
541
542 static struct snd_pcm_hw_constraint_list hw_constraints_rates_192 = {
543 .count = ARRAY_SIZE(rates),
544 .list = rates,
545 .mask = 0,
546 };
547
548 struct vt1724_pcm_reg {
549 unsigned int addr; /* ADDR register offset */
550 unsigned int size; /* SIZE register offset */
551 unsigned int count; /* COUNT register offset */
552 unsigned int start; /* start & pause bit */
553 };
554
555 static int snd_vt1724_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
556 {
557 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
558 unsigned char what;
559 unsigned char old;
560 struct snd_pcm_substream *s;
561
562 what = 0;
563 snd_pcm_group_for_each_entry(s, substream) {
564 if (snd_pcm_substream_chip(s) == ice) {
565 const struct vt1724_pcm_reg *reg;
566 reg = s->runtime->private_data;
567 what |= reg->start;
568 snd_pcm_trigger_done(s, substream);
569 }
570 }
571
572 switch (cmd) {
573 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
574 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
575 spin_lock(&ice->reg_lock);
576 old = inb(ICEMT1724(ice, DMA_PAUSE));
577 if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH)
578 old |= what;
579 else
580 old &= ~what;
581 outb(old, ICEMT1724(ice, DMA_PAUSE));
582 spin_unlock(&ice->reg_lock);
583 break;
584
585 case SNDRV_PCM_TRIGGER_START:
586 case SNDRV_PCM_TRIGGER_STOP:
587 case SNDRV_PCM_TRIGGER_SUSPEND:
588 spin_lock(&ice->reg_lock);
589 old = inb(ICEMT1724(ice, DMA_CONTROL));
590 if (cmd == SNDRV_PCM_TRIGGER_START)
591 old |= what;
592 else
593 old &= ~what;
594 outb(old, ICEMT1724(ice, DMA_CONTROL));
595 spin_unlock(&ice->reg_lock);
596 break;
597
598 case SNDRV_PCM_TRIGGER_RESUME:
599 /* apps will have to restart stream */
600 break;
601
602 default:
603 return -EINVAL;
604 }
605 return 0;
606 }
607
608 /*
609 */
610
611 #define DMA_STARTS (VT1724_RDMA0_START|VT1724_PDMA0_START|VT1724_RDMA1_START|\
612 VT1724_PDMA1_START|VT1724_PDMA2_START|VT1724_PDMA3_START|VT1724_PDMA4_START)
613 #define DMA_PAUSES (VT1724_RDMA0_PAUSE|VT1724_PDMA0_PAUSE|VT1724_RDMA1_PAUSE|\
614 VT1724_PDMA1_PAUSE|VT1724_PDMA2_PAUSE|VT1724_PDMA3_PAUSE|VT1724_PDMA4_PAUSE)
615
616 static const unsigned int stdclock_rate_list[16] = {
617 48000, 24000, 12000, 9600, 32000, 16000, 8000, 96000, 44100,
618 22050, 11025, 88200, 176400, 0, 192000, 64000
619 };
620
621 static unsigned int stdclock_get_rate(struct snd_ice1712 *ice)
622 {
623 unsigned int rate;
624 rate = stdclock_rate_list[inb(ICEMT1724(ice, RATE)) & 15];
625 return rate;
626 }
627
628 static void stdclock_set_rate(struct snd_ice1712 *ice, unsigned int rate)
629 {
630 int i;
631 for (i = 0; i < ARRAY_SIZE(stdclock_rate_list); i++) {
632 if (stdclock_rate_list[i] == rate) {
633 outb(i, ICEMT1724(ice, RATE));
634 return;
635 }
636 }
637 }
638
639 static unsigned char stdclock_set_mclk(struct snd_ice1712 *ice,
640 unsigned int rate)
641 {
642 unsigned char val, old;
643 /* check MT02 */
644 if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) {
645 val = old = inb(ICEMT1724(ice, I2S_FORMAT));
646 if (rate > 96000)
647 val |= VT1724_MT_I2S_MCLK_128X; /* 128x MCLK */
648 else
649 val &= ~VT1724_MT_I2S_MCLK_128X; /* 256x MCLK */
650 if (val != old) {
651 outb(val, ICEMT1724(ice, I2S_FORMAT));
652 /* master clock changed */
653 return 1;
654 }
655 }
656 /* no change in master clock */
657 return 0;
658 }
659
660 static int snd_vt1724_set_pro_rate(struct snd_ice1712 *ice, unsigned int rate,
661 int force)
662 {
663 unsigned long flags;
664 unsigned char mclk_change;
665 unsigned int i, old_rate;
666
667 if (rate > ice->hw_rates->list[ice->hw_rates->count - 1])
668 return -EINVAL;
669
670 spin_lock_irqsave(&ice->reg_lock, flags);
671 if ((inb(ICEMT1724(ice, DMA_CONTROL)) & DMA_STARTS) ||
672 (inb(ICEMT1724(ice, DMA_PAUSE)) & DMA_PAUSES)) {
673 /* running? we cannot change the rate now... */
674 spin_unlock_irqrestore(&ice->reg_lock, flags);
675 return ((rate == ice->cur_rate) && !force) ? 0 : -EBUSY;
676 }
677 if (!force && is_pro_rate_locked(ice)) {
678 /* comparing required and current rate - makes sense for
679 * internal clock only */
680 spin_unlock_irqrestore(&ice->reg_lock, flags);
681 return (rate == ice->cur_rate) ? 0 : -EBUSY;
682 }
683
684 if (force || !ice->is_spdif_master(ice)) {
685 /* force means the rate was switched by ucontrol, otherwise
686 * setting clock rate for internal clock mode */
687 old_rate = ice->get_rate(ice);
688 if (force || (old_rate != rate))
689 ice->set_rate(ice, rate);
690 else if (rate == ice->cur_rate) {
691 spin_unlock_irqrestore(&ice->reg_lock, flags);
692 return 0;
693 }
694 }
695
696 ice->cur_rate = rate;
697
698 /* setting master clock */
699 mclk_change = ice->set_mclk(ice, rate);
700
701 spin_unlock_irqrestore(&ice->reg_lock, flags);
702
703 if (mclk_change && ice->gpio.i2s_mclk_changed)
704 ice->gpio.i2s_mclk_changed(ice);
705 if (ice->gpio.set_pro_rate)
706 ice->gpio.set_pro_rate(ice, rate);
707
708 /* set up codecs */
709 for (i = 0; i < ice->akm_codecs; i++) {
710 if (ice->akm[i].ops.set_rate_val)
711 ice->akm[i].ops.set_rate_val(&ice->akm[i], rate);
712 }
713 if (ice->spdif.ops.setup_rate)
714 ice->spdif.ops.setup_rate(ice, rate);
715
716 return 0;
717 }
718
719 static int snd_vt1724_pcm_hw_params(struct snd_pcm_substream *substream,
720 struct snd_pcm_hw_params *hw_params)
721 {
722 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
723 int i, chs, err;
724
725 chs = params_channels(hw_params);
726 mutex_lock(&ice->open_mutex);
727 /* mark surround channels */
728 if (substream == ice->playback_pro_substream) {
729 /* PDMA0 can be multi-channel up to 8 */
730 chs = chs / 2 - 1;
731 for (i = 0; i < chs; i++) {
732 if (ice->pcm_reserved[i] &&
733 ice->pcm_reserved[i] != substream) {
734 mutex_unlock(&ice->open_mutex);
735 return -EBUSY;
736 }
737 ice->pcm_reserved[i] = substream;
738 }
739 for (; i < 3; i++) {
740 if (ice->pcm_reserved[i] == substream)
741 ice->pcm_reserved[i] = NULL;
742 }
743 } else {
744 for (i = 0; i < 3; i++) {
745 /* check individual playback stream */
746 if (ice->playback_con_substream_ds[i] == substream) {
747 if (ice->pcm_reserved[i] &&
748 ice->pcm_reserved[i] != substream) {
749 mutex_unlock(&ice->open_mutex);
750 return -EBUSY;
751 }
752 ice->pcm_reserved[i] = substream;
753 break;
754 }
755 }
756 }
757 mutex_unlock(&ice->open_mutex);
758
759 err = snd_vt1724_set_pro_rate(ice, params_rate(hw_params), 0);
760 if (err < 0)
761 return err;
762
763 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
764 }
765
766 static int snd_vt1724_pcm_hw_free(struct snd_pcm_substream *substream)
767 {
768 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
769 int i;
770
771 mutex_lock(&ice->open_mutex);
772 /* unmark surround channels */
773 for (i = 0; i < 3; i++)
774 if (ice->pcm_reserved[i] == substream)
775 ice->pcm_reserved[i] = NULL;
776 mutex_unlock(&ice->open_mutex);
777 return snd_pcm_lib_free_pages(substream);
778 }
779
780 static int snd_vt1724_playback_pro_prepare(struct snd_pcm_substream *substream)
781 {
782 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
783 unsigned char val;
784 unsigned int size;
785
786 spin_lock_irq(&ice->reg_lock);
787 val = (8 - substream->runtime->channels) >> 1;
788 outb(val, ICEMT1724(ice, BURST));
789
790 outl(substream->runtime->dma_addr, ICEMT1724(ice, PLAYBACK_ADDR));
791
792 size = (snd_pcm_lib_buffer_bytes(substream) >> 2) - 1;
793 /* outl(size, ICEMT1724(ice, PLAYBACK_SIZE)); */
794 outw(size, ICEMT1724(ice, PLAYBACK_SIZE));
795 outb(size >> 16, ICEMT1724(ice, PLAYBACK_SIZE) + 2);
796 size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1;
797 /* outl(size, ICEMT1724(ice, PLAYBACK_COUNT)); */
798 outw(size, ICEMT1724(ice, PLAYBACK_COUNT));
799 outb(size >> 16, ICEMT1724(ice, PLAYBACK_COUNT) + 2);
800
801 spin_unlock_irq(&ice->reg_lock);
802
803 /*
804 printk(KERN_DEBUG "pro prepare: ch = %d, addr = 0x%x, "
805 "buffer = 0x%x, period = 0x%x\n",
806 substream->runtime->channels,
807 (unsigned int)substream->runtime->dma_addr,
808 snd_pcm_lib_buffer_bytes(substream),
809 snd_pcm_lib_period_bytes(substream));
810 */
811 return 0;
812 }
813
814 static snd_pcm_uframes_t snd_vt1724_playback_pro_pointer(struct snd_pcm_substream *substream)
815 {
816 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
817 size_t ptr;
818
819 if (!(inl(ICEMT1724(ice, DMA_CONTROL)) & VT1724_PDMA0_START))
820 return 0;
821 ptr = inl(ICEMT1724(ice, PLAYBACK_SIZE)) & 0xffffff;
822 ptr = (ptr + 1) << 2;
823 ptr = bytes_to_frames(substream->runtime, ptr);
824 if (!ptr)
825 ;
826 else if (ptr <= substream->runtime->buffer_size)
827 ptr = substream->runtime->buffer_size - ptr;
828 else {
829 snd_printd("ice1724: invalid ptr %d (size=%d)\n",
830 (int)ptr, (int)substream->runtime->buffer_size);
831 ptr = 0;
832 }
833 return ptr;
834 }
835
836 static int snd_vt1724_pcm_prepare(struct snd_pcm_substream *substream)
837 {
838 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
839 const struct vt1724_pcm_reg *reg = substream->runtime->private_data;
840
841 spin_lock_irq(&ice->reg_lock);
842 outl(substream->runtime->dma_addr, ice->profi_port + reg->addr);
843 outw((snd_pcm_lib_buffer_bytes(substream) >> 2) - 1,
844 ice->profi_port + reg->size);
845 outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1,
846 ice->profi_port + reg->count);
847 spin_unlock_irq(&ice->reg_lock);
848 return 0;
849 }
850
851 static snd_pcm_uframes_t snd_vt1724_pcm_pointer(struct snd_pcm_substream *substream)
852 {
853 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
854 const struct vt1724_pcm_reg *reg = substream->runtime->private_data;
855 size_t ptr;
856
857 if (!(inl(ICEMT1724(ice, DMA_CONTROL)) & reg->start))
858 return 0;
859 ptr = inw(ice->profi_port + reg->size);
860 ptr = (ptr + 1) << 2;
861 ptr = bytes_to_frames(substream->runtime, ptr);
862 if (!ptr)
863 ;
864 else if (ptr <= substream->runtime->buffer_size)
865 ptr = substream->runtime->buffer_size - ptr;
866 else {
867 snd_printd("ice1724: invalid ptr %d (size=%d)\n",
868 (int)ptr, (int)substream->runtime->buffer_size);
869 ptr = 0;
870 }
871 return ptr;
872 }
873
874 static const struct vt1724_pcm_reg vt1724_pdma0_reg = {
875 .addr = VT1724_MT_PLAYBACK_ADDR,
876 .size = VT1724_MT_PLAYBACK_SIZE,
877 .count = VT1724_MT_PLAYBACK_COUNT,
878 .start = VT1724_PDMA0_START,
879 };
880
881 static const struct vt1724_pcm_reg vt1724_pdma4_reg = {
882 .addr = VT1724_MT_PDMA4_ADDR,
883 .size = VT1724_MT_PDMA4_SIZE,
884 .count = VT1724_MT_PDMA4_COUNT,
885 .start = VT1724_PDMA4_START,
886 };
887
888 static const struct vt1724_pcm_reg vt1724_rdma0_reg = {
889 .addr = VT1724_MT_CAPTURE_ADDR,
890 .size = VT1724_MT_CAPTURE_SIZE,
891 .count = VT1724_MT_CAPTURE_COUNT,
892 .start = VT1724_RDMA0_START,
893 };
894
895 static const struct vt1724_pcm_reg vt1724_rdma1_reg = {
896 .addr = VT1724_MT_RDMA1_ADDR,
897 .size = VT1724_MT_RDMA1_SIZE,
898 .count = VT1724_MT_RDMA1_COUNT,
899 .start = VT1724_RDMA1_START,
900 };
901
902 #define vt1724_playback_pro_reg vt1724_pdma0_reg
903 #define vt1724_playback_spdif_reg vt1724_pdma4_reg
904 #define vt1724_capture_pro_reg vt1724_rdma0_reg
905 #define vt1724_capture_spdif_reg vt1724_rdma1_reg
906
907 static const struct snd_pcm_hardware snd_vt1724_playback_pro = {
908 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
909 SNDRV_PCM_INFO_BLOCK_TRANSFER |
910 SNDRV_PCM_INFO_MMAP_VALID |
911 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
912 .formats = SNDRV_PCM_FMTBIT_S32_LE,
913 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_192000,
914 .rate_min = 8000,
915 .rate_max = 192000,
916 .channels_min = 2,
917 .channels_max = 8,
918 .buffer_bytes_max = (1UL << 21), /* 19bits dword */
919 .period_bytes_min = 8 * 4 * 2,
920 .period_bytes_max = (1UL << 21),
921 .periods_min = 2,
922 .periods_max = 1024,
923 };
924
925 static const struct snd_pcm_hardware snd_vt1724_spdif = {
926 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
927 SNDRV_PCM_INFO_BLOCK_TRANSFER |
928 SNDRV_PCM_INFO_MMAP_VALID |
929 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
930 .formats = SNDRV_PCM_FMTBIT_S32_LE,
931 .rates = (SNDRV_PCM_RATE_32000|SNDRV_PCM_RATE_44100|
932 SNDRV_PCM_RATE_48000|SNDRV_PCM_RATE_88200|
933 SNDRV_PCM_RATE_96000|SNDRV_PCM_RATE_176400|
934 SNDRV_PCM_RATE_192000),
935 .rate_min = 32000,
936 .rate_max = 192000,
937 .channels_min = 2,
938 .channels_max = 2,
939 .buffer_bytes_max = (1UL << 18), /* 16bits dword */
940 .period_bytes_min = 2 * 4 * 2,
941 .period_bytes_max = (1UL << 18),
942 .periods_min = 2,
943 .periods_max = 1024,
944 };
945
946 static const struct snd_pcm_hardware snd_vt1724_2ch_stereo = {
947 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
948 SNDRV_PCM_INFO_BLOCK_TRANSFER |
949 SNDRV_PCM_INFO_MMAP_VALID |
950 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
951 .formats = SNDRV_PCM_FMTBIT_S32_LE,
952 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_192000,
953 .rate_min = 8000,
954 .rate_max = 192000,
955 .channels_min = 2,
956 .channels_max = 2,
957 .buffer_bytes_max = (1UL << 18), /* 16bits dword */
958 .period_bytes_min = 2 * 4 * 2,
959 .period_bytes_max = (1UL << 18),
960 .periods_min = 2,
961 .periods_max = 1024,
962 };
963
964 /*
965 * set rate constraints
966 */
967 static void set_std_hw_rates(struct snd_ice1712 *ice)
968 {
969 if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) {
970 /* I2S */
971 /* VT1720 doesn't support more than 96kHz */
972 if ((ice->eeprom.data[ICE_EEP2_I2S] & 0x08) && !ice->vt1720)
973 ice->hw_rates = &hw_constraints_rates_192;
974 else
975 ice->hw_rates = &hw_constraints_rates_96;
976 } else {
977 /* ACLINK */
978 ice->hw_rates = &hw_constraints_rates_48;
979 }
980 }
981
982 static int set_rate_constraints(struct snd_ice1712 *ice,
983 struct snd_pcm_substream *substream)
984 {
985 struct snd_pcm_runtime *runtime = substream->runtime;
986
987 runtime->hw.rate_min = ice->hw_rates->list[0];
988 runtime->hw.rate_max = ice->hw_rates->list[ice->hw_rates->count - 1];
989 runtime->hw.rates = SNDRV_PCM_RATE_KNOT;
990 return snd_pcm_hw_constraint_list(runtime, 0,
991 SNDRV_PCM_HW_PARAM_RATE,
992 ice->hw_rates);
993 }
994
995 /* multi-channel playback needs alignment 8x32bit regardless of the channels
996 * actually used
997 */
998 #define VT1724_BUFFER_ALIGN 0x20
999
1000 static int snd_vt1724_playback_pro_open(struct snd_pcm_substream *substream)
1001 {
1002 struct snd_pcm_runtime *runtime = substream->runtime;
1003 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1004 int chs, num_indeps;
1005
1006 runtime->private_data = (void *)&vt1724_playback_pro_reg;
1007 ice->playback_pro_substream = substream;
1008 runtime->hw = snd_vt1724_playback_pro;
1009 snd_pcm_set_sync(substream);
1010 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
1011 set_rate_constraints(ice, substream);
1012 mutex_lock(&ice->open_mutex);
1013 /* calculate the currently available channels */
1014 num_indeps = ice->num_total_dacs / 2 - 1;
1015 for (chs = 0; chs < num_indeps; chs++) {
1016 if (ice->pcm_reserved[chs])
1017 break;
1018 }
1019 chs = (chs + 1) * 2;
1020 runtime->hw.channels_max = chs;
1021 if (chs > 2) /* channels must be even */
1022 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1023 mutex_unlock(&ice->open_mutex);
1024 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
1025 VT1724_BUFFER_ALIGN);
1026 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
1027 VT1724_BUFFER_ALIGN);
1028 if (ice->pro_open)
1029 ice->pro_open(ice, substream);
1030 return 0;
1031 }
1032
1033 static int snd_vt1724_capture_pro_open(struct snd_pcm_substream *substream)
1034 {
1035 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1036 struct snd_pcm_runtime *runtime = substream->runtime;
1037
1038 runtime->private_data = (void *)&vt1724_capture_pro_reg;
1039 ice->capture_pro_substream = substream;
1040 runtime->hw = snd_vt1724_2ch_stereo;
1041 snd_pcm_set_sync(substream);
1042 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
1043 set_rate_constraints(ice, substream);
1044 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
1045 VT1724_BUFFER_ALIGN);
1046 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
1047 VT1724_BUFFER_ALIGN);
1048 if (ice->pro_open)
1049 ice->pro_open(ice, substream);
1050 return 0;
1051 }
1052
1053 static int snd_vt1724_playback_pro_close(struct snd_pcm_substream *substream)
1054 {
1055 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1056
1057 if (PRO_RATE_RESET)
1058 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
1059 ice->playback_pro_substream = NULL;
1060
1061 return 0;
1062 }
1063
1064 static int snd_vt1724_capture_pro_close(struct snd_pcm_substream *substream)
1065 {
1066 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1067
1068 if (PRO_RATE_RESET)
1069 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
1070 ice->capture_pro_substream = NULL;
1071 return 0;
1072 }
1073
1074 static struct snd_pcm_ops snd_vt1724_playback_pro_ops = {
1075 .open = snd_vt1724_playback_pro_open,
1076 .close = snd_vt1724_playback_pro_close,
1077 .ioctl = snd_pcm_lib_ioctl,
1078 .hw_params = snd_vt1724_pcm_hw_params,
1079 .hw_free = snd_vt1724_pcm_hw_free,
1080 .prepare = snd_vt1724_playback_pro_prepare,
1081 .trigger = snd_vt1724_pcm_trigger,
1082 .pointer = snd_vt1724_playback_pro_pointer,
1083 };
1084
1085 static struct snd_pcm_ops snd_vt1724_capture_pro_ops = {
1086 .open = snd_vt1724_capture_pro_open,
1087 .close = snd_vt1724_capture_pro_close,
1088 .ioctl = snd_pcm_lib_ioctl,
1089 .hw_params = snd_vt1724_pcm_hw_params,
1090 .hw_free = snd_vt1724_pcm_hw_free,
1091 .prepare = snd_vt1724_pcm_prepare,
1092 .trigger = snd_vt1724_pcm_trigger,
1093 .pointer = snd_vt1724_pcm_pointer,
1094 };
1095
1096 static int __devinit snd_vt1724_pcm_profi(struct snd_ice1712 *ice, int device)
1097 {
1098 struct snd_pcm *pcm;
1099 int err;
1100
1101 err = snd_pcm_new(ice->card, "ICE1724", device, 1, 1, &pcm);
1102 if (err < 0)
1103 return err;
1104
1105 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_vt1724_playback_pro_ops);
1106 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_vt1724_capture_pro_ops);
1107
1108 pcm->private_data = ice;
1109 pcm->info_flags = 0;
1110 strcpy(pcm->name, "ICE1724");
1111
1112 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1113 snd_dma_pci_data(ice->pci),
1114 256*1024, 256*1024);
1115
1116 ice->pcm_pro = pcm;
1117
1118 return 0;
1119 }
1120
1121
1122 /*
1123 * SPDIF PCM
1124 */
1125
1126 /* update spdif control bits; call with reg_lock */
1127 static void update_spdif_bits(struct snd_ice1712 *ice, unsigned int val)
1128 {
1129 unsigned char cbit, disabled;
1130
1131 cbit = inb(ICEREG1724(ice, SPDIF_CFG));
1132 disabled = cbit & ~VT1724_CFG_SPDIF_OUT_EN;
1133 if (cbit != disabled)
1134 outb(disabled, ICEREG1724(ice, SPDIF_CFG));
1135 outw(val, ICEMT1724(ice, SPDIF_CTRL));
1136 if (cbit != disabled)
1137 outb(cbit, ICEREG1724(ice, SPDIF_CFG));
1138 outw(val, ICEMT1724(ice, SPDIF_CTRL));
1139 }
1140
1141 /* update SPDIF control bits according to the given rate */
1142 static void update_spdif_rate(struct snd_ice1712 *ice, unsigned int rate)
1143 {
1144 unsigned int val, nval;
1145 unsigned long flags;
1146
1147 spin_lock_irqsave(&ice->reg_lock, flags);
1148 nval = val = inw(ICEMT1724(ice, SPDIF_CTRL));
1149 nval &= ~(7 << 12);
1150 switch (rate) {
1151 case 44100: break;
1152 case 48000: nval |= 2 << 12; break;
1153 case 32000: nval |= 3 << 12; break;
1154 case 88200: nval |= 4 << 12; break;
1155 case 96000: nval |= 5 << 12; break;
1156 case 192000: nval |= 6 << 12; break;
1157 case 176400: nval |= 7 << 12; break;
1158 }
1159 if (val != nval)
1160 update_spdif_bits(ice, nval);
1161 spin_unlock_irqrestore(&ice->reg_lock, flags);
1162 }
1163
1164 static int snd_vt1724_playback_spdif_prepare(struct snd_pcm_substream *substream)
1165 {
1166 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1167 if (!ice->force_pdma4)
1168 update_spdif_rate(ice, substream->runtime->rate);
1169 return snd_vt1724_pcm_prepare(substream);
1170 }
1171
1172 static int snd_vt1724_playback_spdif_open(struct snd_pcm_substream *substream)
1173 {
1174 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1175 struct snd_pcm_runtime *runtime = substream->runtime;
1176
1177 runtime->private_data = (void *)&vt1724_playback_spdif_reg;
1178 ice->playback_con_substream = substream;
1179 if (ice->force_pdma4) {
1180 runtime->hw = snd_vt1724_2ch_stereo;
1181 set_rate_constraints(ice, substream);
1182 } else
1183 runtime->hw = snd_vt1724_spdif;
1184 snd_pcm_set_sync(substream);
1185 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
1186 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
1187 VT1724_BUFFER_ALIGN);
1188 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
1189 VT1724_BUFFER_ALIGN);
1190 if (ice->spdif.ops.open)
1191 ice->spdif.ops.open(ice, substream);
1192 return 0;
1193 }
1194
1195 static int snd_vt1724_playback_spdif_close(struct snd_pcm_substream *substream)
1196 {
1197 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1198
1199 if (PRO_RATE_RESET)
1200 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
1201 ice->playback_con_substream = NULL;
1202 if (ice->spdif.ops.close)
1203 ice->spdif.ops.close(ice, substream);
1204
1205 return 0;
1206 }
1207
1208 static int snd_vt1724_capture_spdif_open(struct snd_pcm_substream *substream)
1209 {
1210 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1211 struct snd_pcm_runtime *runtime = substream->runtime;
1212
1213 runtime->private_data = (void *)&vt1724_capture_spdif_reg;
1214 ice->capture_con_substream = substream;
1215 if (ice->force_rdma1) {
1216 runtime->hw = snd_vt1724_2ch_stereo;
1217 set_rate_constraints(ice, substream);
1218 } else
1219 runtime->hw = snd_vt1724_spdif;
1220 snd_pcm_set_sync(substream);
1221 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
1222 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
1223 VT1724_BUFFER_ALIGN);
1224 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
1225 VT1724_BUFFER_ALIGN);
1226 if (ice->spdif.ops.open)
1227 ice->spdif.ops.open(ice, substream);
1228 return 0;
1229 }
1230
1231 static int snd_vt1724_capture_spdif_close(struct snd_pcm_substream *substream)
1232 {
1233 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1234
1235 if (PRO_RATE_RESET)
1236 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
1237 ice->capture_con_substream = NULL;
1238 if (ice->spdif.ops.close)
1239 ice->spdif.ops.close(ice, substream);
1240
1241 return 0;
1242 }
1243
1244 static struct snd_pcm_ops snd_vt1724_playback_spdif_ops = {
1245 .open = snd_vt1724_playback_spdif_open,
1246 .close = snd_vt1724_playback_spdif_close,
1247 .ioctl = snd_pcm_lib_ioctl,
1248 .hw_params = snd_vt1724_pcm_hw_params,
1249 .hw_free = snd_vt1724_pcm_hw_free,
1250 .prepare = snd_vt1724_playback_spdif_prepare,
1251 .trigger = snd_vt1724_pcm_trigger,
1252 .pointer = snd_vt1724_pcm_pointer,
1253 };
1254
1255 static struct snd_pcm_ops snd_vt1724_capture_spdif_ops = {
1256 .open = snd_vt1724_capture_spdif_open,
1257 .close = snd_vt1724_capture_spdif_close,
1258 .ioctl = snd_pcm_lib_ioctl,
1259 .hw_params = snd_vt1724_pcm_hw_params,
1260 .hw_free = snd_vt1724_pcm_hw_free,
1261 .prepare = snd_vt1724_pcm_prepare,
1262 .trigger = snd_vt1724_pcm_trigger,
1263 .pointer = snd_vt1724_pcm_pointer,
1264 };
1265
1266
1267 static int __devinit snd_vt1724_pcm_spdif(struct snd_ice1712 *ice, int device)
1268 {
1269 char *name;
1270 struct snd_pcm *pcm;
1271 int play, capt;
1272 int err;
1273
1274 if (ice->force_pdma4 ||
1275 (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_OUT_INT)) {
1276 play = 1;
1277 ice->has_spdif = 1;
1278 } else
1279 play = 0;
1280 if (ice->force_rdma1 ||
1281 (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_IN)) {
1282 capt = 1;
1283 ice->has_spdif = 1;
1284 } else
1285 capt = 0;
1286 if (!play && !capt)
1287 return 0; /* no spdif device */
1288
1289 if (ice->force_pdma4 || ice->force_rdma1)
1290 name = "ICE1724 Secondary";
1291 else
1292 name = "ICE1724 IEC958";
1293 err = snd_pcm_new(ice->card, name, device, play, capt, &pcm);
1294 if (err < 0)
1295 return err;
1296
1297 if (play)
1298 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
1299 &snd_vt1724_playback_spdif_ops);
1300 if (capt)
1301 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
1302 &snd_vt1724_capture_spdif_ops);
1303
1304 pcm->private_data = ice;
1305 pcm->info_flags = 0;
1306 strcpy(pcm->name, name);
1307
1308 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1309 snd_dma_pci_data(ice->pci),
1310 256*1024, 256*1024);
1311
1312 ice->pcm = pcm;
1313
1314 return 0;
1315 }
1316
1317
1318 /*
1319 * independent surround PCMs
1320 */
1321
1322 static const struct vt1724_pcm_reg vt1724_playback_dma_regs[3] = {
1323 {
1324 .addr = VT1724_MT_PDMA1_ADDR,
1325 .size = VT1724_MT_PDMA1_SIZE,
1326 .count = VT1724_MT_PDMA1_COUNT,
1327 .start = VT1724_PDMA1_START,
1328 },
1329 {
1330 .addr = VT1724_MT_PDMA2_ADDR,
1331 .size = VT1724_MT_PDMA2_SIZE,
1332 .count = VT1724_MT_PDMA2_COUNT,
1333 .start = VT1724_PDMA2_START,
1334 },
1335 {
1336 .addr = VT1724_MT_PDMA3_ADDR,
1337 .size = VT1724_MT_PDMA3_SIZE,
1338 .count = VT1724_MT_PDMA3_COUNT,
1339 .start = VT1724_PDMA3_START,
1340 },
1341 };
1342
1343 static int snd_vt1724_playback_indep_prepare(struct snd_pcm_substream *substream)
1344 {
1345 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1346 unsigned char val;
1347
1348 spin_lock_irq(&ice->reg_lock);
1349 val = 3 - substream->number;
1350 if (inb(ICEMT1724(ice, BURST)) < val)
1351 outb(val, ICEMT1724(ice, BURST));
1352 spin_unlock_irq(&ice->reg_lock);
1353 return snd_vt1724_pcm_prepare(substream);
1354 }
1355
1356 static int snd_vt1724_playback_indep_open(struct snd_pcm_substream *substream)
1357 {
1358 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1359 struct snd_pcm_runtime *runtime = substream->runtime;
1360
1361 mutex_lock(&ice->open_mutex);
1362 /* already used by PDMA0? */
1363 if (ice->pcm_reserved[substream->number]) {
1364 mutex_unlock(&ice->open_mutex);
1365 return -EBUSY;
1366 }
1367 mutex_unlock(&ice->open_mutex);
1368 runtime->private_data = (void *)&vt1724_playback_dma_regs[substream->number];
1369 ice->playback_con_substream_ds[substream->number] = substream;
1370 runtime->hw = snd_vt1724_2ch_stereo;
1371 snd_pcm_set_sync(substream);
1372 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
1373 set_rate_constraints(ice, substream);
1374 return 0;
1375 }
1376
1377 static int snd_vt1724_playback_indep_close(struct snd_pcm_substream *substream)
1378 {
1379 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1380
1381 if (PRO_RATE_RESET)
1382 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
1383 ice->playback_con_substream_ds[substream->number] = NULL;
1384 ice->pcm_reserved[substream->number] = NULL;
1385
1386 return 0;
1387 }
1388
1389 static struct snd_pcm_ops snd_vt1724_playback_indep_ops = {
1390 .open = snd_vt1724_playback_indep_open,
1391 .close = snd_vt1724_playback_indep_close,
1392 .ioctl = snd_pcm_lib_ioctl,
1393 .hw_params = snd_vt1724_pcm_hw_params,
1394 .hw_free = snd_vt1724_pcm_hw_free,
1395 .prepare = snd_vt1724_playback_indep_prepare,
1396 .trigger = snd_vt1724_pcm_trigger,
1397 .pointer = snd_vt1724_pcm_pointer,
1398 };
1399
1400
1401 static int __devinit snd_vt1724_pcm_indep(struct snd_ice1712 *ice, int device)
1402 {
1403 struct snd_pcm *pcm;
1404 int play;
1405 int err;
1406
1407 play = ice->num_total_dacs / 2 - 1;
1408 if (play <= 0)
1409 return 0;
1410
1411 err = snd_pcm_new(ice->card, "ICE1724 Surrounds", device, play, 0, &pcm);
1412 if (err < 0)
1413 return err;
1414
1415 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
1416 &snd_vt1724_playback_indep_ops);
1417
1418 pcm->private_data = ice;
1419 pcm->info_flags = 0;
1420 strcpy(pcm->name, "ICE1724 Surround PCM");
1421
1422 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1423 snd_dma_pci_data(ice->pci),
1424 256*1024, 256*1024);
1425
1426 ice->pcm_ds = pcm;
1427
1428 return 0;
1429 }
1430
1431
1432 /*
1433 * Mixer section
1434 */
1435
1436 static int __devinit snd_vt1724_ac97_mixer(struct snd_ice1712 *ice)
1437 {
1438 int err;
1439
1440 if (!(ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S)) {
1441 struct snd_ac97_bus *pbus;
1442 struct snd_ac97_template ac97;
1443 static struct snd_ac97_bus_ops ops = {
1444 .write = snd_vt1724_ac97_write,
1445 .read = snd_vt1724_ac97_read,
1446 };
1447
1448 /* cold reset */
1449 outb(inb(ICEMT1724(ice, AC97_CMD)) | 0x80, ICEMT1724(ice, AC97_CMD));
1450 mdelay(5);
1451 outb(inb(ICEMT1724(ice, AC97_CMD)) & ~0x80, ICEMT1724(ice, AC97_CMD));
1452
1453 err = snd_ac97_bus(ice->card, 0, &ops, NULL, &pbus);
1454 if (err < 0)
1455 return err;
1456 memset(&ac97, 0, sizeof(ac97));
1457 ac97.private_data = ice;
1458 err = snd_ac97_mixer(pbus, &ac97, &ice->ac97);
1459 if (err < 0)
1460 printk(KERN_WARNING "ice1712: cannot initialize pro ac97, skipped\n");
1461 else
1462 return 0;
1463 }
1464 /* I2S mixer only */
1465 strcat(ice->card->mixername, "ICE1724 - multitrack");
1466 return 0;
1467 }
1468
1469 /*
1470 *
1471 */
1472
1473 static inline unsigned int eeprom_triple(struct snd_ice1712 *ice, int idx)
1474 {
1475 return (unsigned int)ice->eeprom.data[idx] | \
1476 ((unsigned int)ice->eeprom.data[idx + 1] << 8) | \
1477 ((unsigned int)ice->eeprom.data[idx + 2] << 16);
1478 }
1479
1480 static void snd_vt1724_proc_read(struct snd_info_entry *entry,
1481 struct snd_info_buffer *buffer)
1482 {
1483 struct snd_ice1712 *ice = entry->private_data;
1484 unsigned int idx;
1485
1486 snd_iprintf(buffer, "%s\n\n", ice->card->longname);
1487 snd_iprintf(buffer, "EEPROM:\n");
1488
1489 snd_iprintf(buffer, " Subvendor : 0x%x\n", ice->eeprom.subvendor);
1490 snd_iprintf(buffer, " Size : %i bytes\n", ice->eeprom.size);
1491 snd_iprintf(buffer, " Version : %i\n", ice->eeprom.version);
1492 snd_iprintf(buffer, " System Config : 0x%x\n",
1493 ice->eeprom.data[ICE_EEP2_SYSCONF]);
1494 snd_iprintf(buffer, " ACLink : 0x%x\n",
1495 ice->eeprom.data[ICE_EEP2_ACLINK]);
1496 snd_iprintf(buffer, " I2S : 0x%x\n",
1497 ice->eeprom.data[ICE_EEP2_I2S]);
1498 snd_iprintf(buffer, " S/PDIF : 0x%x\n",
1499 ice->eeprom.data[ICE_EEP2_SPDIF]);
1500 snd_iprintf(buffer, " GPIO direction : 0x%x\n",
1501 ice->eeprom.gpiodir);
1502 snd_iprintf(buffer, " GPIO mask : 0x%x\n",
1503 ice->eeprom.gpiomask);
1504 snd_iprintf(buffer, " GPIO state : 0x%x\n",
1505 ice->eeprom.gpiostate);
1506 for (idx = 0x12; idx < ice->eeprom.size; idx++)
1507 snd_iprintf(buffer, " Extra #%02i : 0x%x\n",
1508 idx, ice->eeprom.data[idx]);
1509
1510 snd_iprintf(buffer, "\nRegisters:\n");
1511
1512 snd_iprintf(buffer, " PSDOUT03 : 0x%08x\n",
1513 (unsigned)inl(ICEMT1724(ice, ROUTE_PLAYBACK)));
1514 for (idx = 0x0; idx < 0x20 ; idx++)
1515 snd_iprintf(buffer, " CCS%02x : 0x%02x\n",
1516 idx, inb(ice->port+idx));
1517 for (idx = 0x0; idx < 0x30 ; idx++)
1518 snd_iprintf(buffer, " MT%02x : 0x%02x\n",
1519 idx, inb(ice->profi_port+idx));
1520 }
1521
1522 static void __devinit snd_vt1724_proc_init(struct snd_ice1712 *ice)
1523 {
1524 struct snd_info_entry *entry;
1525
1526 if (!snd_card_proc_new(ice->card, "ice1724", &entry))
1527 snd_info_set_text_ops(entry, ice, snd_vt1724_proc_read);
1528 }
1529
1530 /*
1531 *
1532 */
1533
1534 static int snd_vt1724_eeprom_info(struct snd_kcontrol *kcontrol,
1535 struct snd_ctl_elem_info *uinfo)
1536 {
1537 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
1538 uinfo->count = sizeof(struct snd_ice1712_eeprom);
1539 return 0;
1540 }
1541
1542 static int snd_vt1724_eeprom_get(struct snd_kcontrol *kcontrol,
1543 struct snd_ctl_elem_value *ucontrol)
1544 {
1545 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1546
1547 memcpy(ucontrol->value.bytes.data, &ice->eeprom, sizeof(ice->eeprom));
1548 return 0;
1549 }
1550
1551 static struct snd_kcontrol_new snd_vt1724_eeprom __devinitdata = {
1552 .iface = SNDRV_CTL_ELEM_IFACE_CARD,
1553 .name = "ICE1724 EEPROM",
1554 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1555 .info = snd_vt1724_eeprom_info,
1556 .get = snd_vt1724_eeprom_get
1557 };
1558
1559 /*
1560 */
1561 static int snd_vt1724_spdif_info(struct snd_kcontrol *kcontrol,
1562 struct snd_ctl_elem_info *uinfo)
1563 {
1564 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1565 uinfo->count = 1;
1566 return 0;
1567 }
1568
1569 static unsigned int encode_spdif_bits(struct snd_aes_iec958 *diga)
1570 {
1571 unsigned int val, rbits;
1572
1573 val = diga->status[0] & 0x03; /* professional, non-audio */
1574 if (val & 0x01) {
1575 /* professional */
1576 if ((diga->status[0] & IEC958_AES0_PRO_EMPHASIS) ==
1577 IEC958_AES0_PRO_EMPHASIS_5015)
1578 val |= 1U << 3;
1579 rbits = (diga->status[4] >> 3) & 0x0f;
1580 if (rbits) {
1581 switch (rbits) {
1582 case 2: val |= 5 << 12; break; /* 96k */
1583 case 3: val |= 6 << 12; break; /* 192k */
1584 case 10: val |= 4 << 12; break; /* 88.2k */
1585 case 11: val |= 7 << 12; break; /* 176.4k */
1586 }
1587 } else {
1588 switch (diga->status[0] & IEC958_AES0_PRO_FS) {
1589 case IEC958_AES0_PRO_FS_44100:
1590 break;
1591 case IEC958_AES0_PRO_FS_32000:
1592 val |= 3U << 12;
1593 break;
1594 default:
1595 val |= 2U << 12;
1596 break;
1597 }
1598 }
1599 } else {
1600 /* consumer */
1601 val |= diga->status[1] & 0x04; /* copyright */
1602 if ((diga->status[0] & IEC958_AES0_CON_EMPHASIS) ==
1603 IEC958_AES0_CON_EMPHASIS_5015)
1604 val |= 1U << 3;
1605 val |= (unsigned int)(diga->status[1] & 0x3f) << 4; /* category */
1606 val |= (unsigned int)(diga->status[3] & IEC958_AES3_CON_FS) << 12; /* fs */
1607 }
1608 return val;
1609 }
1610
1611 static void decode_spdif_bits(struct snd_aes_iec958 *diga, unsigned int val)
1612 {
1613 memset(diga->status, 0, sizeof(diga->status));
1614 diga->status[0] = val & 0x03; /* professional, non-audio */
1615 if (val & 0x01) {
1616 /* professional */
1617 if (val & (1U << 3))
1618 diga->status[0] |= IEC958_AES0_PRO_EMPHASIS_5015;
1619 switch ((val >> 12) & 0x7) {
1620 case 0:
1621 break;
1622 case 2:
1623 diga->status[0] |= IEC958_AES0_PRO_FS_32000;
1624 break;
1625 default:
1626 diga->status[0] |= IEC958_AES0_PRO_FS_48000;
1627 break;
1628 }
1629 } else {
1630 /* consumer */
1631 diga->status[0] |= val & (1U << 2); /* copyright */
1632 if (val & (1U << 3))
1633 diga->status[0] |= IEC958_AES0_CON_EMPHASIS_5015;
1634 diga->status[1] |= (val >> 4) & 0x3f; /* category */
1635 diga->status[3] |= (val >> 12) & 0x07; /* fs */
1636 }
1637 }
1638
1639 static int snd_vt1724_spdif_default_get(struct snd_kcontrol *kcontrol,
1640 struct snd_ctl_elem_value *ucontrol)
1641 {
1642 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1643 unsigned int val;
1644 val = inw(ICEMT1724(ice, SPDIF_CTRL));
1645 decode_spdif_bits(&ucontrol->value.iec958, val);
1646 return 0;
1647 }
1648
1649 static int snd_vt1724_spdif_default_put(struct snd_kcontrol *kcontrol,
1650 struct snd_ctl_elem_value *ucontrol)
1651 {
1652 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1653 unsigned int val, old;
1654
1655 val = encode_spdif_bits(&ucontrol->value.iec958);
1656 spin_lock_irq(&ice->reg_lock);
1657 old = inw(ICEMT1724(ice, SPDIF_CTRL));
1658 if (val != old)
1659 update_spdif_bits(ice, val);
1660 spin_unlock_irq(&ice->reg_lock);
1661 return val != old;
1662 }
1663
1664 static struct snd_kcontrol_new snd_vt1724_spdif_default __devinitdata =
1665 {
1666 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1667 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, DEFAULT),
1668 .info = snd_vt1724_spdif_info,
1669 .get = snd_vt1724_spdif_default_get,
1670 .put = snd_vt1724_spdif_default_put
1671 };
1672
1673 static int snd_vt1724_spdif_maskc_get(struct snd_kcontrol *kcontrol,
1674 struct snd_ctl_elem_value *ucontrol)
1675 {
1676 ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
1677 IEC958_AES0_PROFESSIONAL |
1678 IEC958_AES0_CON_NOT_COPYRIGHT |
1679 IEC958_AES0_CON_EMPHASIS;
1680 ucontrol->value.iec958.status[1] = IEC958_AES1_CON_ORIGINAL |
1681 IEC958_AES1_CON_CATEGORY;
1682 ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS;
1683 return 0;
1684 }
1685
1686 static int snd_vt1724_spdif_maskp_get(struct snd_kcontrol *kcontrol,
1687 struct snd_ctl_elem_value *ucontrol)
1688 {
1689 ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
1690 IEC958_AES0_PROFESSIONAL |
1691 IEC958_AES0_PRO_FS |
1692 IEC958_AES0_PRO_EMPHASIS;
1693 return 0;
1694 }
1695
1696 static struct snd_kcontrol_new snd_vt1724_spdif_maskc __devinitdata =
1697 {
1698 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1699 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1700 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, CON_MASK),
1701 .info = snd_vt1724_spdif_info,
1702 .get = snd_vt1724_spdif_maskc_get,
1703 };
1704
1705 static struct snd_kcontrol_new snd_vt1724_spdif_maskp __devinitdata =
1706 {
1707 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1708 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1709 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, PRO_MASK),
1710 .info = snd_vt1724_spdif_info,
1711 .get = snd_vt1724_spdif_maskp_get,
1712 };
1713
1714 #define snd_vt1724_spdif_sw_info snd_ctl_boolean_mono_info
1715
1716 static int snd_vt1724_spdif_sw_get(struct snd_kcontrol *kcontrol,
1717 struct snd_ctl_elem_value *ucontrol)
1718 {
1719 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1720 ucontrol->value.integer.value[0] = inb(ICEREG1724(ice, SPDIF_CFG)) &
1721 VT1724_CFG_SPDIF_OUT_EN ? 1 : 0;
1722 return 0;
1723 }
1724
1725 static int snd_vt1724_spdif_sw_put(struct snd_kcontrol *kcontrol,
1726 struct snd_ctl_elem_value *ucontrol)
1727 {
1728 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1729 unsigned char old, val;
1730
1731 spin_lock_irq(&ice->reg_lock);
1732 old = val = inb(ICEREG1724(ice, SPDIF_CFG));
1733 val &= ~VT1724_CFG_SPDIF_OUT_EN;
1734 if (ucontrol->value.integer.value[0])
1735 val |= VT1724_CFG_SPDIF_OUT_EN;
1736 if (old != val)
1737 outb(val, ICEREG1724(ice, SPDIF_CFG));
1738 spin_unlock_irq(&ice->reg_lock);
1739 return old != val;
1740 }
1741
1742 static struct snd_kcontrol_new snd_vt1724_spdif_switch __devinitdata =
1743 {
1744 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1745 /* .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, SWITCH), */
1746 .name = SNDRV_CTL_NAME_IEC958("Output ", NONE, SWITCH),
1747 .info = snd_vt1724_spdif_sw_info,
1748 .get = snd_vt1724_spdif_sw_get,
1749 .put = snd_vt1724_spdif_sw_put
1750 };
1751
1752
1753
1754 /*
1755 * rate
1756 */
1757 static int snd_vt1724_pro_internal_clock_info(struct snd_kcontrol *kcontrol,
1758 struct snd_ctl_elem_info *uinfo)
1759 {
1760 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1761 int hw_rates_count = ice->hw_rates->count;
1762 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1763 uinfo->count = 1;
1764
1765 uinfo->value.enumerated.items = hw_rates_count + ice->ext_clock_count;
1766 /* upper limit - keep at top */
1767 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1768 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1769 if (uinfo->value.enumerated.item >= hw_rates_count)
1770 /* ext_clock items */
1771 strcpy(uinfo->value.enumerated.name,
1772 ice->ext_clock_names[
1773 uinfo->value.enumerated.item - hw_rates_count]);
1774 else
1775 /* int clock items */
1776 sprintf(uinfo->value.enumerated.name, "%d",
1777 ice->hw_rates->list[uinfo->value.enumerated.item]);
1778 return 0;
1779 }
1780
1781 static int snd_vt1724_pro_internal_clock_get(struct snd_kcontrol *kcontrol,
1782 struct snd_ctl_elem_value *ucontrol)
1783 {
1784 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1785 unsigned int i, rate;
1786
1787 spin_lock_irq(&ice->reg_lock);
1788 if (ice->is_spdif_master(ice)) {
1789 ucontrol->value.enumerated.item[0] = ice->hw_rates->count +
1790 ice->get_spdif_master_type(ice);
1791 } else {
1792 rate = ice->get_rate(ice);
1793 ucontrol->value.enumerated.item[0] = 0;
1794 for (i = 0; i < ice->hw_rates->count; i++) {
1795 if (ice->hw_rates->list[i] == rate) {
1796 ucontrol->value.enumerated.item[0] = i;
1797 break;
1798 }
1799 }
1800 }
1801 spin_unlock_irq(&ice->reg_lock);
1802 return 0;
1803 }
1804
1805 static int stdclock_get_spdif_master_type(struct snd_ice1712 *ice)
1806 {
1807 /* standard external clock - only single type - SPDIF IN */
1808 return 0;
1809 }
1810
1811 /* setting clock to external - SPDIF */
1812 static int stdclock_set_spdif_clock(struct snd_ice1712 *ice, int type)
1813 {
1814 unsigned char oval;
1815 unsigned char i2s_oval;
1816 oval = inb(ICEMT1724(ice, RATE));
1817 outb(oval | VT1724_SPDIF_MASTER, ICEMT1724(ice, RATE));
1818 /* setting 256fs */
1819 i2s_oval = inb(ICEMT1724(ice, I2S_FORMAT));
1820 outb(i2s_oval & ~VT1724_MT_I2S_MCLK_128X, ICEMT1724(ice, I2S_FORMAT));
1821 return 0;
1822 }
1823
1824
1825 static int snd_vt1724_pro_internal_clock_put(struct snd_kcontrol *kcontrol,
1826 struct snd_ctl_elem_value *ucontrol)
1827 {
1828 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1829 unsigned int old_rate, new_rate;
1830 unsigned int item = ucontrol->value.enumerated.item[0];
1831 unsigned int first_ext_clock = ice->hw_rates->count;
1832
1833 if (item > first_ext_clock + ice->ext_clock_count - 1)
1834 return -EINVAL;
1835
1836 /* if rate = 0 => external clock */
1837 spin_lock_irq(&ice->reg_lock);
1838 if (ice->is_spdif_master(ice))
1839 old_rate = 0;
1840 else
1841 old_rate = ice->get_rate(ice);
1842 if (item >= first_ext_clock) {
1843 /* switching to external clock */
1844 ice->set_spdif_clock(ice, item - first_ext_clock);
1845 new_rate = 0;
1846 } else {
1847 /* internal on-card clock */
1848 new_rate = ice->hw_rates->list[item];
1849 ice->pro_rate_default = new_rate;
1850 spin_unlock_irq(&ice->reg_lock);
1851 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 1);
1852 spin_lock_irq(&ice->reg_lock);
1853 }
1854 spin_unlock_irq(&ice->reg_lock);
1855
1856 /* the first switch to the ext. clock mode? */
1857 if (old_rate != new_rate && !new_rate) {
1858 /* notify akm chips as well */
1859 unsigned int i;
1860 if (ice->gpio.set_pro_rate)
1861 ice->gpio.set_pro_rate(ice, 0);
1862 for (i = 0; i < ice->akm_codecs; i++) {
1863 if (ice->akm[i].ops.set_rate_val)
1864 ice->akm[i].ops.set_rate_val(&ice->akm[i], 0);
1865 }
1866 }
1867 return old_rate != new_rate;
1868 }
1869
1870 static struct snd_kcontrol_new snd_vt1724_pro_internal_clock __devinitdata = {
1871 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1872 .name = "Multi Track Internal Clock",
1873 .info = snd_vt1724_pro_internal_clock_info,
1874 .get = snd_vt1724_pro_internal_clock_get,
1875 .put = snd_vt1724_pro_internal_clock_put
1876 };
1877
1878 #define snd_vt1724_pro_rate_locking_info snd_ctl_boolean_mono_info
1879
1880 static int snd_vt1724_pro_rate_locking_get(struct snd_kcontrol *kcontrol,
1881 struct snd_ctl_elem_value *ucontrol)
1882 {
1883 ucontrol->value.integer.value[0] = PRO_RATE_LOCKED;
1884 return 0;
1885 }
1886
1887 static int snd_vt1724_pro_rate_locking_put(struct snd_kcontrol *kcontrol,
1888 struct snd_ctl_elem_value *ucontrol)
1889 {
1890 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1891 int change = 0, nval;
1892
1893 nval = ucontrol->value.integer.value[0] ? 1 : 0;
1894 spin_lock_irq(&ice->reg_lock);
1895 change = PRO_RATE_LOCKED != nval;
1896 PRO_RATE_LOCKED = nval;
1897 spin_unlock_irq(&ice->reg_lock);
1898 return change;
1899 }
1900
1901 static struct snd_kcontrol_new snd_vt1724_pro_rate_locking __devinitdata = {
1902 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1903 .name = "Multi Track Rate Locking",
1904 .info = snd_vt1724_pro_rate_locking_info,
1905 .get = snd_vt1724_pro_rate_locking_get,
1906 .put = snd_vt1724_pro_rate_locking_put
1907 };
1908
1909 #define snd_vt1724_pro_rate_reset_info snd_ctl_boolean_mono_info
1910
1911 static int snd_vt1724_pro_rate_reset_get(struct snd_kcontrol *kcontrol,
1912 struct snd_ctl_elem_value *ucontrol)
1913 {
1914 ucontrol->value.integer.value[0] = PRO_RATE_RESET ? 1 : 0;
1915 return 0;
1916 }
1917
1918 static int snd_vt1724_pro_rate_reset_put(struct snd_kcontrol *kcontrol,
1919 struct snd_ctl_elem_value *ucontrol)
1920 {
1921 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1922 int change = 0, nval;
1923
1924 nval = ucontrol->value.integer.value[0] ? 1 : 0;
1925 spin_lock_irq(&ice->reg_lock);
1926 change = PRO_RATE_RESET != nval;
1927 PRO_RATE_RESET = nval;
1928 spin_unlock_irq(&ice->reg_lock);
1929 return change;
1930 }
1931
1932 static struct snd_kcontrol_new snd_vt1724_pro_rate_reset __devinitdata = {
1933 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1934 .name = "Multi Track Rate Reset",
1935 .info = snd_vt1724_pro_rate_reset_info,
1936 .get = snd_vt1724_pro_rate_reset_get,
1937 .put = snd_vt1724_pro_rate_reset_put
1938 };
1939
1940
1941 /*
1942 * routing
1943 */
1944 static int snd_vt1724_pro_route_info(struct snd_kcontrol *kcontrol,
1945 struct snd_ctl_elem_info *uinfo)
1946 {
1947 static char *texts[] = {
1948 "PCM Out", /* 0 */
1949 "H/W In 0", "H/W In 1", /* 1-2 */
1950 "IEC958 In L", "IEC958 In R", /* 3-4 */
1951 };
1952
1953 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1954 uinfo->count = 1;
1955 uinfo->value.enumerated.items = 5;
1956 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1957 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1958 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1959 return 0;
1960 }
1961
1962 static inline int analog_route_shift(int idx)
1963 {
1964 return (idx % 2) * 12 + ((idx / 2) * 3) + 8;
1965 }
1966
1967 static inline int digital_route_shift(int idx)
1968 {
1969 return idx * 3;
1970 }
1971
1972 int snd_ice1724_get_route_val(struct snd_ice1712 *ice, int shift)
1973 {
1974 unsigned long val;
1975 unsigned char eitem;
1976 static const unsigned char xlate[8] = {
1977 0, 255, 1, 2, 255, 255, 3, 4,
1978 };
1979
1980 val = inl(ICEMT1724(ice, ROUTE_PLAYBACK));
1981 val >>= shift;
1982 val &= 7; /* we now have 3 bits per output */
1983 eitem = xlate[val];
1984 if (eitem == 255) {
1985 snd_BUG();
1986 return 0;
1987 }
1988 return eitem;
1989 }
1990
1991 int snd_ice1724_put_route_val(struct snd_ice1712 *ice, unsigned int val,
1992 int shift)
1993 {
1994 unsigned int old_val, nval;
1995 int change;
1996 static const unsigned char xroute[8] = {
1997 0, /* PCM */
1998 2, /* PSDIN0 Left */
1999 3, /* PSDIN0 Right */
2000 6, /* SPDIN Left */
2001 7, /* SPDIN Right */
2002 };
2003
2004 nval = xroute[val % 5];
2005 val = old_val = inl(ICEMT1724(ice, ROUTE_PLAYBACK));
2006 val &= ~(0x07 << shift);
2007 val |= nval << shift;
2008 change = val != old_val;
2009 if (change)
2010 outl(val, ICEMT1724(ice, ROUTE_PLAYBACK));
2011 return change;
2012 }
2013
2014 static int snd_vt1724_pro_route_analog_get(struct snd_kcontrol *kcontrol,
2015 struct snd_ctl_elem_value *ucontrol)
2016 {
2017 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2018 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2019 ucontrol->value.enumerated.item[0] =
2020 snd_ice1724_get_route_val(ice, analog_route_shift(idx));
2021 return 0;
2022 }
2023
2024 static int snd_vt1724_pro_route_analog_put(struct snd_kcontrol *kcontrol,
2025 struct snd_ctl_elem_value *ucontrol)
2026 {
2027 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2028 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2029 return snd_ice1724_put_route_val(ice,
2030 ucontrol->value.enumerated.item[0],
2031 analog_route_shift(idx));
2032 }
2033
2034 static int snd_vt1724_pro_route_spdif_get(struct snd_kcontrol *kcontrol,
2035 struct snd_ctl_elem_value *ucontrol)
2036 {
2037 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2038 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2039 ucontrol->value.enumerated.item[0] =
2040 snd_ice1724_get_route_val(ice, digital_route_shift(idx));
2041 return 0;
2042 }
2043
2044 static int snd_vt1724_pro_route_spdif_put(struct snd_kcontrol *kcontrol,
2045 struct snd_ctl_elem_value *ucontrol)
2046 {
2047 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2048 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2049 return snd_ice1724_put_route_val(ice,
2050 ucontrol->value.enumerated.item[0],
2051 digital_route_shift(idx));
2052 }
2053
2054 static struct snd_kcontrol_new snd_vt1724_mixer_pro_analog_route __devinitdata =
2055 {
2056 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2057 .name = "H/W Playback Route",
2058 .info = snd_vt1724_pro_route_info,
2059 .get = snd_vt1724_pro_route_analog_get,
2060 .put = snd_vt1724_pro_route_analog_put,
2061 };
2062
2063 static struct snd_kcontrol_new snd_vt1724_mixer_pro_spdif_route __devinitdata = {
2064 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2065 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, NONE) "Route",
2066 .info = snd_vt1724_pro_route_info,
2067 .get = snd_vt1724_pro_route_spdif_get,
2068 .put = snd_vt1724_pro_route_spdif_put,
2069 .count = 2,
2070 };
2071
2072
2073 static int snd_vt1724_pro_peak_info(struct snd_kcontrol *kcontrol,
2074 struct snd_ctl_elem_info *uinfo)
2075 {
2076 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
2077 uinfo->count = 22;
2078 uinfo->value.integer.min = 0;
2079 uinfo->value.integer.max = 255;
2080 return 0;
2081 }
2082
2083 static int snd_vt1724_pro_peak_get(struct snd_kcontrol *kcontrol,
2084 struct snd_ctl_elem_value *ucontrol)
2085 {
2086 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2087 int idx;
2088
2089 spin_lock_irq(&ice->reg_lock);
2090 for (idx = 0; idx < 22; idx++) {
2091 outb(idx, ICEMT1724(ice, MONITOR_PEAKINDEX));
2092 ucontrol->value.integer.value[idx] =
2093 inb(ICEMT1724(ice, MONITOR_PEAKDATA));
2094 }
2095 spin_unlock_irq(&ice->reg_lock);
2096 return 0;
2097 }
2098
2099 static struct snd_kcontrol_new snd_vt1724_mixer_pro_peak __devinitdata = {
2100 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
2101 .name = "Multi Track Peak",
2102 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
2103 .info = snd_vt1724_pro_peak_info,
2104 .get = snd_vt1724_pro_peak_get
2105 };
2106
2107 /*
2108 *
2109 */
2110
2111 static struct snd_ice1712_card_info no_matched __devinitdata;
2112
2113 static struct snd_ice1712_card_info *card_tables[] __devinitdata = {
2114 snd_vt1724_revo_cards,
2115 snd_vt1724_amp_cards,
2116 snd_vt1724_aureon_cards,
2117 snd_vt1720_mobo_cards,
2118 snd_vt1720_pontis_cards,
2119 snd_vt1724_prodigy_hifi_cards,
2120 snd_vt1724_prodigy192_cards,
2121 snd_vt1724_juli_cards,
2122 snd_vt1724_maya44_cards,
2123 snd_vt1724_phase_cards,
2124 snd_vt1724_wtm_cards,
2125 snd_vt1724_se_cards,
2126 snd_vt1724_qtet_cards,
2127 NULL,
2128 };
2129
2130
2131 /*
2132 */
2133
2134 static void wait_i2c_busy(struct snd_ice1712 *ice)
2135 {
2136 int t = 0x10000;
2137 while ((inb(ICEREG1724(ice, I2C_CTRL)) & VT1724_I2C_BUSY) && t--)
2138 ;
2139 if (t == -1)
2140 printk(KERN_ERR "ice1724: i2c busy timeout\n");
2141 }
2142
2143 unsigned char snd_vt1724_read_i2c(struct snd_ice1712 *ice,
2144 unsigned char dev, unsigned char addr)
2145 {
2146 unsigned char val;
2147
2148 mutex_lock(&ice->i2c_mutex);
2149 wait_i2c_busy(ice);
2150 outb(addr, ICEREG1724(ice, I2C_BYTE_ADDR));
2151 outb(dev & ~VT1724_I2C_WRITE, ICEREG1724(ice, I2C_DEV_ADDR));
2152 wait_i2c_busy(ice);
2153 val = inb(ICEREG1724(ice, I2C_DATA));
2154 mutex_unlock(&ice->i2c_mutex);
2155 /*
2156 printk(KERN_DEBUG "i2c_read: [0x%x,0x%x] = 0x%x\n", dev, addr, val);
2157 */
2158 return val;
2159 }
2160
2161 void snd_vt1724_write_i2c(struct snd_ice1712 *ice,
2162 unsigned char dev, unsigned char addr, unsigned char data)
2163 {
2164 mutex_lock(&ice->i2c_mutex);
2165 wait_i2c_busy(ice);
2166 /*
2167 printk(KERN_DEBUG "i2c_write: [0x%x,0x%x] = 0x%x\n", dev, addr, data);
2168 */
2169 outb(addr, ICEREG1724(ice, I2C_BYTE_ADDR));
2170 outb(data, ICEREG1724(ice, I2C_DATA));
2171 outb(dev | VT1724_I2C_WRITE, ICEREG1724(ice, I2C_DEV_ADDR));
2172 wait_i2c_busy(ice);
2173 mutex_unlock(&ice->i2c_mutex);
2174 }
2175
2176 static int __devinit snd_vt1724_read_eeprom(struct snd_ice1712 *ice,
2177 const char *modelname)
2178 {
2179 const int dev = 0xa0; /* EEPROM device address */
2180 unsigned int i, size;
2181 struct snd_ice1712_card_info * const *tbl, *c;
2182
2183 if (!modelname || !*modelname) {
2184 ice->eeprom.subvendor = 0;
2185 if ((inb(ICEREG1724(ice, I2C_CTRL)) & VT1724_I2C_EEPROM) != 0)
2186 ice->eeprom.subvendor =
2187 (snd_vt1724_read_i2c(ice, dev, 0x00) << 0) |
2188 (snd_vt1724_read_i2c(ice, dev, 0x01) << 8) |
2189 (snd_vt1724_read_i2c(ice, dev, 0x02) << 16) |
2190 (snd_vt1724_read_i2c(ice, dev, 0x03) << 24);
2191 if (ice->eeprom.subvendor == 0 ||
2192 ice->eeprom.subvendor == (unsigned int)-1) {
2193 /* invalid subvendor from EEPROM, try the PCI
2194 * subststem ID instead
2195 */
2196 u16 vendor, device;
2197 pci_read_config_word(ice->pci, PCI_SUBSYSTEM_VENDOR_ID,
2198 &vendor);
2199 pci_read_config_word(ice->pci, PCI_SUBSYSTEM_ID, &device);
2200 ice->eeprom.subvendor =
2201 ((unsigned int)swab16(vendor) << 16) | swab16(device);
2202 if (ice->eeprom.subvendor == 0 ||
2203 ice->eeprom.subvendor == (unsigned int)-1) {
2204 printk(KERN_ERR "ice1724: No valid ID is found\n");
2205 return -ENXIO;
2206 }
2207 }
2208 }
2209 for (tbl = card_tables; *tbl; tbl++) {
2210 for (c = *tbl; c->subvendor; c++) {
2211 if (modelname && c->model &&
2212 !strcmp(modelname, c->model)) {
2213 printk(KERN_INFO "ice1724: Using board model %s\n",
2214 c->name);
2215 ice->eeprom.subvendor = c->subvendor;
2216 } else if (c->subvendor != ice->eeprom.subvendor)
2217 continue;
2218 if (!c->eeprom_size || !c->eeprom_data)
2219 goto found;
2220 /* if the EEPROM is given by the driver, use it */
2221 snd_printdd("using the defined eeprom..\n");
2222 ice->eeprom.version = 2;
2223 ice->eeprom.size = c->eeprom_size + 6;
2224 memcpy(ice->eeprom.data, c->eeprom_data, c->eeprom_size);
2225 goto read_skipped;
2226 }
2227 }
2228 printk(KERN_WARNING "ice1724: No matching model found for ID 0x%x\n",
2229 ice->eeprom.subvendor);
2230
2231 found:
2232 ice->eeprom.size = snd_vt1724_read_i2c(ice, dev, 0x04);
2233 if (ice->eeprom.size < 6)
2234 ice->eeprom.size = 32;
2235 else if (ice->eeprom.size > 32) {
2236 printk(KERN_ERR "ice1724: Invalid EEPROM (size = %i)\n",
2237 ice->eeprom.size);
2238 return -EIO;
2239 }
2240 ice->eeprom.version = snd_vt1724_read_i2c(ice, dev, 0x05);
2241 if (ice->eeprom.version != 2)
2242 printk(KERN_WARNING "ice1724: Invalid EEPROM version %i\n",
2243 ice->eeprom.version);
2244 size = ice->eeprom.size - 6;
2245 for (i = 0; i < size; i++)
2246 ice->eeprom.data[i] = snd_vt1724_read_i2c(ice, dev, i + 6);
2247
2248 read_skipped:
2249 ice->eeprom.gpiomask = eeprom_triple(ice, ICE_EEP2_GPIO_MASK);
2250 ice->eeprom.gpiostate = eeprom_triple(ice, ICE_EEP2_GPIO_STATE);
2251 ice->eeprom.gpiodir = eeprom_triple(ice, ICE_EEP2_GPIO_DIR);
2252
2253 return 0;
2254 }
2255
2256
2257
2258 static void snd_vt1724_chip_reset(struct snd_ice1712 *ice)
2259 {
2260 outb(VT1724_RESET , ICEREG1724(ice, CONTROL));
2261 inb(ICEREG1724(ice, CONTROL)); /* pci posting flush */
2262 msleep(10);
2263 outb(0, ICEREG1724(ice, CONTROL));
2264 inb(ICEREG1724(ice, CONTROL)); /* pci posting flush */
2265 msleep(10);
2266 }
2267
2268 static int snd_vt1724_chip_init(struct snd_ice1712 *ice)
2269 {
2270 outb(ice->eeprom.data[ICE_EEP2_SYSCONF], ICEREG1724(ice, SYS_CFG));
2271 outb(ice->eeprom.data[ICE_EEP2_ACLINK], ICEREG1724(ice, AC97_CFG));
2272 outb(ice->eeprom.data[ICE_EEP2_I2S], ICEREG1724(ice, I2S_FEATURES));
2273 outb(ice->eeprom.data[ICE_EEP2_SPDIF], ICEREG1724(ice, SPDIF_CFG));
2274
2275 ice->gpio.write_mask = ice->eeprom.gpiomask;
2276 ice->gpio.direction = ice->eeprom.gpiodir;
2277 snd_vt1724_set_gpio_mask(ice, ice->eeprom.gpiomask);
2278 snd_vt1724_set_gpio_dir(ice, ice->eeprom.gpiodir);
2279 snd_vt1724_set_gpio_data(ice, ice->eeprom.gpiostate);
2280
2281 outb(0, ICEREG1724(ice, POWERDOWN));
2282
2283 /* MPU_RX and TX irq masks are cleared later dynamically */
2284 outb(VT1724_IRQ_MPU_RX | VT1724_IRQ_MPU_TX , ICEREG1724(ice, IRQMASK));
2285
2286 /* don't handle FIFO overrun/underruns (just yet),
2287 * since they cause machine lockups
2288 */
2289 outb(VT1724_MULTI_FIFO_ERR, ICEMT1724(ice, DMA_INT_MASK));
2290
2291 return 0;
2292 }
2293
2294 static int __devinit snd_vt1724_spdif_build_controls(struct snd_ice1712 *ice)
2295 {
2296 int err;
2297 struct snd_kcontrol *kctl;
2298
2299 if (snd_BUG_ON(!ice->pcm))
2300 return -EIO;
2301
2302 if (!ice->own_routing) {
2303 err = snd_ctl_add(ice->card,
2304 snd_ctl_new1(&snd_vt1724_mixer_pro_spdif_route, ice));
2305 if (err < 0)
2306 return err;
2307 }
2308
2309 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_spdif_switch, ice));
2310 if (err < 0)
2311 return err;
2312
2313 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_default, ice));
2314 if (err < 0)
2315 return err;
2316 kctl->id.device = ice->pcm->device;
2317 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_maskc, ice));
2318 if (err < 0)
2319 return err;
2320 kctl->id.device = ice->pcm->device;
2321 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_maskp, ice));
2322 if (err < 0)
2323 return err;
2324 kctl->id.device = ice->pcm->device;
2325 return 0;
2326 }
2327
2328
2329 static int __devinit snd_vt1724_build_controls(struct snd_ice1712 *ice)
2330 {
2331 int err;
2332
2333 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_eeprom, ice));
2334 if (err < 0)
2335 return err;
2336 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_internal_clock, ice));
2337 if (err < 0)
2338 return err;
2339
2340 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_rate_locking, ice));
2341 if (err < 0)
2342 return err;
2343 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_rate_reset, ice));
2344 if (err < 0)
2345 return err;
2346
2347 if (!ice->own_routing && ice->num_total_dacs > 0) {
2348 struct snd_kcontrol_new tmp = snd_vt1724_mixer_pro_analog_route;
2349 tmp.count = ice->num_total_dacs;
2350 if (ice->vt1720 && tmp.count > 2)
2351 tmp.count = 2;
2352 err = snd_ctl_add(ice->card, snd_ctl_new1(&tmp, ice));
2353 if (err < 0)
2354 return err;
2355 }
2356
2357 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_mixer_pro_peak, ice));
2358 if (err < 0)
2359 return err;
2360
2361 return 0;
2362 }
2363
2364 static int snd_vt1724_free(struct snd_ice1712 *ice)
2365 {
2366 if (!ice->port)
2367 goto __hw_end;
2368 /* mask all interrupts */
2369 outb(0xff, ICEMT1724(ice, DMA_INT_MASK));
2370 outb(0xff, ICEREG1724(ice, IRQMASK));
2371 /* --- */
2372 __hw_end:
2373 if (ice->irq >= 0)
2374 free_irq(ice->irq, ice);
2375 pci_release_regions(ice->pci);
2376 snd_ice1712_akm4xxx_free(ice);
2377 pci_disable_device(ice->pci);
2378 kfree(ice->spec);
2379 kfree(ice);
2380 return 0;
2381 }
2382
2383 static int snd_vt1724_dev_free(struct snd_device *device)
2384 {
2385 struct snd_ice1712 *ice = device->device_data;
2386 return snd_vt1724_free(ice);
2387 }
2388
2389 static int __devinit snd_vt1724_create(struct snd_card *card,
2390 struct pci_dev *pci,
2391 const char *modelname,
2392 struct snd_ice1712 **r_ice1712)
2393 {
2394 struct snd_ice1712 *ice;
2395 int err;
2396 static struct snd_device_ops ops = {
2397 .dev_free = snd_vt1724_dev_free,
2398 };
2399
2400 *r_ice1712 = NULL;
2401
2402 /* enable PCI device */
2403 err = pci_enable_device(pci);
2404 if (err < 0)
2405 return err;
2406
2407 ice = kzalloc(sizeof(*ice), GFP_KERNEL);
2408 if (ice == NULL) {
2409 pci_disable_device(pci);
2410 return -ENOMEM;
2411 }
2412 ice->vt1724 = 1;
2413 spin_lock_init(&ice->reg_lock);
2414 mutex_init(&ice->gpio_mutex);
2415 mutex_init(&ice->open_mutex);
2416 mutex_init(&ice->i2c_mutex);
2417 ice->gpio.set_mask = snd_vt1724_set_gpio_mask;
2418 ice->gpio.get_mask = snd_vt1724_get_gpio_mask;
2419 ice->gpio.set_dir = snd_vt1724_set_gpio_dir;
2420 ice->gpio.get_dir = snd_vt1724_get_gpio_dir;
2421 ice->gpio.set_data = snd_vt1724_set_gpio_data;
2422 ice->gpio.get_data = snd_vt1724_get_gpio_data;
2423 ice->card = card;
2424 ice->pci = pci;
2425 ice->irq = -1;
2426 pci_set_master(pci);
2427 snd_vt1724_proc_init(ice);
2428 synchronize_irq(pci->irq);
2429
2430 card->private_data = ice;
2431
2432 err = pci_request_regions(pci, "ICE1724");
2433 if (err < 0) {
2434 kfree(ice);
2435 pci_disable_device(pci);
2436 return err;
2437 }
2438 ice->port = pci_resource_start(pci, 0);
2439 ice->profi_port = pci_resource_start(pci, 1);
2440
2441 if (request_irq(pci->irq, snd_vt1724_interrupt,
2442 IRQF_SHARED, "ICE1724", ice)) {
2443 snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
2444 snd_vt1724_free(ice);
2445 return -EIO;
2446 }
2447
2448 ice->irq = pci->irq;
2449
2450 snd_vt1724_chip_reset(ice);
2451 if (snd_vt1724_read_eeprom(ice, modelname) < 0) {
2452 snd_vt1724_free(ice);
2453 return -EIO;
2454 }
2455 if (snd_vt1724_chip_init(ice) < 0) {
2456 snd_vt1724_free(ice);
2457 return -EIO;
2458 }
2459
2460 err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, ice, &ops);
2461 if (err < 0) {
2462 snd_vt1724_free(ice);
2463 return err;
2464 }
2465
2466 snd_card_set_dev(card, &pci->dev);
2467
2468 *r_ice1712 = ice;
2469 return 0;
2470 }
2471
2472
2473 /*
2474 *
2475 * Registration
2476 *
2477 */
2478
2479 static int __devinit snd_vt1724_probe(struct pci_dev *pci,
2480 const struct pci_device_id *pci_id)
2481 {
2482 static int dev;
2483 struct snd_card *card;
2484 struct snd_ice1712 *ice;
2485 int pcm_dev = 0, err;
2486 struct snd_ice1712_card_info * const *tbl, *c;
2487
2488 if (dev >= SNDRV_CARDS)
2489 return -ENODEV;
2490 if (!enable[dev]) {
2491 dev++;
2492 return -ENOENT;
2493 }
2494
2495 err = snd_card_create(index[dev], id[dev], THIS_MODULE, 0, &card);
2496 if (err < 0)
2497 return err;
2498
2499 strcpy(card->driver, "ICE1724");
2500 strcpy(card->shortname, "ICEnsemble ICE1724");
2501
2502 err = snd_vt1724_create(card, pci, model[dev], &ice);
2503 if (err < 0) {
2504 snd_card_free(card);
2505 return err;
2506 }
2507
2508 /* field init before calling chip_init */
2509 ice->ext_clock_count = 0;
2510
2511 for (tbl = card_tables; *tbl; tbl++) {
2512 for (c = *tbl; c->subvendor; c++) {
2513 if (c->subvendor == ice->eeprom.subvendor) {
2514 strcpy(card->shortname, c->name);
2515 if (c->driver) /* specific driver? */
2516 strcpy(card->driver, c->driver);
2517 if (c->chip_init) {
2518 err = c->chip_init(ice);
2519 if (err < 0) {
2520 snd_card_free(card);
2521 return err;
2522 }
2523 }
2524 goto __found;
2525 }
2526 }
2527 }
2528 c = &no_matched;
2529 __found:
2530 /*
2531 * VT1724 has separate DMAs for the analog and the SPDIF streams while
2532 * ICE1712 has only one for both (mixed up).
2533 *
2534 * Confusingly the analog PCM is named "professional" here because it
2535 * was called so in ice1712 driver, and vt1724 driver is derived from
2536 * ice1712 driver.
2537 */
2538 ice->pro_rate_default = PRO_RATE_DEFAULT;
2539 if (!ice->is_spdif_master)
2540 ice->is_spdif_master = stdclock_is_spdif_master;
2541 if (!ice->get_rate)
2542 ice->get_rate = stdclock_get_rate;
2543 if (!ice->set_rate)
2544 ice->set_rate = stdclock_set_rate;
2545 if (!ice->set_mclk)
2546 ice->set_mclk = stdclock_set_mclk;
2547 if (!ice->set_spdif_clock)
2548 ice->set_spdif_clock = stdclock_set_spdif_clock;
2549 if (!ice->get_spdif_master_type)
2550 ice->get_spdif_master_type = stdclock_get_spdif_master_type;
2551 if (!ice->ext_clock_names)
2552 ice->ext_clock_names = ext_clock_names;
2553 if (!ice->ext_clock_count)
2554 ice->ext_clock_count = ARRAY_SIZE(ext_clock_names);
2555
2556 if (!ice->hw_rates)
2557 set_std_hw_rates(ice);
2558
2559 err = snd_vt1724_pcm_profi(ice, pcm_dev++);
2560 if (err < 0) {
2561 snd_card_free(card);
2562 return err;
2563 }
2564
2565 err = snd_vt1724_pcm_spdif(ice, pcm_dev++);
2566 if (err < 0) {
2567 snd_card_free(card);
2568 return err;
2569 }
2570
2571 err = snd_vt1724_pcm_indep(ice, pcm_dev++);
2572 if (err < 0) {
2573 snd_card_free(card);
2574 return err;
2575 }
2576
2577 err = snd_vt1724_ac97_mixer(ice);
2578 if (err < 0) {
2579 snd_card_free(card);
2580 return err;
2581 }
2582
2583 err = snd_vt1724_build_controls(ice);
2584 if (err < 0) {
2585 snd_card_free(card);
2586 return err;
2587 }
2588
2589 if (ice->pcm && ice->has_spdif) { /* has SPDIF I/O */
2590 err = snd_vt1724_spdif_build_controls(ice);
2591 if (err < 0) {
2592 snd_card_free(card);
2593 return err;
2594 }
2595 }
2596
2597 if (c->build_controls) {
2598 err = c->build_controls(ice);
2599 if (err < 0) {
2600 snd_card_free(card);
2601 return err;
2602 }
2603 }
2604
2605 if (!c->no_mpu401) {
2606 if (ice->eeprom.data[ICE_EEP2_SYSCONF] & VT1724_CFG_MPU401) {
2607 struct snd_rawmidi *rmidi;
2608
2609 err = snd_rawmidi_new(card, "MIDI", 0, 1, 1, &rmidi);
2610 if (err < 0) {
2611 snd_card_free(card);
2612 return err;
2613 }
2614 ice->rmidi[0] = rmidi;
2615 rmidi->private_data = ice;
2616 strcpy(rmidi->name, "ICE1724 MIDI");
2617 rmidi->info_flags = SNDRV_RAWMIDI_INFO_OUTPUT |
2618 SNDRV_RAWMIDI_INFO_INPUT |
2619 SNDRV_RAWMIDI_INFO_DUPLEX;
2620 snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_OUTPUT,
2621 &vt1724_midi_output_ops);
2622 snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_INPUT,
2623 &vt1724_midi_input_ops);
2624
2625 /* set watermarks */
2626 outb(VT1724_MPU_RX_FIFO | 0x1,
2627 ICEREG1724(ice, MPU_FIFO_WM));
2628 outb(0x1, ICEREG1724(ice, MPU_FIFO_WM));
2629 /* set UART mode */
2630 outb(VT1724_MPU_UART, ICEREG1724(ice, MPU_CTRL));
2631 }
2632 }
2633
2634 sprintf(card->longname, "%s at 0x%lx, irq %i",
2635 card->shortname, ice->port, ice->irq);
2636
2637 err = snd_card_register(card);
2638 if (err < 0) {
2639 snd_card_free(card);
2640 return err;
2641 }
2642 pci_set_drvdata(pci, card);
2643 dev++;
2644 return 0;
2645 }
2646
2647 static void __devexit snd_vt1724_remove(struct pci_dev *pci)
2648 {
2649 snd_card_free(pci_get_drvdata(pci));
2650 pci_set_drvdata(pci, NULL);
2651 }
2652
2653 #ifdef CONFIG_PM
2654 static int snd_vt1724_suspend(struct pci_dev *pci, pm_message_t state)
2655 {
2656 struct snd_card *card = pci_get_drvdata(pci);
2657 struct snd_ice1712 *ice = card->private_data;
2658
2659 if (!ice->pm_suspend_enabled)
2660 return 0;
2661
2662 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
2663
2664 snd_pcm_suspend_all(ice->pcm);
2665 snd_pcm_suspend_all(ice->pcm_pro);
2666 snd_pcm_suspend_all(ice->pcm_ds);
2667 snd_ac97_suspend(ice->ac97);
2668
2669 spin_lock_irq(&ice->reg_lock);
2670 ice->pm_saved_is_spdif_master = ice->is_spdif_master(ice);
2671 ice->pm_saved_spdif_ctrl = inw(ICEMT1724(ice, SPDIF_CTRL));
2672 ice->pm_saved_spdif_cfg = inb(ICEREG1724(ice, SPDIF_CFG));
2673 ice->pm_saved_route = inl(ICEMT1724(ice, ROUTE_PLAYBACK));
2674 spin_unlock_irq(&ice->reg_lock);
2675
2676 if (ice->pm_suspend)
2677 ice->pm_suspend(ice);
2678
2679 pci_disable_device(pci);
2680 pci_save_state(pci);
2681 pci_set_power_state(pci, pci_choose_state(pci, state));
2682 return 0;
2683 }
2684
2685 static int snd_vt1724_resume(struct pci_dev *pci)
2686 {
2687 struct snd_card *card = pci_get_drvdata(pci);
2688 struct snd_ice1712 *ice = card->private_data;
2689
2690 if (!ice->pm_suspend_enabled)
2691 return 0;
2692
2693 pci_set_power_state(pci, PCI_D0);
2694 pci_restore_state(pci);
2695
2696 if (pci_enable_device(pci) < 0) {
2697 snd_card_disconnect(card);
2698 return -EIO;
2699 }
2700
2701 pci_set_master(pci);
2702
2703 snd_vt1724_chip_reset(ice);
2704
2705 if (snd_vt1724_chip_init(ice) < 0) {
2706 snd_card_disconnect(card);
2707 return -EIO;
2708 }
2709
2710 if (ice->pm_resume)
2711 ice->pm_resume(ice);
2712
2713 if (ice->pm_saved_is_spdif_master) {
2714 /* switching to external clock via SPDIF */
2715 ice->set_spdif_clock(ice, 0);
2716 } else {
2717 /* internal on-card clock */
2718 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 1);
2719 }
2720
2721 update_spdif_bits(ice, ice->pm_saved_spdif_ctrl);
2722
2723 outb(ice->pm_saved_spdif_cfg, ICEREG1724(ice, SPDIF_CFG));
2724 outl(ice->pm_saved_route, ICEMT1724(ice, ROUTE_PLAYBACK));
2725
2726 if (ice->ac97)
2727 snd_ac97_resume(ice->ac97);
2728
2729 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
2730 return 0;
2731 }
2732 #endif
2733
2734 static struct pci_driver driver = {
2735 .name = "ICE1724",
2736 .id_table = snd_vt1724_ids,
2737 .probe = snd_vt1724_probe,
2738 .remove = __devexit_p(snd_vt1724_remove),
2739 #ifdef CONFIG_PM
2740 .suspend = snd_vt1724_suspend,
2741 .resume = snd_vt1724_resume,
2742 #endif
2743 };
2744
2745 static int __init alsa_card_ice1724_init(void)
2746 {
2747 return pci_register_driver(&driver);
2748 }
2749
2750 static void __exit alsa_card_ice1724_exit(void)
2751 {
2752 pci_unregister_driver(&driver);
2753 }
2754
2755 module_init(alsa_card_ice1724_init)
2756 module_exit(alsa_card_ice1724_exit)
Tomato firmware and modifications.