2 This is part of the rtl8192 driver
3 released under the GPL (See file COPYING for details).
5 This files contains programming code for the rtl8256
8 *Many* thanks to Realtek Corp. for their great support!
13 #include "r8192E_hw.h"
14 #include "r819xE_phyreg.h"
15 #include "r819xE_phy.h"
16 #include "r8190_rtl8256.h"
18 /*--------------------------------------------------------------------------
19 * Overview: set RF band width (20M or 40M)
20 * Input: struct net_device* dev
21 * WIRELESS_BANDWIDTH_E Bandwidth //20M or 40M
24 * Note: 8226 support both 20M and 40 MHz
25 *---------------------------------------------------------------------------*/
26 void PHY_SetRF8256Bandwidth(struct net_device
* dev
, HT_CHANNEL_WIDTH Bandwidth
) //20M or 40M
29 struct r8192_priv
*priv
= ieee80211_priv(dev
);
31 //for(eRFPath = RF90_PATH_A; eRFPath <pHalData->NumTotalRFPath; eRFPath++)
32 for(eRFPath
= 0; eRFPath
<priv
->NumTotalRFPath
; eRFPath
++)
34 if (!rtl8192_phy_CheckIsLegalRFPath(dev
, eRFPath
))
39 case HT_CHANNEL_WIDTH_20
:
40 if(priv
->card_8192_version
== VERSION_8190_BD
|| priv
->card_8192_version
== VERSION_8190_BE
)// 8256 D-cut, E-cut, xiong: consider it later!
42 rtl8192_phy_SetRFReg(dev
, (RF90_RADIO_PATH_E
)eRFPath
, 0x0b, bMask12Bits
, 0x100); //phy para:1ba
43 rtl8192_phy_SetRFReg(dev
, (RF90_RADIO_PATH_E
)eRFPath
, 0x2c, bMask12Bits
, 0x3d7);
44 rtl8192_phy_SetRFReg(dev
, (RF90_RADIO_PATH_E
)eRFPath
, 0x0e, bMask12Bits
, 0x021);
46 //cosa add for sd3's request 01/23/2008
47 //rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, 0x14, bMask12Bits, 0x5ab);
51 RT_TRACE(COMP_ERR
, "PHY_SetRF8256Bandwidth(): unknown hardware version\n");
55 case HT_CHANNEL_WIDTH_20_40
:
56 if(priv
->card_8192_version
== VERSION_8190_BD
||priv
->card_8192_version
== VERSION_8190_BE
)// 8256 D-cut, E-cut, xiong: consider it later!
58 rtl8192_phy_SetRFReg(dev
, (RF90_RADIO_PATH_E
)eRFPath
, 0x0b, bMask12Bits
, 0x300); //phy para:3ba
59 rtl8192_phy_SetRFReg(dev
, (RF90_RADIO_PATH_E
)eRFPath
, 0x2c, bMask12Bits
, 0x3ff);
60 rtl8192_phy_SetRFReg(dev
, (RF90_RADIO_PATH_E
)eRFPath
, 0x0e, bMask12Bits
, 0x0e1);
62 //cosa add for sd3's request 01/23/2008
66 RT_TRACE(COMP_ERR
, "PHY_SetRF8256Bandwidth(): unknown hardware version\n");
72 RT_TRACE(COMP_ERR
, "PHY_SetRF8256Bandwidth(): unknown Bandwidth: %#X\n",Bandwidth
);
79 /*--------------------------------------------------------------------------
80 * Overview: Interface to config 8256
81 * Input: struct net_device* dev
84 *---------------------------------------------------------------------------*/
85 RT_STATUS
PHY_RF8256_Config(struct net_device
* dev
)
87 struct r8192_priv
*priv
= ieee80211_priv(dev
);
88 // Initialize general global value
90 RT_STATUS rtStatus
= RT_STATUS_SUCCESS
;
91 // TODO: Extend RF_PATH_C and RF_PATH_D in the future
92 priv
->NumTotalRFPath
= RTL819X_TOTAL_RF_PATH
;
94 rtStatus
= phy_RF8256_Config_ParaFile(dev
);
98 /*--------------------------------------------------------------------------
99 * Overview: Interface to config 8256
100 * Input: struct net_device* dev
103 *---------------------------------------------------------------------------*/
104 RT_STATUS
phy_RF8256_Config_ParaFile(struct net_device
* dev
)
108 RT_STATUS rtStatus
= RT_STATUS_SUCCESS
;
109 BB_REGISTER_DEFINITION_T
*pPhyReg
;
110 struct r8192_priv
*priv
= ieee80211_priv(dev
);
111 u32 RegOffSetToBeCheck
= 0x3;
112 u32 RegValueToBeCheck
= 0x7f1;
113 u32 RF3_Final_Value
= 0;
114 u8 ConstRetryTimes
= 5, RetryTimes
= 5;
116 //3//-----------------------------------------------------------------
117 //3// <2> Initialize RF
118 //3//-----------------------------------------------------------------
119 for(eRFPath
= (RF90_RADIO_PATH_E
)RF90_PATH_A
; eRFPath
<priv
->NumTotalRFPath
; eRFPath
++)
121 if (!rtl8192_phy_CheckIsLegalRFPath(dev
, eRFPath
))
124 pPhyReg
= &priv
->PHYRegDef
[eRFPath
];
126 // Joseph test for shorten RF config
127 // pHalData->RfReg0Value[eRFPath] = rtl8192_phy_QueryRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, rGlobalCtrl, bMaskDWord);
129 /*----Store original RFENV control type----*/
134 u4RegValue
= rtl8192_QueryBBReg(dev
, pPhyReg
->rfintfs
, bRFSI_RFENV
);
138 u4RegValue
= rtl8192_QueryBBReg(dev
, pPhyReg
->rfintfs
, bRFSI_RFENV
<<16);
142 /*----Set RF_ENV enable----*/
143 rtl8192_setBBreg(dev
, pPhyReg
->rfintfe
, bRFSI_RFENV
<<16, 0x1);
145 /*----Set RF_ENV output high----*/
146 rtl8192_setBBreg(dev
, pPhyReg
->rfintfo
, bRFSI_RFENV
, 0x1);
148 /* Set bit number of Address and Data for RF register */
149 rtl8192_setBBreg(dev
, pPhyReg
->rfHSSIPara2
, b3WireAddressLength
, 0x0); // Set 0 to 4 bits for Z-serial and set 1 to 6 bits for 8258
150 rtl8192_setBBreg(dev
, pPhyReg
->rfHSSIPara2
, b3WireDataLength
, 0x0); // Set 0 to 12 bits for Z-serial and 8258, and set 1 to 14 bits for ???
152 rtl8192_phy_SetRFReg(dev
, (RF90_RADIO_PATH_E
) eRFPath
, 0x0, bMask12Bits
, 0xbf);
154 /*----Check RF block (for FPGA platform only)----*/
155 // TODO: this function should be removed on ASIC , Emily 2007.2.2
156 rtStatus
= rtl8192_phy_checkBBAndRF(dev
, HW90_BLOCK_RF
, (RF90_RADIO_PATH_E
)eRFPath
);
157 if(rtStatus
!= RT_STATUS_SUCCESS
)
159 RT_TRACE(COMP_ERR
, "PHY_RF8256_Config():Check Radio[%d] Fail!!\n", eRFPath
);
160 goto phy_RF8256_Config_ParaFile_Fail
;
163 RetryTimes
= ConstRetryTimes
;
165 /*----Initialize RF fom connfiguration file----*/
169 while(RF3_Final_Value
!=RegValueToBeCheck
&& RetryTimes
!=0)
171 ret
= rtl8192_phy_ConfigRFWithHeaderFile(dev
,(RF90_RADIO_PATH_E
)eRFPath
);
172 RF3_Final_Value
= rtl8192_phy_QueryRFReg(dev
, (RF90_RADIO_PATH_E
)eRFPath
, RegOffSetToBeCheck
, bMask12Bits
);
173 RT_TRACE(COMP_RF
, "RF %d %d register final value: %x\n", eRFPath
, RegOffSetToBeCheck
, RF3_Final_Value
);
178 while(RF3_Final_Value
!=RegValueToBeCheck
&& RetryTimes
!=0)
180 ret
= rtl8192_phy_ConfigRFWithHeaderFile(dev
,(RF90_RADIO_PATH_E
)eRFPath
);
181 RF3_Final_Value
= rtl8192_phy_QueryRFReg(dev
, (RF90_RADIO_PATH_E
)eRFPath
, RegOffSetToBeCheck
, bMask12Bits
);
182 RT_TRACE(COMP_RF
, "RF %d %d register final value: %x\n", eRFPath
, RegOffSetToBeCheck
, RF3_Final_Value
);
187 while(RF3_Final_Value
!=RegValueToBeCheck
&& RetryTimes
!=0)
189 ret
= rtl8192_phy_ConfigRFWithHeaderFile(dev
,(RF90_RADIO_PATH_E
)eRFPath
);
190 RF3_Final_Value
= rtl8192_phy_QueryRFReg(dev
, (RF90_RADIO_PATH_E
)eRFPath
, RegOffSetToBeCheck
, bMask12Bits
);
191 RT_TRACE(COMP_RF
, "RF %d %d register final value: %x\n", eRFPath
, RegOffSetToBeCheck
, RF3_Final_Value
);
196 while(RF3_Final_Value
!=RegValueToBeCheck
&& RetryTimes
!=0)
198 ret
= rtl8192_phy_ConfigRFWithHeaderFile(dev
,(RF90_RADIO_PATH_E
)eRFPath
);
199 RF3_Final_Value
= rtl8192_phy_QueryRFReg(dev
, (RF90_RADIO_PATH_E
)eRFPath
, RegOffSetToBeCheck
, bMask12Bits
);
200 RT_TRACE(COMP_RF
, "RF %d %d register final value: %x\n", eRFPath
, RegOffSetToBeCheck
, RF3_Final_Value
);
206 /*----Restore RFENV control type----*/;
211 rtl8192_setBBreg(dev
, pPhyReg
->rfintfs
, bRFSI_RFENV
, u4RegValue
);
215 rtl8192_setBBreg(dev
, pPhyReg
->rfintfs
, bRFSI_RFENV
<<16, u4RegValue
);
220 RT_TRACE(COMP_ERR
, "phy_RF8256_Config_ParaFile():Radio[%d] Fail!!", eRFPath
);
221 goto phy_RF8256_Config_ParaFile_Fail
;
226 RT_TRACE(COMP_PHY
, "PHY Initialization Success\n") ;
227 return RT_STATUS_SUCCESS
;
229 phy_RF8256_Config_ParaFile_Fail
:
230 RT_TRACE(COMP_ERR
, "PHY Initialization failed\n") ;
231 return RT_STATUS_FAILURE
;
235 void PHY_SetRF8256CCKTxPower(struct net_device
* dev
, u8 powerlevel
)
238 struct r8192_priv
*priv
= ieee80211_priv(dev
);
242 TxAGC
|= ((powerlevel
<<8)|powerlevel
);
243 TxAGC
+= priv
->CCKTxPowerLevelOriginalOffset
;
245 if(priv
->bDynamicTxLowPower
== true //cosa 04282008 for cck long range
246 /*pMgntInfo->bScanInProgress == TRUE*/ ) //cosa 05/22/2008 for scan
248 if(priv
->CustomerID
== RT_CID_819x_Netcore
)
251 TxAGC
+= ((priv
->CckPwEnl
<<8)|priv
->CckPwEnl
);
254 byte0
= (u8
)(TxAGC
& 0xff);
255 byte1
= (u8
)((TxAGC
& 0xff00)>>8);
260 if(priv
->rf_type
== RF_2T4R
) //Only 2T4R you have to care the Antenna Tx Power offset
261 { // check antenna C over the max index 0x24
262 if(priv
->RF_C_TxPwDiff
> 0)
264 if( (byte0
+ (u8
)priv
->RF_C_TxPwDiff
) > 0x24)
265 byte0
= 0x24 - priv
->RF_C_TxPwDiff
;
266 if( (byte1
+ (u8
)priv
->RF_C_TxPwDiff
) > 0x24)
267 byte1
= 0x24 - priv
->RF_C_TxPwDiff
;
270 TxAGC
= (byte1
<<8) |byte0
;
271 write_nic_dword(dev
, CCK_TXAGC
, TxAGC
);
276 if(priv
->bDynamicTxLowPower
== true)//cosa 04282008 for cck long range
278 if(priv
->CustomerID
== RT_CID_819x_Netcore
)
281 TxAGC
+= priv
->CckPwEnl
;
285 rtl8192_setBBreg(dev
, rTxAGC_CCK_Mcs32
, bTxAGCRateCCK
, TxAGC
);
291 void PHY_SetRF8256OFDMTxPower(struct net_device
* dev
, u8 powerlevel
)
293 struct r8192_priv
*priv
= ieee80211_priv(dev
);
294 //Joseph TxPower for 8192 testing
296 u32 TxAGC1
=0, TxAGC2
=0, TxAGC2_tmp
= 0;
297 u8 i
, byteVal1
[4], byteVal2
[4], byteVal3
[4];
299 if(priv
->bDynamicTxHighPower
== true) //Add by Jacken 2008/03/06
301 TxAGC1
|= ((powerlevel
<<24)|(powerlevel
<<16)|(powerlevel
<<8)|powerlevel
);
305 TxAGC1
+= priv
->MCSTxPowerLevelOriginalOffset
[0];
309 TxAGC2_tmp
+= priv
->MCSTxPowerLevelOriginalOffset
[1];
313 TxAGC1
|= ((powerlevel
<<24)|(powerlevel
<<16)|(powerlevel
<<8)|powerlevel
);
316 TxAGC1
+= priv
->MCSTxPowerLevelOriginalOffset
[0];
317 TxAGC2
+= priv
->MCSTxPowerLevelOriginalOffset
[1];
324 byteVal1
[i
] = (u8
)( (TxAGC1
& (0xff<<(i
*8))) >>(i
*8) );
325 if(byteVal1
[i
] > 0x24)
327 byteVal2
[i
] = (u8
)( (TxAGC2
& (0xff<<(i
*8))) >>(i
*8) );
328 if(byteVal2
[i
] > 0x24)
332 byteVal3
[i
] = (u8
)( (TxAGC2_tmp
& (0xff<<(i
*8))) >>(i
*8) );
333 if(byteVal3
[i
] > 0x24)
337 if(priv
->rf_type
== RF_2T4R
) //Only 2T4R you have to care the Antenna Tx Power offset
338 { // check antenna C over the max index 0x24
339 if(priv
->RF_C_TxPwDiff
> 0)
343 if( (byteVal1
[i
] + (u8
)priv
->RF_C_TxPwDiff
) > 0x24)
344 byteVal1
[i
] = 0x24 - priv
->RF_C_TxPwDiff
;
345 if( (byteVal2
[i
] + (u8
)priv
->RF_C_TxPwDiff
) > 0x24)
346 byteVal2
[i
] = 0x24 - priv
->RF_C_TxPwDiff
;
347 if( (byteVal3
[i
] + (u8
)priv
->RF_C_TxPwDiff
) > 0x24)
348 byteVal3
[i
] = 0x24 - priv
->RF_C_TxPwDiff
;
353 TxAGC1
= (byteVal1
[3]<<24) | (byteVal1
[2]<<16) |(byteVal1
[1]<<8) |byteVal1
[0];
354 TxAGC2
= (byteVal2
[3]<<24) | (byteVal2
[2]<<16) |(byteVal2
[1]<<8) |byteVal2
[0];
357 TxAGC2_tmp
= (byteVal3
[3]<<24) | (byteVal3
[2]<<16) |(byteVal3
[1]<<8) |byteVal3
[0];
358 priv
->Pwr_Track
= TxAGC2_tmp
;
359 //DbgPrint("TxAGC2_tmp = 0x%x\n", TxAGC2_tmp);
361 //DbgPrint("TxAGC1/TxAGC2 = 0x%x/0x%x\n", TxAGC1, TxAGC2);
362 write_nic_dword(dev
, MCS_TXAGC
, TxAGC1
);
363 write_nic_dword(dev
, MCS_TXAGC
+4, TxAGC2
);
366 u32 writeVal
, powerBase0
, powerBase1
, writeVal_tmp
;
368 u16 RegOffset
[6] = {0xe00, 0xe04, 0xe10, 0xe14, 0xe18, 0xe1c};
369 u8 byte0
, byte1
, byte2
, byte3
;
371 powerBase0
= powerlevel
+ priv
->LegacyHTTxPowerDiff
; //OFDM rates
372 powerBase0
= (powerBase0
<<24) | (powerBase0
<<16) |(powerBase0
<<8) |powerBase0
;
373 powerBase1
= powerlevel
; //MCS rates
374 powerBase1
= (powerBase1
<<24) | (powerBase1
<<16) |(powerBase1
<<8) |powerBase1
;
376 for(index
=0; index
<6; index
++)
378 writeVal
= priv
->MCSTxPowerLevelOriginalOffset
[index
] + ((index
<2)?powerBase0
:powerBase1
);
379 byte0
= (u8
)(writeVal
& 0x7f);
380 byte1
= (u8
)((writeVal
& 0x7f00)>>8);
381 byte2
= (u8
)((writeVal
& 0x7f0000)>>16);
382 byte3
= (u8
)((writeVal
& 0x7f000000)>>24);
383 if(byte0
> 0x24) // Max power index = 0x24
394 writeVal_tmp
= (byte3
<<24) | (byte2
<<16) |(byte1
<<8) |byte0
;
395 priv
->Pwr_Track
= writeVal_tmp
;
398 if(priv
->bDynamicTxHighPower
== true) //Add by Jacken 2008/03/06 //when DM implement, add this
400 writeVal
= 0x03030303;
404 writeVal
= (byte3
<<24) | (byte2
<<16) |(byte1
<<8) |byte0
;
406 rtl8192_setBBreg(dev
, RegOffset
[index
], 0x7f7f7f7f, writeVal
);
414 #define MAX_DOZE_WAITING_TIMES_9x 64
417 struct net_device
* dev
,
418 RT_RF_POWER_STATE eRFPowerState
421 struct r8192_priv
*priv
= ieee80211_priv(dev
);
422 PRT_POWER_SAVE_CONTROL pPSC
= (PRT_POWER_SAVE_CONTROL
)(&(priv
->ieee80211
->PowerSaveControl
));
425 u8 i
= 0, QueueID
= 0;
426 //ptx_ring head=NULL,tail=NULL;
427 struct rtl8192_tx_ring
*ring
= NULL
;
429 if(priv
->SetRFPowerStateInProgress
== true)
431 //RT_TRACE(COMP_PS, "===========> SetRFPowerState8190()!\n");
432 priv
->SetRFPowerStateInProgress
= true;
434 switch(priv
->rf_chip
)
437 switch( eRFPowerState
)
440 //RT_TRACE(COMP_PS, "SetRFPowerState8190() eRfOn !\n");
441 //RXTX enable control: On
442 //for(eRFPath = 0; eRFPath <pHalData->NumTotalRFPath; eRFPath++)
443 // PHY_SetRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, 0x4, 0xC00, 0x2);
445 if(priv
->rf_type
== RF_2T4R
)
448 rtl8192_setBBreg(dev
, rFPGA0_XA_RFInterfaceOE
, BIT4
, 0x1); // 0x860[4]
450 rtl8192_setBBreg(dev
, rFPGA0_XC_RFInterfaceOE
, BIT4
, 0x1); // 0x868[4]
451 //analog to digital on
452 rtl8192_setBBreg(dev
, rFPGA0_AnalogParameter4
, 0xf00, 0xf);// 0x88c[11:8]
453 //digital to analog on
454 rtl8192_setBBreg(dev
, rFPGA0_AnalogParameter1
, 0x1e0, 0xf); // 0x880[8:5]
456 rtl8192_setBBreg(dev
, rOFDM0_TRxPathEnable
, 0xf, 0xf);// 0xc04[3:0]
458 rtl8192_setBBreg(dev
, rOFDM1_TRxPathEnable
, 0xf, 0xf);// 0xd04[3:0]
459 //analog to digital part2 on
460 rtl8192_setBBreg(dev
, rFPGA0_AnalogParameter1
, 0x1e00, 0xf); // 0x880[12:9]
462 else if(priv
->rf_type
== RF_1T2R
) //RF-C, RF-D
465 rtl8192_setBBreg(dev
, rFPGA0_XC_RFInterfaceOE
, BIT4
, 0x1); // 0x868[4]
466 //analog to digital on
467 rtl8192_setBBreg(dev
, rFPGA0_AnalogParameter4
, 0xc00, 0x3);// 0x88c[11:10]
468 //digital to analog on
469 rtl8192_setBBreg(dev
, rFPGA0_AnalogParameter1
, 0x180, 0x3); // 0x880[8:7]
471 rtl8192_setBBreg(dev
, rOFDM0_TRxPathEnable
, 0xc, 0x3);// 0xc04[3:2]
473 rtl8192_setBBreg(dev
, rOFDM1_TRxPathEnable
, 0xc, 0x3);// 0xd04[3:2]
474 //analog to digital part2 on
475 rtl8192_setBBreg(dev
, rFPGA0_AnalogParameter1
, 0x1800, 0x3); // 0x880[12:11]
477 else if(priv
->rf_type
== RF_1T1R
) //RF-C
480 rtl8192_setBBreg(dev
, rFPGA0_XC_RFInterfaceOE
, BIT4
, 0x1); // 0x868[4]
481 //analog to digital on
482 rtl8192_setBBreg(dev
, rFPGA0_AnalogParameter4
, 0x400, 0x1);// 0x88c[10]
483 //digital to analog on
484 rtl8192_setBBreg(dev
, rFPGA0_AnalogParameter1
, 0x80, 0x1); // 0x880[7]
486 rtl8192_setBBreg(dev
, rOFDM0_TRxPathEnable
, 0x4, 0x1);// 0xc04[2]
488 rtl8192_setBBreg(dev
, rOFDM1_TRxPathEnable
, 0x4, 0x1);// 0xd04[2]
489 //analog to digital part2 on
490 rtl8192_setBBreg(dev
, rFPGA0_AnalogParameter1
, 0x800, 0x1); // 0x880[11]
493 #elif defined RTL8192E
495 if((priv
->ieee80211
->eRFPowerState
== eRfOff
) && RT_IN_PS_LEVEL(pPSC
, RT_RF_OFF_LEVL_HALT_NIC
))
496 { // The current RF state is OFF and the RF OFF level is halting the NIC, re-initialize the NIC.
497 bool rtstatus
= true;
498 u32 InitializeCount
= 3;
502 priv
->RegRfOff
= false;
503 rtstatus
= NicIFEnableNIC(dev
);
504 }while( (rtstatus
!= true) &&(InitializeCount
>0) );
508 RT_TRACE(COMP_ERR
,"%s():Initialize Adapter fail,return\n",__FUNCTION__
);
509 priv
->SetRFPowerStateInProgress
= false;
513 RT_CLEAR_PS_LEVEL(pPSC
, RT_RF_OFF_LEVL_HALT_NIC
);
515 write_nic_byte(dev
, ANAPAR
, 0x37);//160MHz
516 //write_nic_byte(dev, MacBlkCtrl, 0x17); // 0x403
518 //enable clock 80/88 MHz
519 rtl8192_setBBreg(dev
, rFPGA0_AnalogParameter1
, 0x4, 0x1); // 0x880[2]
520 priv
->bHwRfOffAction
= 0;
525 rtl8192_setBBreg(dev
, rFPGA0_XA_RFInterfaceOE
, BIT4
, 0x1); // 0x860[4]
526 //analog to digital on
527 rtl8192_setBBreg(dev
, rFPGA0_AnalogParameter4
, 0x300, 0x3);// 0x88c[9:8]
528 //digital to analog on
529 rtl8192_setBBreg(dev
, rFPGA0_AnalogParameter1
, 0x18, 0x3); // 0x880[4:3]
531 rtl8192_setBBreg(dev
, rOFDM0_TRxPathEnable
, 0x3, 0x3);// 0xc04[1:0]
533 rtl8192_setBBreg(dev
, rOFDM1_TRxPathEnable
, 0x3, 0x3);// 0xd04[1:0]
534 //analog to digital part2 on
535 rtl8192_setBBreg(dev
, rFPGA0_AnalogParameter1
, 0x60, 0x3); // 0x880[6:5]
537 // Baseband reset 2008.09.30 add
538 //write_nic_byte(dev, BB_RESET, (read_nic_byte(dev, BB_RESET)|BIT0));
542 //rtl8192_setBBreg(dev, rFPGA0_AnalogParameter2, 0x20000000, 0x1); // 0x884
543 //analog to digital part2 on
544 //rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x60, 0x3); // 0x880[6:5]
547 //digital to analog on
548 //rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x98, 0x13); // 0x880[4:3]
549 //analog to digital on
550 //rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0xf03, 0xf03);// 0x88c[9:8]
552 //PHY_SetBBReg(dev, rOFDM0_TRxPathEnable, 0x3, 0x3);// 0xc04[1:0]
553 //rx antenna on 2008.09.30 mark
554 //PHY_SetBBReg(dev, rOFDM1_TRxPathEnable, 0x3, 0x3);// 0xd04[1:0]
558 //rtl8192_setBBreg(dev, rFPGA0_XA_RFInterfaceOE, BIT4, 0x1); // 0x860[4]
559 //rtl8192_setBBreg(dev, rFPGA0_XB_RFInterfaceOE, BIT4, 0x1); // 0x864[4]
567 // In current solution, RFSleep=RFOff in order to save power under 802.11 power save.
568 // By Bruce, 2008-01-16.
572 // HW setting had been configured with deeper mode.
573 if(priv
->ieee80211
->eRFPowerState
== eRfOff
)
576 // Update current RF state variable.
577 //priv->ieee80211->eRFPowerState = eRFPowerState;
579 //if (pPSC->bLeisurePs)
581 for(QueueID
= 0, i
= 0; QueueID
< MAX_TX_QUEUE
; )
583 ring
= &priv
->tx_ring
[QueueID
];
585 if(skb_queue_len(&ring
->queue
) == 0)
592 RT_TRACE((COMP_POWER
|COMP_RF
), "eRf Off/Sleep: %d times TcbBusyQueue[%d] !=0 before doze!\n", (i
+1), QueueID
);
597 if(i
>= MAX_DOZE_WAITING_TIMES_9x
)
599 RT_TRACE(COMP_POWER
, "\n\n\n TimeOut!! SetRFPowerState8190(): eRfOff: %d times TcbBusyQueue[%d] != 0 !!!\n\n\n", MAX_DOZE_WAITING_TIMES_9x
, QueueID
);
605 //if(Adapter->HardwareType == HARDWARE_TYPE_RTL8190P)
608 PHY_SetRtl8190pRfOff(dev
);
610 //else if(Adapter->HardwareType == HARDWARE_TYPE_RTL8192E)
611 #elif defined RTL8192E
613 PHY_SetRtl8192eRfOff(dev
);
620 //RT_TRACE(COMP_PS, "SetRFPowerState8190() eRfOff/Sleep !\n");
622 // Update current RF state variable.
623 //priv->ieee80211->eRFPowerState = eRFPowerState;
626 // Disconnect with Any AP or STA.
628 for(QueueID
= 0, i
= 0; QueueID
< MAX_TX_QUEUE
; )
630 ring
= &priv
->tx_ring
[QueueID
];
632 if(skb_queue_len(&ring
->queue
) == 0)
640 "eRf Off/Sleep: %d times TcbBusyQueue[%d] !=0 before doze!\n", (i
+1), QueueID
);
645 if(i
>= MAX_DOZE_WAITING_TIMES_9x
)
647 RT_TRACE(COMP_POWER
, "\n\n\n SetZebraRFPowerState8185B(): eRfOff: %d times TcbBusyQueue[%d] != 0 !!!\n\n\n", MAX_DOZE_WAITING_TIMES_9x
, QueueID
);
652 //if(Adapter->HardwareType == HARDWARE_TYPE_RTL8190P)
655 PHY_SetRtl8190pRfOff(dev
);
657 //else if(Adapter->HardwareType == HARDWARE_TYPE_RTL8192E)
658 #elif defined RTL8192E
660 //if(pPSC->RegRfPsLevel & RT_RF_OFF_LEVL_HALT_NIC && !RT_IN_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_HALT_NIC) && priv->ieee80211->RfOffReason > RF_CHANGE_BY_PS)
661 if (pPSC
->RegRfPsLevel
& RT_RF_OFF_LEVL_HALT_NIC
&& !RT_IN_PS_LEVEL(pPSC
, RT_RF_OFF_LEVL_HALT_NIC
))
662 { // Disable all components.
665 // NicIFSetLinkStatus is a big problem when we indicate the status to OS,
666 // the OS(XP) will reset. But now, we cnnot find why the NIC is hard to receive
667 // packets after RF ON. Just keep this function here and still work to find out the root couse.
668 // By Bruce, 2009-05-01.
670 //NicIFSetLinkStatus( Adapter, RT_MEDIA_DISCONNECT );
671 //if HW radio of , need to indicate scan complete first for not be reset.
672 //if(MgntScanInProgress(pMgntInfo))
673 // MgntResetScanProcess( Adapter );
675 // <1> Disable Interrupt
676 //rtl8192_irq_disable(dev);
677 // <2> Stop all timer
678 //MgntCancelAllTimer(Adapter);
679 // <3> Disable Adapter
680 //NicIFHaltAdapter(Adapter, false);
681 NicIFDisableNIC(dev
);
682 RT_SET_PS_LEVEL(pPSC
, RT_RF_OFF_LEVL_HALT_NIC
);
684 else if (!(pPSC
->RegRfPsLevel
& RT_RF_OFF_LEVL_HALT_NIC
))
686 // IPS should go to this.
687 PHY_SetRtl8192eRfOff(dev
);
693 RT_TRACE(COMP_DBG
,DBG_TRACE
,("It is not 8190Pci and 8192PciE \n"));
701 RT_TRACE(COMP_ERR
, "SetRFPowerState8190(): unknow state to set: 0x%X!!!\n", eRFPowerState
);
708 RT_TRACE(COMP_ERR
, "SetRFPowerState8190(): Unknown RF type\n");
714 // Update current RF state variable.
715 priv
->ieee80211
->eRFPowerState
= eRFPowerState
;
718 //printk("%s()priv->ieee80211->eRFPowerState:%s\n" ,__func__,priv->ieee80211->eRFPowerState == eRfOn ? "On" : "Off");
719 priv
->SetRFPowerStateInProgress
= false;
720 //RT_TRACE(COMP_PS, "<=========== SetRFPowerState8190() bResult = %d!\n", bResult);
728 // Change RF power state.
731 // This function must be executed in re-schdulable context,
732 // ie. PASSIVE_LEVEL.
734 // 050823, by rcnjko.
738 struct net_device
* dev
,
739 RT_RF_POWER_STATE eRFPowerState
742 struct r8192_priv
*priv
= ieee80211_priv(dev
);
744 bool bResult
= false;
746 RT_TRACE(COMP_RF
,"---------> SetRFPowerState(): eRFPowerState(%d)\n", eRFPowerState
);
748 if(eRFPowerState
== priv
->ieee80211
->eRFPowerState
&& priv
->bHwRfOffAction
== 0)
750 if(eRFPowerState
== priv
->ieee80211
->eRFPowerState
)
753 RT_TRACE(COMP_POWER
, "<--------- SetRFPowerState(): discard the request for eRFPowerState(%d) is the same.\n", eRFPowerState
);
757 bResult
= SetRFPowerState8190(dev
, eRFPowerState
);
759 RT_TRACE(COMP_POWER
, "<--------- SetRFPowerState(): bResult(%d)\n", bResult
);
766 struct net_device
* dev
769 struct r8192_priv
*priv
= ieee80211_priv(dev
);
772 bool bFilterOutNonAssociatedBSSID
= false;
774 //IEEE80211_DEBUG(IEEE80211_DL_TRACE, "XXXXXXXXXX MgntDisconnect IBSS\n");
776 priv
->ieee80211
->state
= IEEE80211_NOLINK
;
778 // PlatformZeroMemory( pMgntInfo->Bssid, 6 );
779 for(i
=0;i
<6;i
++) priv
->ieee80211
->current_network
.bssid
[i
]= 0x55;
780 priv
->OpMode
= RT_OP_MODE_NO_LINK
;
781 write_nic_word(dev
, BSSIDR
, ((u16
*)priv
->ieee80211
->current_network
.bssid
)[0]);
782 write_nic_dword(dev
, BSSIDR
+2, ((u32
*)(priv
->ieee80211
->current_network
.bssid
+2))[0]);
784 RT_OP_MODE OpMode
= priv
->OpMode
;
785 //LED_CTL_MODE LedAction = LED_CTL_NO_LINK;
786 u8 btMsr
= read_nic_byte(dev
, MSR
);
792 case RT_OP_MODE_INFRASTRUCTURE
:
793 btMsr
|= MSR_LINK_MANAGED
;
794 //LedAction = LED_CTL_LINK;
797 case RT_OP_MODE_IBSS
:
798 btMsr
|= MSR_LINK_ADHOC
;
799 // led link set separate
803 btMsr
|= MSR_LINK_MASTER
;
804 //LedAction = LED_CTL_LINK;
808 btMsr
|= MSR_LINK_NONE
;
812 write_nic_byte(dev
, MSR
, btMsr
);
815 //Adapter->HalFunc.LedControlHandler(Adapter, LedAction);
817 ieee80211_stop_send_beacons(priv
->ieee80211
);
819 // If disconnect, clear RCR CBSSID bit
820 bFilterOutNonAssociatedBSSID
= false;
823 Type
= bFilterOutNonAssociatedBSSID
;
824 RegRCR
= read_nic_dword(dev
,RCR
);
825 priv
->ReceiveConfig
= RegRCR
;
827 RegRCR
|= (RCR_CBSSID
);
828 else if (Type
== false)
829 RegRCR
&= (~RCR_CBSSID
);
832 write_nic_dword(dev
, RCR
,RegRCR
);
833 priv
->ReceiveConfig
= RegRCR
;
837 //MgntIndicateMediaStatus( Adapter, RT_MEDIA_DISCONNECT, GENERAL_INDICATE );
838 notify_wx_assoc_event(priv
->ieee80211
);
843 MlmeDisassociateRequest(
844 struct net_device
* dev
,
849 struct r8192_priv
*priv
= ieee80211_priv(dev
);
852 RemovePeerTS(priv
->ieee80211
, asSta
);
854 SendDisassociation( priv
->ieee80211
, asSta
, asRsn
);
856 if(memcpy(priv
->ieee80211
->current_network
.bssid
,asSta
,6) == NULL
)
858 //ShuChen TODO: change media status.
859 //ShuChen TODO: What to do when disassociate.
860 priv
->ieee80211
->state
= IEEE80211_NOLINK
;
861 //pMgntInfo->AsocTimestamp = 0;
862 for(i
=0;i
<6;i
++) priv
->ieee80211
->current_network
.bssid
[i
] = 0x22;
863 // pMgntInfo->mBrates.Length = 0;
864 // Adapter->HalFunc.SetHwRegHandler( Adapter, HW_VAR_BASIC_RATE, (pu1Byte)(&pMgntInfo->mBrates) );
865 priv
->OpMode
= RT_OP_MODE_NO_LINK
;
867 RT_OP_MODE OpMode
= priv
->OpMode
;
868 //LED_CTL_MODE LedAction = LED_CTL_NO_LINK;
869 u8 btMsr
= read_nic_byte(dev
, MSR
);
875 case RT_OP_MODE_INFRASTRUCTURE
:
876 btMsr
|= MSR_LINK_MANAGED
;
877 //LedAction = LED_CTL_LINK;
880 case RT_OP_MODE_IBSS
:
881 btMsr
|= MSR_LINK_ADHOC
;
882 // led link set separate
886 btMsr
|= MSR_LINK_MASTER
;
887 //LedAction = LED_CTL_LINK;
891 btMsr
|= MSR_LINK_NONE
;
895 write_nic_byte(dev
, MSR
, btMsr
);
898 //Adapter->HalFunc.LedControlHandler(Adapter, LedAction);
900 ieee80211_disassociate(priv
->ieee80211
);
902 write_nic_word(dev
, BSSIDR
, ((u16
*)priv
->ieee80211
->current_network
.bssid
)[0]);
903 write_nic_dword(dev
, BSSIDR
+2, ((u32
*)(priv
->ieee80211
->current_network
.bssid
+2))[0]);
912 struct net_device
* dev
,
916 struct r8192_priv
*priv
= ieee80211_priv(dev
);
917 bool bFilterOutNonAssociatedBSSID
= false;
920 // Commented out by rcnjko, 2005.01.27:
921 // I move SecClearAllKeys() to MgntActSet_802_11_DISASSOCIATE().
923 // //2004/09/15, kcwu, the key should be cleared, or the new handshaking will not success
924 // SecClearAllKeys(Adapter);
926 // In WPA WPA2 need to Clear all key ... because new key will set after new handshaking.
928 if( pMgntInfo
->SecurityInfo
.AuthMode
> RT_802_11AuthModeAutoSwitch
||
929 (pMgntInfo
->bAPSuportCCKM
&& pMgntInfo
->bCCX8021xenable
) ) // In CCKM mode will Clear key
931 SecClearAllKeys(Adapter
);
932 RT_TRACE(COMP_SEC
, DBG_LOUD
,("======>CCKM clear key..."))
935 // If disconnect, clear RCR CBSSID bit
936 bFilterOutNonAssociatedBSSID
= false;
940 Type
= bFilterOutNonAssociatedBSSID
;
941 //Adapter->HalFunc.GetHwRegHandler(Adapter, HW_VAR_RCR, (pu1Byte)(&RegRCR));
942 RegRCR
= read_nic_dword(dev
,RCR
);
943 priv
->ReceiveConfig
= RegRCR
;
946 RegRCR
|= (RCR_CBSSID
);
947 else if (Type
== false)
948 RegRCR
&= (~RCR_CBSSID
);
950 write_nic_dword(dev
, RCR
,RegRCR
);
951 priv
->ReceiveConfig
= RegRCR
;
955 // 2004.10.11, by rcnjko.
956 //MlmeDisassociateRequest( Adapter, pMgntInfo->Bssid, disas_lv_ss );
957 MlmeDisassociateRequest( dev
, priv
->ieee80211
->current_network
.bssid
, asRsn
);
959 priv
->ieee80211
->state
= IEEE80211_NOLINK
;
960 //pMgntInfo->AsocTimestamp = 0;
966 struct net_device
* dev
,
970 struct r8192_priv
*priv
= ieee80211_priv(dev
);
973 // Schedule an workitem to wake up for ps mode, 070109, by rcnjko.
976 if(pMgntInfo
->mPss
!= eAwake
)
979 // Using AwkaeTimer to prevent mismatch ps state.
980 // In the timer the state will be changed according to the RF is being awoke or not. By Bruce, 2007-10-31.
982 // PlatformScheduleWorkItem( &(pMgntInfo->AwakeWorkItem) );
983 PlatformSetTimer( Adapter
, &(pMgntInfo
->AwakeTimer
), 0 );
986 // Follow 8180 AP mode, 2005.05.30, by rcnjko.
988 if(pMgntInfo
->mActingAsAp
)
990 RT_TRACE(COMP_MLME
, DBG_LOUD
, ("MgntDisconnect() ===> AP_DisassociateAllStation\n"));
991 AP_DisassociateAllStation(Adapter
, unspec_reason
);
995 // Indication of disassociation event.
996 //DrvIFIndicateDisassociation(Adapter, asRsn);
998 // In adhoc mode, update beacon frame.
999 if( priv
->ieee80211
->state
== IEEE80211_LINKED
)
1001 if( priv
->ieee80211
->iw_mode
== IW_MODE_ADHOC
)
1003 //RT_TRACE(COMP_MLME, "MgntDisconnect() ===> MgntDisconnectIBSS\n");
1004 MgntDisconnectIBSS(dev
);
1006 if( priv
->ieee80211
->iw_mode
== IW_MODE_INFRA
)
1008 // We clear key here instead of MgntDisconnectAP() because that
1009 // MgntActSet_802_11_DISASSOCIATE() is an interface called by OS,
1010 // e.g. OID_802_11_DISASSOCIATE in Windows while as MgntDisconnectAP() is
1011 // used to handle disassociation related things to AP, e.g. send Disassoc
1012 // frame to AP. 2005.01.27, by rcnjko.
1013 //IEEE80211_DEBUG(IEEE80211_DL_TRACE,"MgntDisconnect() ===> MgntDisconnectAP\n");
1014 MgntDisconnectAP(dev
, asRsn
);
1017 // Inidicate Disconnect, 2005.02.23, by rcnjko.
1018 //MgntIndicateMediaStatus( Adapter, RT_MEDIA_DISCONNECT, GENERAL_INDICATE);
1026 // Chang RF Power State.
1027 // Note that, only MgntActSet_RF_State() is allowed to set HW_VAR_RF_STATE.
1033 MgntActSet_RF_State(
1034 struct net_device
* dev
,
1035 RT_RF_POWER_STATE StateToSet
,
1036 RT_RF_CHANGE_SOURCE ChangeSource
1039 struct r8192_priv
*priv
= ieee80211_priv(dev
);
1040 bool bActionAllowed
= false;
1041 bool bConnectBySSID
= false;
1042 RT_RF_POWER_STATE rtState
;
1043 u16 RFWaitCounter
= 0;
1045 RT_TRACE(COMP_POWER
, "===>MgntActSet_RF_State(): StateToSet(%d)\n",StateToSet
);
1048 //1//<1>Prevent the race condition of RF state change.
1050 // Only one thread can change the RF state at one time, and others should wait to be executed. By Bruce, 2007-11-28.
1054 spin_lock_irqsave(&priv
->rf_ps_lock
,flag
);
1055 if(priv
->RFChangeInProgress
)
1057 spin_unlock_irqrestore(&priv
->rf_ps_lock
,flag
);
1058 RT_TRACE(COMP_POWER
, "MgntActSet_RF_State(): RF Change in progress! Wait to set..StateToSet(%d).\n", StateToSet
);
1060 // Set RF after the previous action is done.
1061 while(priv
->RFChangeInProgress
)
1064 RT_TRACE(COMP_POWER
, "MgntActSet_RF_State(): Wait 1 ms (%d times)...\n", RFWaitCounter
);
1065 udelay(1000); // 1 ms
1067 // Wait too long, return FALSE to avoid to be stuck here.
1068 if(RFWaitCounter
> 100)
1070 RT_TRACE(COMP_ERR
, "MgntActSet_RF_State(): Wait too logn to set RF\n");
1071 // TODO: Reset RF state?
1078 priv
->RFChangeInProgress
= true;
1079 spin_unlock_irqrestore(&priv
->rf_ps_lock
,flag
);
1084 rtState
= priv
->ieee80211
->eRFPowerState
;
1090 // Turn On RF no matter the IPS setting because we need to update the RF state to Ndis under Vista, or
1091 // the Windows does not allow the driver to perform site survey any more. By Bruce, 2007-10-02.
1094 priv
->ieee80211
->RfOffReason
&= (~ChangeSource
);
1096 if(! priv
->ieee80211
->RfOffReason
)
1098 priv
->ieee80211
->RfOffReason
= 0;
1099 bActionAllowed
= true;
1102 if(rtState
== eRfOff
&& ChangeSource
>=RF_CHANGE_BY_HW
)
1104 bConnectBySSID
= true;
1108 RT_TRACE(COMP_POWER
, "MgntActSet_RF_State - eRfon reject pMgntInfo->RfOffReason= 0x%x, ChangeSource=0x%X\n", priv
->ieee80211
->RfOffReason
, ChangeSource
);
1114 if (priv
->ieee80211
->RfOffReason
> RF_CHANGE_BY_IPS
)
1118 // Disconnect to current BSS when radio off. Asked by QuanTa.
1120 // Set all link status falg, by Bruce, 2007-06-26.
1121 //MgntActSet_802_11_DISASSOCIATE( Adapter, disas_lv_ss );
1122 MgntDisconnect(dev
, disas_lv_ss
);
1124 // Clear content of bssDesc[] and bssDesc4Query[] to avoid reporting old bss to UI.
1125 // 2007.05.28, by shien chang.
1130 priv
->ieee80211
->RfOffReason
|= ChangeSource
;
1131 bActionAllowed
= true;
1135 priv
->ieee80211
->RfOffReason
|= ChangeSource
;
1136 bActionAllowed
= true;
1145 RT_TRACE(COMP_POWER
, "MgntActSet_RF_State(): Action is allowed.... StateToSet(%d), RfOffReason(%#X)\n", StateToSet
, priv
->ieee80211
->RfOffReason
);
1146 // Config HW to the specified mode.
1147 SetRFPowerState(dev
, StateToSet
);
1149 if(StateToSet
== eRfOn
)
1151 //Adapter->HalFunc.HalEnableRxHandler(Adapter);
1154 //MgntActSet_802_11_SSID(Adapter, Adapter->MgntInfo.Ssid.Octet, Adapter->MgntInfo.Ssid.Length, TRUE );
1158 else if(StateToSet
== eRfOff
)
1160 //Adapter->HalFunc.HalDisableRxHandler(Adapter);
1165 RT_TRACE(COMP_POWER
, "MgntActSet_RF_State(): Action is rejected.... StateToSet(%d), ChangeSource(%#X), RfOffReason(%#X)\n", StateToSet
, ChangeSource
, priv
->ieee80211
->RfOffReason
);
1168 // Release RF spinlock
1169 spin_lock_irqsave(&priv
->rf_ps_lock
,flag
);
1170 priv
->RFChangeInProgress
= false;
1171 spin_unlock_irqrestore(&priv
->rf_ps_lock
,flag
);
1173 RT_TRACE(COMP_POWER
, "<===MgntActSet_RF_State()\n");
1174 return bActionAllowed
;