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RT-AC56 3.0.0.4.374.37 core
[tomato.git] / release / src-rt-6.x.4708 / linux / linux-2.6.36 / drivers / staging / otus / hal / hpusb.c
blobf8dcc1a52c51a589584ad2a9e06a0431567fb045
1 /*
2 * Copyright (c) 2000-2005 ZyDAS Technology Corporation
3 * Copyright (c) 2007-2008 Atheros Communications Inc.
4 *
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 */
17 /* */
18 /* Module Name : ud.c */
19 /* */
20 /* Abstract */
21 /* This module contains USB descriptor functions. */
22 /* */
23 /* NOTES */
24 /* None */
25 /* */
26 /************************************************************************/
27 #include "../80211core/cprecomp.h"
28 #include "hpani.h"
29 #include "hpusb.h"
30
31 extern void zfwUsbCmd(zdev_t* dev, u8_t endpt, u32_t* cmd, u16_t cmdLen);
32
33 extern void zfIdlRsp(zdev_t* dev, u32_t* rsp, u16_t rspLen);
34 extern u16_t zfDelayWriteInternalReg(zdev_t* dev, u32_t addr, u32_t val);
35 extern u16_t zfFlushDelayWrite(zdev_t* dev);
36
37
38 #define USB_ENDPOINT_TX_INDEX 1
39 #define USB_ENDPOINT_RX_INDEX 2
40 #define USB_ENDPOINT_INT_INDEX 3
41 #define USB_ENDPOINT_CMD_INDEX 4
42
43 void zfIdlCmd(zdev_t* dev, u32_t* cmd, u16_t cmdLen)
44 {
45 #if ZM_SW_LOOP_BACK != 1
46 zfwUsbCmd(dev, USB_ENDPOINT_CMD_INDEX, cmd, cmdLen);
47 #endif
48
49 return;
50 }
51
52
53 /* zfAdjustCtrlSetting: fit OUTS format */
54 /* convert MIMO2 to OUTS */
55 void zfAdjustCtrlSetting(zdev_t* dev, u16_t* header, zbuf_t* buf)
56 {
57 /* MIMO2 => OUTS FB-50 */
58 /* length not change, only modify format */
59
60 u32_t oldMT;
61 u32_t oldMCS;
62
63 u32_t phyCtrl;
64 u32_t oldPhyCtrl;
65
66 u16_t tpc = 0;
67 struct zsHpPriv* hpPriv;
68
69 zmw_get_wlan_dev(dev);
70 hpPriv=wd->hpPrivate;
71
72 /* mm */
73 if (header == NULL)
74 {
75 oldPhyCtrl = zmw_buf_readh(dev, buf, 4) | ((u32_t)zmw_buf_readh(dev, buf, 6) << 16);
76 }
77 else
78 {
79 oldPhyCtrl = header[2] | ((u32_t)header[3] <<16);
80 }
81
82 phyCtrl = 0;
83
84
85 /* MT : Bit[1~0] */
86 oldMT = oldPhyCtrl&0x3;
87 phyCtrl |= oldMT;
88 if ( oldMT == 0x3 ) /* DL-OFDM (Duplicate Legacy OFDM) */
89 phyCtrl |= 0x1;
90
91
92 /* PT : Bit[2] HT PT: 0 Mixed mode 1 Green field */
93 phyCtrl |= (oldPhyCtrl&0x4);
94
95 /* Bandwidth control : Bit[4~3] */
96 if ( oldPhyCtrl&0x800000 ) /* Bit23 : 40M */
97 {
98 if (oldMT == 0x2 && ((struct zsHpPriv*)wd->hpPrivate)->hwBw40)
99 {
100 phyCtrl |= (0x2<<3); /* 40M shared */
101 }
102 }
103 else {
104 oldPhyCtrl &= ~0x80000000;
105 }
106
107 /* MCS : Bit[24~18] */
108 oldMCS = (oldPhyCtrl&0x7f0000)>>16; /* Bit[22~16] */
109 phyCtrl |= (oldMCS<<18);
110
111 /* Short GI : Bit[31]*/
112 phyCtrl |= (oldPhyCtrl&0x80000000);
113
114 /* AM : Antenna mask */
115 //if ((oldMT == 2) && (oldMCS > 7))
116 if (hpPriv->halCapability & ZM_HP_CAP_11N_ONE_TX_STREAM)
117 {
118 phyCtrl |= (0x1<<15);
119 }
120 else
121 {
122 /* HT Tx 2 chain */
123 /* OFDM 6M/9M/12M/18M/24M Tx 2 chain */
124 /* OFDM 36M/48M/54M/ Tx 1 chain */
125 /* CCK Tx 2 chain */
126 if ((oldMT == 2) || (oldMT == 3))
127 {
128 phyCtrl |= (0x5<<15);
129 }
130 else if (oldMT == 1)
131 {
132 if ((oldMCS == 0xb) || (oldMCS == 0xf) ||
133 (oldMCS == 0xa) || (oldMCS == 0xe) ||
134 (oldMCS == 0x9)) //6M/9M/12M/18M/24M
135 {
136 phyCtrl |= (0x5<<15);
137 }
138 else
139 {
140 phyCtrl |= (0x1<<15);
141 }
142 }
143 else //(oldMT==0)
144 {
145 phyCtrl |= (0x5<<15);
146 }
147 }
148 //else
149 // phyCtrl |= (0x1<<15);
150
151 /* TPC */
152 /* TODO : accelerating these code */
153 if (hpPriv->hwFrequency < 3000)
154 {
155 if (oldMT == 0)
156 {
157 /* CCK */
158 tpc = (hpPriv->tPow2xCck[oldMCS]&0x3f);
159 }
160 else if (oldMT == 1)
161 {
162 /* OFDM */
163 if (oldMCS == 0xc)
164 {
165 tpc = (hpPriv->tPow2x2g[3]&0x3f);
166 }
167 else if (oldMCS == 0x8)
168 {
169 tpc = (hpPriv->tPow2x2g[2]&0x3f);
170 }
171 else if (oldMCS == 0xd)
172 {
173 tpc = (hpPriv->tPow2x2g[1]&0x3f);
174 }
175 else if (oldMCS == 0x9)
176 {
177 tpc = ((hpPriv->tPow2x2g[0]-hpPriv->tPow2x2g24HeavyClipOffset)&0x3f);
178 }
179 else
180 {
181 tpc = (hpPriv->tPow2x2g[0]&0x3f);
182 }
183 }
184 else if (oldMT == 2)
185 {
186 if ( oldPhyCtrl&0x800000 ) /* Bit23 : 40M */
187 {
188 /* HT 40 */
189 tpc = (hpPriv->tPow2x2gHt40[oldMCS&0x7]&0x3f);
190 }
191 else
192 {
193 /* HT 20 */
194 tpc = (hpPriv->tPow2x2gHt20[oldMCS&0x7]&0x3f);
195 }
196 }
197 }
198 else //5GHz
199 {
200 if (oldMT == 1)
201 {
202 /* OFDM */
203 if (oldMCS == 0xc)
204 {
205 tpc = (hpPriv->tPow2x5g[3]&0x3f);
206 }
207 else if (oldMCS == 0x8)
208 {
209 tpc = (hpPriv->tPow2x5g[2]&0x3f);
210 }
211 else if (oldMCS == 0xd)
212 {
213 tpc = (hpPriv->tPow2x5g[1]&0x3f);
214 }
215 else
216 {
217 tpc = (hpPriv->tPow2x5g[0]&0x3f);
218 }
219 }
220 else if (oldMT == 2)
221 {
222 if ( oldPhyCtrl&0x800000 ) /* Bit23 : 40M */
223 {
224 /* HT 40 */
225 tpc = (hpPriv->tPow2x5gHt40[oldMCS&0x7]&0x3f);
226 }
227 else
228 {
229 /* HT 20 */
230 tpc = (hpPriv->tPow2x5gHt20[oldMCS&0x7]&0x3f);
231 }
232 }
233 }
234
235 /* Tx power adjust for HT40 */
236 /* HT40 +1dBm */
237 if ((oldMT==2) && (oldPhyCtrl&0x800000) )
238 {
239 tpc += 2;
240 }
241 tpc &= 0x3f;
242
243 /* Evl force tx TPC */
244 if(wd->forceTxTPC)
245 {
246 tpc = (u16_t)(wd->forceTxTPC & 0x3f);
247 }
248
249 if (hpPriv->hwFrequency < 3000) {
250 wd->maxTxPower2 &= 0x3f;
251 tpc = (tpc > wd->maxTxPower2)? wd->maxTxPower2 : tpc;
252 } else {
253 wd->maxTxPower5 &= 0x3f;
254 tpc = (tpc > wd->maxTxPower5)? wd->maxTxPower5 : tpc;
255 }
256
257
258 #define ZM_MIN_TPC 5
259 #define ZM_TPC_OFFSET 5
260 #define ZM_SIGNAL_THRESHOLD 56
261 if ((wd->sta.bScheduleScan == FALSE) && (wd->sta.bChannelScan == FALSE))
262 {
263 if (( wd->wlanMode == ZM_MODE_INFRASTRUCTURE )
264 && (zfStaIsConnected(dev))
265 && (wd->SignalStrength > ZM_SIGNAL_THRESHOLD))
266 {
267 if (tpc > ((ZM_MIN_TPC+ZM_TPC_OFFSET)*2))
268 {
269 tpc -= (ZM_TPC_OFFSET*2);
270 }
271 else if (tpc > (ZM_MIN_TPC*2))
272 {
273 tpc = (ZM_MIN_TPC*2);
274 }
275 }
276 }
277 #undef ZM_MIN_TPC
278 #undef ZM_TPC_OFFSET
279 #undef ZM_SIGNAL_THRESHOLD
280
281 #ifndef ZM_OTUS_LINUX_PHASE_2
282 phyCtrl |= (tpc & 0x3f) << 9;
283 #endif
284
285 /* Set bits[8:6]BF-MCS for heavy clip */
286 if ((phyCtrl&0x3) == 2)
287 {
288 phyCtrl |= ((phyCtrl >> 12) & 0x1c0);
289 }
290
291 /* PHY control */
292 if (header == NULL)
293 {
294 zmw_buf_writeh(dev, buf, 4, (u16_t) (phyCtrl&0xffff));
295 zmw_buf_writeh(dev, buf, 6, (u16_t) (phyCtrl>>16));
296 }
297 else
298 {
299 //PHY control L
300 header[2] = (u16_t) (phyCtrl&0xffff);
301 //PHY control H
302 header[3] = (u16_t) (phyCtrl>>16);
303 }
304
305 zm_msg2_tx(ZM_LV_2, "old phy ctrl = ", oldPhyCtrl);
306 zm_msg2_tx(ZM_LV_2, "new phy ctrl = ", phyCtrl);
307 //DbgPrint("old phy ctrl =%08x \n", oldPhyCtrl);
308 //DbgPrint("new phy ctrl =%08x \n", phyCtrl);
309 }
310
311
312 #define EXTRA_INFO_LEN 24 //RSSI(7) + EVM(12) + PHY(1) + MACStatus(4)
313 u16_t zfHpSend(zdev_t* dev, u16_t* header, u16_t headerLen,
314 u16_t* snap, u16_t snapLen,
315 u16_t* tail, u16_t tailLen, zbuf_t* buf, u16_t offset,
316 u16_t bufType, u8_t ac, u8_t keyIdx)
317 {
318 #if ZM_SW_LOOP_BACK == 1
319 zbuf_t *rxbuf;
320 u8_t *puRxBuf;
321 u8_t *pHdr;
322 u8_t *psnap;
323 u16_t plcplen = 12;
324 u16_t i;
325 u16_t swlpOffset;
326 #endif /* #if ZM_SW_LOOP_BACK == 1 */
327 struct zsHpPriv* hpPriv;
328
329 zmw_get_wlan_dev(dev);
330 hpPriv=wd->hpPrivate;
331
332 zm_msg1_tx(ZM_LV_1, "zfHpSend(), len = ", 12 + headerLen-8 + snapLen + zfwBufGetSize(dev, buf) + 4 + 8);
333
334 /* Adjust ctrl setting : 6N14 yjsung */
335 zfAdjustCtrlSetting(dev, header, buf);
336
337 #if ZM_SW_LOOP_BACK != 1
338 hpPriv->usbSendBytes += zfwBufGetSize(dev, buf);
339 hpPriv->usbAcSendBytes[ac&0x3] += zfwBufGetSize(dev, buf);
340
341 /* Submit USB Out Urb */
342 zfwUsbSend(dev, USB_ENDPOINT_TX_INDEX, (u8_t *)header, headerLen,
343 (u8_t *)snap, snapLen, (u8_t *)tail, tailLen, buf, offset);
344 #endif
345
346 #if ZM_SW_LOOP_BACK == 1
347
348 rxbuf = zfwBufAllocate(dev, plcplen + headerLen-8 + snapLen + (zfwBufGetSize(dev, buf)-offset) + 4 + EXTRA_INFO_LEN);
349 pHdr = (u8_t *) header+8;
350 psnap = (u8_t *) snap;
351
352 zmw_enter_critical_section(dev);
353 /* software loop back */
354 /* Copy WLAN header and packet buffer */
355 swlpOffset = plcplen;
356
357 for(i = 0; i < headerLen-8; i++)
358 {
359 zmw_rx_buf_writeb(dev, rxbuf, swlpOffset+i, pHdr[i]);
360 }
361
362 swlpOffset += headerLen-8;
363
364 /* Copy SNAP header */
365 for(i = 0; i < snapLen; i++)
366 {
367 zmw_rx_buf_writeb(dev, rxbuf, swlpOffset+i, psnap[i]);
368 }
369
370 swlpOffset += snapLen;
371
372 /* Copy body from tx buf to rxbuf */
373 for(i = 0; i < (zfwBufGetSize(dev, buf)-offset); i++)
374 {
375 u8_t value = zmw_rx_buf_readb(dev, buf, i+offset);
376 zmw_rx_buf_writeb(dev, rxbuf, swlpOffset+i, value);
377 }
378
379 /* total length = PLCP + MacHeader + Payload + FCS + RXstatus */
380 /* 12 + headerLen-8 + snapLen + buf length + 4 + 8 */
381 zfwSetBufSetSize(dev, rxbuf, swlpOffset + (zfwBufGetSize(dev, buf)-offset) + 4 + EXTRA_INFO_LEN );
382
383 zmw_leave_critical_section(dev);
384
385 zfwBufFree(dev, buf, 0);
386
387 //zfwDumpBuf(dev, rxbuf);
388 //-------------------------------------------------
389
390 //zfCoreRecv(dev, rxbuf);
391
392 #endif /* #if ZM_SW_LOOP_BACK */
393
394 return ZM_SUCCESS;
395 }
396
397 /* Report moniter Hal rx information about rssi, evm, bandwidth, SG etc */
398 void zfHpQueryMonHalRxInfo(zdev_t* dev, u8_t *monHalRxInfo)
399 {
400 zmw_get_wlan_dev(dev);
401 zfMemoryCopy(monHalRxInfo,
402 (u8_t*)&(((struct zsHpPriv*)wd->hpPrivate)->halRxInfo),
403 sizeof(struct zsHalRxInfo));
404 }
405
406
407 u8_t zfIsDataFrame(zdev_t* dev, zbuf_t* buf)
408 {
409 u8_t frameType;
410 u8_t mpduInd;
411
412 mpduInd = zmw_rx_buf_readb(dev, buf, zfwBufGetSize(dev, buf)-1);
413
414 /* sinlge or First */
415 if ((mpduInd & 0x30) == 0x00 || (mpduInd & 0x30) == 0x20)
416 {
417 frameType = zmw_rx_buf_readb(dev, buf, 12);
418 }
419 else
420 {
421 frameType = zmw_rx_buf_readb(dev, buf, 0);
422 }
423
424 if((frameType & 0xf) == ZM_WLAN_DATA_FRAME)
425 return 1;
426 else
427 return 0;
428 }
429
430 u32_t zfcConvertRateOFDM(zdev_t* dev, zbuf_t* buf)
431 {
432 // What's the default value??
433 u32_t MCS = 0;
434
435 switch(zmw_rx_buf_readb(dev, buf, 0)& 0xf)
436 {
437 case 0xb:
438 MCS = 0x4;
439 break;
440 case 0xf:
441 MCS = 0x5;
442 break;
443 case 0xa:
444 MCS = 0x6;
445 break;
446 case 0xe:
447 MCS = 0x7;
448 break;
449 case 0x9:
450 MCS = 0x8;
451 break;
452 case 0xd:
453 MCS = 0x9;
454 break;
455 case 0x8:
456 MCS = 0xa;
457 break;
458 case 0xc:
459 MCS = 0xb;
460 break;
461 }
462 return MCS;
463 }
464
465 u16_t zfHpGetPayloadLen(zdev_t* dev,
466 zbuf_t* buf,
467 u16_t len,
468 u16_t plcpHdrLen,
469 u32_t *rxMT,
470 u32_t *rxMCS,
471 u32_t *rxBW,
472 u32_t *rxSG
473 )
474 {
475 u8_t modulation,mpduInd;
476 u16_t low, high, msb;
477 s16_t payloadLen = 0;
478
479 zmw_get_wlan_dev(dev);
480
481 mpduInd = zmw_rx_buf_readb(dev, buf, len-1);
482 modulation = zmw_rx_buf_readb(dev, buf, (len-1)) & 0x3;
483 *rxMT = modulation;
484
485 //zm_debug_msg1(" modulation= ", modulation);
486 switch (modulation) {
487 case 0: /* CCK Mode */
488 low = zmw_rx_buf_readb(dev, buf, 2);
489 high = zmw_rx_buf_readb(dev, buf, 3);
490 payloadLen = (low | high << 8) - 4;
491 if (wd->enableHALDbgInfo)
492 {
493 *rxMCS = zmw_rx_buf_readb(dev, buf, 0);
494 *rxBW = 0;
495 *rxSG = 0;
496 }
497 break;
498 case 1: /* Legacy-OFDM mode */
499 low = zmw_rx_buf_readb(dev, buf, 0) >> 5;
500 high = zmw_rx_buf_readb(dev, buf, 1);
501 msb = zmw_rx_buf_readb(dev, buf, 2) & 0x1;
502 payloadLen = (low | (high << 3) | (msb << 11)) - 4;
503 if (wd->enableHALDbgInfo)
504 {
505 *rxMCS = zfcConvertRateOFDM(dev, buf);
506 *rxBW = 0;
507 *rxSG = 0;
508 }
509 break;
510 case 2: /* HT OFDM mode */
511 //zm_debug_msg1("aggregation= ", (zmw_rx_buf_readb(dev, buf, 6) >> 3) &0x1 );
512 if ((mpduInd & 0x30) == 0x00 || (mpduInd & 0x30) == 0x10) //single or last mpdu
513 payloadLen = len - 24 - 4 - plcpHdrLen; // - rxStatus - fcs
514 else {
515 payloadLen = len - 4 - 4 - plcpHdrLen; // - rxStatus - fcs
516 //zm_debug_msg1("first or middle mpdu, plcpHdrLen= ", plcpHdrLen);
517 }
518 if (wd->enableHALDbgInfo)
519 {
520 *rxMCS = zmw_rx_buf_readb(dev, buf, 3) & 0x7f;
521 *rxBW = (zmw_rx_buf_readb(dev, buf, 3) >> 7) & 0x1;
522 *rxSG = (zmw_rx_buf_readb(dev, buf, 6) >> 7) & 0x1;
523 }
524 break;
525 default:
526 break;
527
528 }
529 /* return the payload length - FCS */
530 if (payloadLen < 0) payloadLen = 0;
531 return payloadLen;
532 }
533
534 /************************************************************************/
535 /* */
536 /* FUNCTION DESCRIPTION zfiUsbRecv */
537 /* Callback function for USB IN Transfer. */
538 /* */
539 /* INPUTS */
540 /* dev: device pointer */
541 /* */
542 /* OUTPUTS */
543 /* None */
544 /* */
545 /* AUTHOR */
546 /* Yuan-Gu Wei ZyDAS Technology Corporation 2005.10 */
547 /* */
548 /************************************************************************/
549 #define ZM_INT_USE_EP2 1
550 #define ZM_INT_USE_EP2_HEADER_SIZE 12
551
552 #if ZM_INT_USE_EP2 == 1
553 void zfiUsbRegIn(zdev_t* dev, u32_t* rsp, u16_t rspLen);
554 #endif
555
556 #ifdef ZM_OTUS_RX_STREAM_MODE
557 void zfiUsbRecvPerPkt(zdev_t *dev, zbuf_t *buf)
558 #else
559 void zfiUsbRecv(zdev_t *dev, zbuf_t *buf)
560 #endif
561 {
562
563
564 #if ZM_FW_LOOP_BACK != 1
565 u8_t mpduInd;
566 u16_t plcpHdrLen;
567 u16_t crcPlusRxStatusLen;
568 u16_t len, payloadLen=0;
569 u16_t i; //CWYang(+)
570 struct zsAdditionInfo addInfo;
571 u32_t rxMT;
572 u32_t rxMCS;
573 u32_t rxBW;
574 u32_t rxSG;
575 struct zsHpPriv* hpPriv;
576
577 zmw_get_wlan_dev(dev);
578 hpPriv=wd->hpPrivate;
579
580 //zm_msg0_rx(ZM_LV_0, "zfiUsbRecv()");
581
582 #if ZM_INT_USE_EP2 == 1
583
584 for (i=0; i<(ZM_INT_USE_EP2_HEADER_SIZE>>1); i++)
585 {
586 if (zmw_rx_buf_readh(dev, buf, i*2) != 0xffff)
587 break;
588 }
589
590 if (i==(ZM_INT_USE_EP2_HEADER_SIZE>>1))
591 {
592 u32_t rsp[ZM_USB_MAX_EPINT_BUFFER/4];
593 u16_t rspLen;
594 u32_t rspi;
595 u8_t* pdst = (u8_t*)rsp;
596
597 /* Interrupt Rsp */
598 rspLen = (u16_t) zfwBufGetSize(dev, buf)-ZM_INT_USE_EP2_HEADER_SIZE;
599
600 if (rspLen > 60)
601 {
602 zm_debug_msg1("Get error len by EP2 = \n", rspLen);
603 /* free USB buf */
604 zfwBufFree(dev, buf, 0);
605 return;
606 }
607
608 for (rspi=0; rspi<rspLen; rspi++)
609 {
610 *pdst = zmw_rx_buf_readb(dev, buf, rspi+ZM_INT_USE_EP2_HEADER_SIZE);
611 pdst++;
612 }
613
614 //if (adapter->zfcbUsbRegIn)
615 // adapter->zfcbUsbRegIn(adapter, rsp, rspLen);
616 zfiUsbRegIn(dev, rsp, rspLen);
617
618 /* free USB buf */
619 zfwBufFree(dev, buf, 0);
620 return;
621 }
622 #endif /* end of #if ZM_INT_USE_EP2 == 1 */
623
624 ZM_PERFORMANCE_RX_MPDU(dev, buf);
625
626 if (wd->swSniffer)
627 {
628 /* airopeek: Report everything up */
629 if (wd->zfcbRecv80211 != NULL)
630 {
631 wd->zfcbRecv80211(dev, buf, NULL);
632 }
633 }
634
635 /* Read the last byte */
636 len = zfwBufGetSize(dev, buf);
637 mpduInd = zmw_rx_buf_readb(dev, buf, len-1);
638
639 /* First MPDU */
640 if((mpduInd & 0x30) == 0x20)
641 {
642 u16_t duration;
643 if (zmw_rx_buf_readb(dev, buf, 36) == 0) //AC = BE
644 {
645 duration = zmw_rx_buf_readh(dev, buf, 14);
646 if (duration > hpPriv->aggMaxDurationBE)
647 {
648 hpPriv->aggMaxDurationBE = duration;
649 }
650 else
651 {
652 if (hpPriv->aggMaxDurationBE > 10)
653 {
654 hpPriv->aggMaxDurationBE--;
655 }
656 }
657 //DbgPrint("aggMaxDurationBE=%d", hpPriv->aggMaxDurationBE);
658 }
659 }
660
661 /* First MPDU or Single MPDU */
662 if(((mpduInd & 0x30) == 0x00) || ((mpduInd & 0x30) == 0x20))
663 //if ((mpduInd & 0x10) == 0x00)
664 {
665 plcpHdrLen = 12; // PLCP header length
666 }
667 else
668 {
669 if (zmw_rx_buf_readh(dev, buf, 4) == wd->macAddr[0] &&
670 zmw_rx_buf_readh(dev, buf, 6) == wd->macAddr[1] &&
671 zmw_rx_buf_readh(dev, buf, 8) == wd->macAddr[2]) {
672 plcpHdrLen = 0;
673 }
674 else if (zmw_rx_buf_readh(dev, buf, 16) == wd->macAddr[0] &&
675 zmw_rx_buf_readh(dev, buf, 18) == wd->macAddr[1] &&
676 zmw_rx_buf_readh(dev, buf, 20) == wd->macAddr[2]){
677 plcpHdrLen = 12;
678 }
679 else {
680 plcpHdrLen = 0;
681 }
682 }
683
684 /* Last MPDU or Single MPDU */
685 if ((mpduInd & 0x30) == 0x00 || (mpduInd & 0x30) == 0x10)
686 {
687 crcPlusRxStatusLen = EXTRA_INFO_LEN + 4; // Extra bytes + FCS
688 }
689 else
690 {
691 crcPlusRxStatusLen = 4 + 4; // Extra 4 bytes + FCS
692 }
693
694 if (len < (plcpHdrLen+10+crcPlusRxStatusLen))
695 {
696 zm_msg1_rx(ZM_LV_0, "Invalid Rx length=", len);
697 //zfwDumpBuf(dev, buf);
698
699 zfwBufFree(dev, buf, 0);
700 return;
701 }
702
703 /* display RSSI combined */
704 /*
705 * ¢z¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢s¢w¢w¢w¢w¢w¢w¢w¢w¢s¢w¢w¢w¢w¢w¢w¢s¢w¢w¢w¢w¢w¢w¢s¢w¢w¢w¢w¢w¢w¢w¢w¢w¢s¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢{
706 * ¢x PLCP Header ¢x MPDU ¢x RSSI ¢x EVM ¢x PHY Err ¢x MAC Status ¢x
707 * ¢u¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢q¢w¢w¢w¢w¢w¢w¢w¢w¢q¢w¢w¢w¢w¢w¢w¢q¢w¢w¢w¢w¢w¢w¢q¢w¢w¢w¢w¢w¢w¢w¢w¢w¢q¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢t
708 * ¢x 12 ¢x n ¢x 7 ¢x 12 ¢x 1 ¢x 4 ¢x
709 * ¢|¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢r¢w¢w¢w¢w¢w¢w¢w¢w¢r¢w¢w¢w¢w¢w¢w¢r¢w¢w¢w¢w¢w¢w¢r¢w¢w¢w¢w¢w¢w¢w¢w¢w¢r¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢}
710 * RSSI filed (From BB and MAC just pass them to host)
711 * Byte1: RSSI for antenna 0.
712 * Byte2: RSSI for antenna 1.
713 * Byte3: RSSI for antenna 2.
714 * Byte4: RSSI for antenna 0 extension.
715 * Byte5: RSSI for antenna 1 extension.
716 * Byte6: RSSI for antenna 2 extension.
717 * Byte7: RSSI for antenna combined.
718 */
719
720 //zm_debug_msg1(" recv RSSI = ", zmw_rx_buf_readb(dev, buf, (len-1)-17));
721
722 payloadLen = zfHpGetPayloadLen(dev, buf, len, plcpHdrLen, &rxMT, &rxMCS, &rxBW, &rxSG);
723
724 /* Hal Rx info */
725 /* First MPDU or Single MPDU */
726 if(((mpduInd & 0x30) == 0x00) || ((mpduInd & 0x30) == 0x20))
727 {
728 if (wd->enableHALDbgInfo && zfIsDataFrame(dev, buf))
729 {
730 ((struct zsHpPriv*)wd->hpPrivate)->halRxInfo.currentRxDataMT = rxMT;
731 ((struct zsHpPriv*)wd->hpPrivate)->halRxInfo.currentRxDataMCS = rxMCS;
732 ((struct zsHpPriv*)wd->hpPrivate)->halRxInfo.currentRxDataBW = rxBW;
733 ((struct zsHpPriv*)wd->hpPrivate)->halRxInfo.currentRxDataSG = rxSG;
734 }
735 }
736
737 if ((plcpHdrLen + payloadLen) > len) {
738 zm_msg1_rx(ZM_LV_0, "Invalid payload length=", payloadLen);
739 zfwBufFree(dev, buf, 0);
740 return;
741 }
742
743 //Store Rx Tail Infomation before Remove--CWYang(+)
744
745 /*
746 * Brief format of OUTS chip
747 * ¢z¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢s¢w¢w¢w¢w¢w¢w¢w¢w¢s¢w¢w¢w¢w¢w¢w¢s¢w¢w¢w¢w¢w¢w¢s¢w¢w¢w¢w¢w¢w¢w¢w¢w¢s¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢{
748 * ¢x PLCP Header ¢x MPDU ¢x RSSI ¢x EVM ¢x PHY Err ¢x MAC Status ¢x
749 * ¢u¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢q¢w¢w¢w¢w¢w¢w¢w¢w¢q¢w¢w¢w¢w¢w¢w¢q¢w¢w¢w¢w¢w¢w¢q¢w¢w¢w¢w¢w¢w¢w¢w¢w¢q¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢t
750 * ¢x 12 ¢x n ¢x 7 ¢x 12 ¢x 1 ¢x 4 ¢x
751 * ¢|¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢r¢w¢w¢w¢w¢w¢w¢w¢w¢r¢w¢w¢w¢w¢w¢w¢r¢w¢w¢w¢w¢w¢w¢r¢w¢w¢w¢w¢w¢w¢w¢w¢w¢r¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢w¢}
752 * RSSI:
753 * Byte 1 antenna 0
754 * Byte 2 antenna 1
755 * Byte 3 antenna 2
756 * Byte 4 antenna 0 extension
757 * Byte 5 antenna 1 extension
758 * Byte 6 antenna 2 extension
759 * Byte 7 antenna combined
760 * EVM:
761 * Byte 1 Stream 0 pilot 0
762 * Byte 2 Stream 0 pilot 1
763 * Byte 3 Stream 0 pilot 2
764 * Byte 4 Stream 0 pilot 3
765 * Byte 5 Stream 0 pilot 4
766 * Byte 6 Stream 0 pilot 5
767 * Byte 7 Stream 1 pilot 0
768 * Byte 8 Stream 1 pilot 1
769 * Byte 9 Stream 1 pilot 2
770 * Byte 10 Stream 1 pilot 3
771 * Byte 11 Stream 1 pilot 4
772 * Byte 12 Stream 1 pilot 5
773 */
774
775 /* Fill the Tail information */
776 /* Last MPDU or Single MPDU */
777 if ((mpduInd & 0x30) == 0x00 || (mpduInd & 0x30) == 0x10)
778 {
779 #define ZM_RX_RSSI_COMPENSATION 27
780 u8_t zm_rx_rssi_compensation = ZM_RX_RSSI_COMPENSATION;
781
782 /* RSSI information */
783 addInfo.Tail.Data.SignalStrength1 = zmw_rx_buf_readb(dev, buf,
784 (len-1) - 17) + ((hpPriv->rxStrongRSSI == 1)?zm_rx_rssi_compensation:0);
785 #undef ZM_RX_RSSI_COMPENSATION
786
787 /* EVM */
788
789 /* TODO: for RD/BB debug message */
790 /* save current rx hw infomration, report to DrvCore/Application */
791 if (wd->enableHALDbgInfo && zfIsDataFrame(dev, buf))
792 {
793 u8_t trssi;
794 for (i=0; i<7; i++)
795 {
796 trssi = zmw_rx_buf_readb(dev, buf, (len-1) - 23 + i);
797 if (trssi&0x80)
798 {
799 trssi = ((~((u8_t)trssi) & 0x7f) + 1) & 0x7f;
800 }
801 ((struct zsHpPriv*)wd->hpPrivate)->halRxInfo.currentRSSI[i] = trssi;
802
803 }
804 if (rxMT==2)
805 {
806 //if (rxBW)
807 //{
808 for (i=0; i<12; i++)
809 ((struct zsHpPriv*)wd->hpPrivate)->halRxInfo.currentRxEVM[i] =
810 zmw_rx_buf_readb(dev, buf, (len-1) - 16 + i);
811 //}
812 //else
813 //{
814 // for (i=0; i<4; i++)
815 // ((struct zsHpPriv*)wd->hpPrivate)->halRxInfo.currentRxEVM[i] =
816 // zmw_rx_buf_readb(dev, buf, (len-1) - 16 + i);
817 //}
818 }
819
820 } /* if (wd->enableHALDbgInfo && zfIsDataFrame(dev, buf)) */
821
822 }
823 else
824 {
825 /* Mid or First aggregate frame without phy rx information */
826 addInfo.Tail.Data.SignalStrength1 = 0;
827 }
828
829 addInfo.Tail.Data.SignalStrength2 = 0;
830 addInfo.Tail.Data.SignalStrength3 = 0;
831 addInfo.Tail.Data.SignalQuality = 0;
832
833 addInfo.Tail.Data.SAIndex = zmw_rx_buf_readb(dev, buf, len - 4);
834 addInfo.Tail.Data.DAIndex = zmw_rx_buf_readb(dev, buf, len - 3);
835 addInfo.Tail.Data.ErrorIndication = zmw_rx_buf_readb(dev, buf, len - 2);
836 addInfo.Tail.Data.RxMacStatus = zmw_rx_buf_readb(dev, buf, len - 1);
837 /* Remove CRC and Rx Status */
838 zfwBufSetSize(dev, buf, (len-crcPlusRxStatusLen));
839 //zfwBufSetSize(dev, buf, payloadLen + plcpHdrLen); /* payloadLen + PLCP 12 - FCS 4*/
840
841 //Store PLCP Header Infomation before Remove--CWYang(+)
842 if (plcpHdrLen != 0)
843 {
844 for (i = 0; i < plcpHdrLen; i++)
845 {
846 addInfo.PlcpHeader[i] = zmw_rx_buf_readb(dev, buf, i);
847 }
848 }
849 else
850 {
851 addInfo.PlcpHeader[0] = 0;
852 }
853 /* Remove PLCP header */
854 zfwBufRemoveHead(dev, buf, plcpHdrLen);
855
856 /* handle 802.11 frame */
857 zfCoreRecv(dev, buf, &addInfo);
858
859 #else
860 /* Firmware loopback: Rx frame = Tx frame */
861 /* convert Rx frame to fit receive frame format */
862 zbuf_t *new_buf;
863 u8_t ctrl_offset = 8;
864 u8_t PLCP_Len = 12;
865 u8_t data;
866 u8_t i;
867
868
869 /* Tx: | ctrl_setting | Mac hdr | data | */
870 /* 8 24 x */
871
872 /* Rx: | PLCP | Mac hdr | data | FCS | Rxstatus | */
873 /* 12 24 x 4 8 */
874
875 /* new allocate a rx format size buf */
876 new_buf = zfwBufAllocate(dev, zfwBufGetSize(dev, buf)-8+12+4+EXTRA_INFO_LEN);
877
878 for (i=0; i<zfwBufGetSize(dev, buf)-ctrl_offset; i++)
879 {
880 data = zmw_rx_buf_readb(dev, buf, ctrl_offset+i);
881 zmw_rx_buf_writeb(dev, new_buf, PLCP_Len+i, data);
882 }
883
884 zfwBufSetSize(dev, new_buf, zfwBufGetSize(dev, buf)-8+12+4+EXTRA_INFO_LEN);
885
886 zfwBufFree(dev, buf, 0);
887
888 /* receive the new_buf */
889 //zfCoreRecv(dev, new_buf);
890
891 #endif
892
893 }
894
895 #ifdef ZM_OTUS_RX_STREAM_MODE
896 void zfiUsbRecv(zdev_t *dev, zbuf_t *buf)
897 {
898 u16_t index = 0;
899 u16_t chkIdx;
900 u32_t status = 0;
901 u16_t ii;
902 zbuf_t *newBuf;
903 zbuf_t *rxBufPool[8];
904 u16_t rxBufPoolIndex = 0;
905 struct zsHpPriv *halPriv;
906 u8_t *srcBufPtr;
907 u32_t bufferLength;
908 u16_t usbRxRemainLen;
909 u16_t usbRxPktLen;
910
911 zmw_get_wlan_dev(dev);
912
913 halPriv = (struct zsHpPriv*)wd->hpPrivate;
914 srcBufPtr = zmw_buf_get_buffer(dev, buf);
915
916 bufferLength = zfwBufGetSize(dev, buf);
917
918 /* Zero Length Transfer */
919 if (!bufferLength)
920 {
921 zfwBufFree(dev, buf, 0);
922 return;
923 }
924
925 usbRxRemainLen = halPriv->usbRxRemainLen;
926 usbRxPktLen = halPriv->usbRxTransferLen;
927
928 /* Check whether there is any data in the last transfer */
929 if (usbRxRemainLen != 0 )
930 {
931 zbuf_t *remainBufPtr = halPriv->remainBuf;
932 u8_t* BufPtr = NULL;
933
934 if ( remainBufPtr != NULL )
935 {
936 BufPtr = zmw_buf_get_buffer(dev, remainBufPtr);
937 }
938
939 index = usbRxRemainLen;
940 usbRxRemainLen -= halPriv->usbRxPadLen;
941
942 /* Copy data */
943 if ( BufPtr != NULL )
944 {
945 zfwMemoryCopy(&(BufPtr[usbRxPktLen]), srcBufPtr, usbRxRemainLen);
946 }
947
948 usbRxPktLen += usbRxRemainLen;
949 halPriv->usbRxRemainLen = 0;
950
951 if ( remainBufPtr != NULL )
952 {
953 zfwBufSetSize(dev, remainBufPtr, usbRxPktLen);
954 rxBufPool[rxBufPoolIndex++] = remainBufPtr;
955 }
956 halPriv->remainBuf = NULL;
957 }
958
959 //zm_debug_msg1("length: %d\n", (int)pUsbRxTransfer->pRxUrb->UrbBulkOrInterruptTransfer.TransferBufferLength);
960
961 bufferLength = zfwBufGetSize(dev, buf);
962 //printk("bufferLength %d\n", bufferLength);
963 while(index < bufferLength)
964 {
965 u16_t pktLen;
966 u16_t pktTag;
967 //u8_t *ptr = (u8_t*)((struct zsBuffer*)pUsbRxTransfer->buf)->data;
968 u8_t *ptr = srcBufPtr;
969
970 /* Retrieve packet length and tag */
971 pktLen = ptr[index] + (ptr[index+1] << 8);
972 pktTag = ptr[index+2] + (ptr[index+3] << 8);
973
974 if (pktTag == ZM_USB_STREAM_MODE_TAG)
975 {
976 u16_t padLen;
977
978 zm_assert(pktLen < ZM_WLAN_MAX_RX_SIZE);
979
980 //printk("Get a packet, pktLen: 0x%04x\n", pktLen);
981
982 /* Calcuate the padding length, in the current design,
983 the length should be padded to 4 byte boundray. */
984 padLen = ZM_USB_STREAM_MODE_TAG_LEN - (pktLen & 0x3);
985
986 if(padLen == ZM_USB_STREAM_MODE_TAG_LEN)
987 padLen = 0;
988
989 chkIdx = index;
990 index = index + ZM_USB_STREAM_MODE_TAG_LEN + pktLen + padLen;
991
992 if (chkIdx > ZM_MAX_USB_IN_TRANSFER_SIZE)
993 {
994 zm_debug_msg1("chkIdx is too large, chkIdx: %d\n", chkIdx);
995 zm_assert(0);
996 status = 1;
997 break;
998 }
999
1000 if (index > ZM_MAX_USB_IN_TRANSFER_SIZE)
1001 {
1002 //struct zsBuffer* BufPtr;
1003 //struct zsBuffer* UsbBufPtr;
1004 u8_t *BufPtr;
1005 u8_t *UsbBufPtr;
1006
1007 halPriv->usbRxRemainLen = index - ZM_MAX_USB_IN_TRANSFER_SIZE; // - padLen;
1008 halPriv->usbRxTransferLen = ZM_MAX_USB_IN_TRANSFER_SIZE -
1009 chkIdx - ZM_USB_STREAM_MODE_TAG_LEN;
1010 halPriv->usbRxPadLen = padLen;
1011 //check_index = index;
1012
1013 if (halPriv->usbRxTransferLen > ZM_WLAN_MAX_RX_SIZE)
1014 {
1015 zm_debug_msg1("check_len is too large, chk_len: %d\n",
1016 halPriv->usbRxTransferLen);
1017 status = 1;
1018 break;
1019 }
1020
1021 /* Allocate a skb buffer */
1022 newBuf = zfwBufAllocate(dev, ZM_WLAN_MAX_RX_SIZE);
1023
1024 if ( newBuf != NULL )
1025 {
1026 BufPtr = zmw_buf_get_buffer(dev, newBuf);
1027 UsbBufPtr = srcBufPtr;
1028
1029 /* Copy the buffer */
1030 zfwMemoryCopy(BufPtr, &(UsbBufPtr[chkIdx+ZM_USB_STREAM_MODE_TAG_LEN]), halPriv->usbRxTransferLen);
1031
1032 /* Record the buffer pointer */
1033 halPriv->remainBuf = newBuf;
1034 }
1035 }
1036 else
1037 {
1038 u8_t* BufPtr;
1039 u8_t* UsbBufPtr;
1040
1041 /* Allocate a skb buffer */
1042 newBuf = zfwBufAllocate(dev, ZM_WLAN_MAX_RX_SIZE);
1043 if ( newBuf != NULL )
1044 {
1045 BufPtr = zmw_buf_get_buffer(dev, newBuf);
1046 UsbBufPtr = srcBufPtr;
1047
1048 /* Copy the buffer */
1049 zfwMemoryCopy(BufPtr, &(UsbBufPtr[chkIdx+ZM_USB_STREAM_MODE_TAG_LEN]), pktLen);
1050
1051 zfwBufSetSize(dev, newBuf, pktLen);
1052 rxBufPool[rxBufPoolIndex++] = newBuf;
1053 }
1054 }
1055 }
1056 else
1057 {
1058 u16_t i;
1059
1060 DbgPrint("Can't find tag, pkt_len: 0x%04x, tag: 0x%04x\n",
1061 pktLen, pktTag);
1062
1063
1064 break;
1065 }
1066 }
1067
1068 /* Free buffer */
1069 //zfwBufFree(adapter, pUsbRxTransfer->buf, 0);
1070 zfwBufFree(dev, buf, 0);
1071
1072 for(ii = 0; ii < rxBufPoolIndex; ii++)
1073 {
1074 zfiUsbRecvPerPkt(dev, rxBufPool[ii]);
1075 }
1076 }
1077 #endif
1078
1079 /************************************************************************/
1080 /* */
1081 /* FUNCTION DESCRIPTION zfUsbInit */
1082 /* Initialize USB resource. */
1083 /* */
1084 /* INPUTS */
1085 /* dev : device pointer */
1086 /* */
1087 /* OUTPUTS */
1088 /* None */
1089 /* */
1090 /* AUTHOR */
1091 /* Stephen Chen ZyDAS Technology Corporation 2005.12 */
1092 /* */
1093 /************************************************************************/
1094 void zfUsbInit(zdev_t* dev)
1095 {
1096 /* Initialize Rx & INT endpoint for receiving data & interrupt */
1097 zfwUsbEnableRxEpt(dev, USB_ENDPOINT_RX_INDEX);
1098 zfwUsbEnableIntEpt(dev, USB_ENDPOINT_INT_INDEX);
1099
1100 return;
1101 }
1102
1103
1104 /************************************************************************/
1105 /* */
1106 /* FUNCTION DESCRIPTION zfUsbFree */
1107 /* Free PCI resource. */
1108 /* */
1109 /* INPUTS */
1110 /* dev : device pointer */
1111 /* */
1112 /* OUTPUTS */
1113 /* None */
1114 /* */
1115 /* AUTHOR */
1116 /* Stephen Chen ZyDAS Technology Corporation 2005.12 */
1117 /* */
1118 /************************************************************************/
1119 void zfUsbFree(zdev_t* dev)
1120 {
1121 struct zsHpPriv *halPriv;
1122
1123 zmw_get_wlan_dev(dev);
1124
1125 halPriv = (struct zsHpPriv*)wd->hpPrivate;
1126
1127 #ifdef ZM_OTUS_RX_STREAM_MODE
1128 if ( halPriv->remainBuf != NULL )
1129 {
1130 zfwBufFree(dev, halPriv->remainBuf, 0);
1131 }
1132 #endif
1133
1134 return;
1135 }
1136
1137 void zfHpSendBeacon(zdev_t* dev, zbuf_t* buf, u16_t len)
1138 {
1139 u32_t hw, lw;
1140 u16_t i;
1141 zmw_get_wlan_dev(dev);
1142
1143 /* Write to beacon buffer (ZM_BEACON_BUFFER_ADDRESS) */
1144 for (i = 0; i<len; i+=4)
1145 {
1146 lw = zmw_tx_buf_readh(dev, buf, i);
1147 hw = zmw_tx_buf_readh(dev, buf, i+2);
1148
1149 zfDelayWriteInternalReg(dev, ZM_BEACON_BUFFER_ADDRESS+i, (hw<<16)+lw);
1150 }
1151
1152 /* Beacon PCLP header */
1153 if (((struct zsHpPriv*)wd->hpPrivate)->hwFrequency < 3000)
1154 {
1155 zfDelayWriteInternalReg(dev, ZM_MAC_REG_BCN_PLCP, ((len+4)<<(3+16))+0x0400);
1156 }
1157 else
1158 {
1159 zfDelayWriteInternalReg(dev, ZM_MAC_REG_BCN_PLCP, ((len+4)<<(16))+0x001b);
1160 }
1161
1162 /* Beacon length (include CRC32) */
1163 zfDelayWriteInternalReg(dev, ZM_MAC_REG_BCN_LENGTH, len+4);
1164
1165 /* Beacon Ready */
1166 zfDelayWriteInternalReg(dev, ZM_MAC_REG_BCN_CTRL, 1);
1167 zfFlushDelayWrite(dev);
1168
1169 /* Free beacon buf */
1170 zfwBufFree(dev, buf, 0);
1171
1172 return;
1173 }
1174
1175
1176 #define ZM_STATUS_TX_COMP 0x00
1177 #define ZM_STATUS_RETRY_COMP 0x01
1178 #define ZM_STATUS_TX_FAILED 0x02
1179 void zfiUsbRegIn(zdev_t* dev, u32_t* rsp, u16_t rspLen)
1180 {
1181 //u8_t len, type, i;
1182 u8_t type;
1183 u8_t *u8rsp;
1184 u16_t status;
1185 u32_t bitmap;
1186 zmw_get_wlan_dev(dev);
1187
1188 zm_msg0_mm(ZM_LV_3, "zfiUsbRegIn()");
1189
1190 u8rsp = (u8_t *)rsp;
1191
1192 //len = *u8rsp;
1193 type = *(u8rsp+1);
1194 u8rsp = u8rsp+4;
1195
1196
1197 /* Interrupt event */
1198 if ((type & 0xC0) == 0xC0)
1199 {
1200 if (type == 0xC0)
1201 {
1202 zfCoreEvent(dev, 0, u8rsp);
1203
1204 }
1205 else if (type == 0xC1)
1206 {
1207 status = (u16_t)(rsp[3] >> 16);
1208
1209 ////6789
1210 rsp[8] = rsp[8] >> 2 | (rsp[9] & 0x1) << 6;
1211 switch (status)
1212 {
1213 case ZM_STATUS_RETRY_COMP :
1214 zfCoreEvent(dev, 1, u8rsp);
1215 break;
1216 case ZM_STATUS_TX_FAILED :
1217 zfCoreEvent(dev, 2, u8rsp);
1218 break;
1219 case ZM_STATUS_TX_COMP :
1220 zfCoreEvent(dev, 3, u8rsp);
1221 break;
1222 }
1223 }
1224 else if (type == 0xC2)
1225 {
1226 zfBeaconCfgInterrupt(dev, u8rsp);
1227 }
1228 else if (type == 0xC3)
1229 {
1230 zfEndOfAtimWindowInterrupt(dev);
1231 }
1232 else if (type == 0xC4)
1233 {
1234 bitmap = (rsp[1] >> 16) + ((rsp[2] & 0xFFFF) << 16 );
1235 //zfBawCore(dev, (u16_t)rsp[1] & 0xFFFF, bitmap, (u16_t)(rsp[2] >> 16) & 0xFF);
1236 }
1237 else if (type == 0xC5)
1238 {
1239 u16_t i;
1240 for (i=1; i<(rspLen/4); i++) {
1241 u8rsp = (u8_t *)(rsp+i);
1242 //DbgPrint("0xC5:rsp[%d]=0x%lx\n", i, ((u32_t*)u8rsp)[0]);
1243 zfCoreEvent(dev, 4, u8rsp);
1244 }
1245 }
1246 else if (type == 0xC6)
1247 {
1248 zm_debug_msg0("\n\n WatchDog interrupt!!! : 0xC6 \n\n");
1249 if (wd->zfcbHwWatchDogNotify != NULL)
1250 {
1251 wd->zfcbHwWatchDogNotify(dev);
1252 }
1253 }
1254 else if (type == 0xC8)
1255 {
1256 //PZSW_ADAPTER adapter;
1257
1258 // for SPI flash program chk Flag
1259 zfwDbgProgrameFlashChkDone(dev);
1260 }
1261 else if (type == 0xC9)
1262 {
1263 struct zsHpPriv* hpPriv=wd->hpPrivate;
1264
1265 zm_debug_msg0("##### Tx retransmission 5 times event #####");
1266
1267 /* correct tx retransmission issue */
1268 hpPriv->retransmissionEvent = 1;
1269 }
1270 }
1271 else
1272 {
1273 zfIdlRsp(dev, rsp, rspLen);
1274 }
1275 }
1276
1277
1278 #define ZM_PROGRAM_RAM_ADDR 0x200000 //0x1000 //0x700000
1279 #define FIRMWARE_DOWNLOAD 0x30
1280 #define FIRMWARE_DOWNLOAD_COMP 0x31
1281 #define FIRMWARE_CONFIRM 0x32
1282
1283 u16_t zfFirmwareDownload(zdev_t* dev, u32_t* fw, u32_t len, u32_t offset)
1284 {
1285 u16_t ret = ZM_SUCCESS;
1286 u32_t uCodeOfst = offset;
1287 u8_t *image, *ptr;
1288 u32_t result;
1289
1290 image = (u8_t*) fw;
1291 ptr = image;
1292
1293 while (len > 0)
1294 {
1295 u32_t translen = (len > 4096) ? 4096 : len;
1296
1297 result = zfwUsbSubmitControl(dev, FIRMWARE_DOWNLOAD,
1298 (u16_t) (uCodeOfst >> 8),
1299 0, image, translen);
1300
1301 if (result != ZM_SUCCESS)
1302 {
1303 zm_msg0_init(ZM_LV_0, "FIRMWARE_DOWNLOAD failed");
1304 ret = 1;
1305 goto exit;
1306 }
1307
1308 len -= translen;
1309 image += translen;
1310 uCodeOfst += translen; // in Word (16 bit)
1311
1312 result = 0;
1313 }
1314
1315 /* If download firmware success, issue a command to firmware */
1316 if (ret == 0)
1317 {
1318 result = zfwUsbSubmitControl(dev, FIRMWARE_DOWNLOAD_COMP,
1319 0, 0, NULL, 0);
1320
1321 if (result != ZM_SUCCESS)
1322 {
1323 zm_msg0_init(ZM_LV_0, "FIRMWARE_DOWNLOAD_COMP failed");
1324 ret = 1;
1325 goto exit;
1326 }
1327 }
1328
1329
1330 exit:
1331
1332 return ret;
1333
1334 }
1335
1336 u16_t zfFirmwareDownloadNotJump(zdev_t* dev, u32_t* fw, u32_t len, u32_t offset)
1337 {
1338 u16_t ret = ZM_SUCCESS;
1339 u32_t uCodeOfst = offset;
1340 u8_t *image, *ptr;
1341 u32_t result;
1342
1343 image = (u8_t*) fw;
1344 ptr = image;
1345
1346 while (len > 0)
1347 {
1348 u32_t translen = (len > 4096) ? 4096 : len;
1349
1350 result = zfwUsbSubmitControl(dev, FIRMWARE_DOWNLOAD,
1351 (u16_t) (uCodeOfst >> 8),
1352 0, image, translen);
1353
1354 if (result != ZM_SUCCESS)
1355 {
1356 zm_msg0_init(ZM_LV_0, "FIRMWARE_DOWNLOAD failed");
1357 ret = 1;
1358 goto exit;
1359 }
1360
1361 len -= translen;
1362 image += translen;
1363 uCodeOfst += translen; // in Word (16 bit)
1364
1365 result = 0;
1366 }
1367
1368 exit:
1369
1370 return ret;
1371
1372 }
1373
1374 /************************************************************************/
1375 /* */
1376 /* FUNCTION DESCRIPTION zfIdlGetFreeTxdCount */
1377 /* Get free PCI PCI TxD count. */
1378 /* */
1379 /* INPUTS */
1380 /* dev : device pointer */
1381 /* */
1382 /* OUTPUTS */
1383 /* None */
1384 /* */
1385 /* AUTHOR */
1386 /* Stephen ZyDAS Technology Corporation 2006.6 */
1387 /* */
1388 /************************************************************************/
1389 u32_t zfHpGetFreeTxdCount(zdev_t* dev)
1390 {
1391 return zfwUsbGetFreeTxQSize(dev);
1392 }
1393
1394 u32_t zfHpGetMaxTxdCount(zdev_t* dev)
1395 {
1396 //return 8;
1397 return zfwUsbGetMaxTxQSize(dev);
1398 }
1399
1400 void zfiUsbRegOutComplete(zdev_t* dev)
1401 {
1402 return;
1403 }
1404
1405 extern void zfPushVtxq(zdev_t* dev);
1406
1407 void zfiUsbOutComplete(zdev_t* dev, zbuf_t *buf, u8_t status, u8_t *hdr) {
1408 #ifndef ZM_ENABLE_AGGREGATION
1409 if (buf) {
1410 zfwBufFree(dev, buf, 0);
1411 }
1412 #else
1413 #ifdef ZM_BYPASS_AGGR_SCHEDULING
1414 //Simply free the buf since BA retransmission is done in the firmware
1415 if (buf)
1416 {
1417 zfwBufFree(dev, buf, 0);
1418 }
1419 zfPushVtxq(dev);
1420 #else
1421 zmw_get_wlan_dev(dev);
1422
1423 #ifdef ZM_ENABLE_FW_BA_RETRANSMISSION
1424 //Simply free the buf since BA retransmission is done in the firmware
1425 if (buf)
1426 {
1427 zfwBufFree(dev, buf, 0);
1428 }
1429 #else
1430 u8_t agg;
1431 u16_t frameType;
1432
1433 if(!hdr && buf) {
1434 zfwBufFree(dev, buf, 0);
1435 //zm_debug_msg0("buf Free due to hdr == NULL");
1436 return;
1437 }
1438
1439 if(hdr && buf) {
1440 frameType = hdr[8] & 0xf;
1441 agg = (u8_t)(hdr[2] >> 5 ) & 0x1;
1442 //zm_debug_msg1("AGG=", agg);
1443
1444 if (!status) {
1445 if (agg) {
1446 //delete buf in ba fail queue??
1447 //not ganna happen?
1448 }
1449 else {
1450 zfwBufFree(dev, buf, 0);
1451 }
1452 }
1453 else {
1454 if (agg) {
1455 //don't do anything
1456 //zfwBufFree(dev, buf, 0);
1457 }
1458 else {
1459 zfwBufFree(dev, buf, 0);
1460 }
1461 }
1462 }
1463 #endif
1464
1465 if (wd->state != ZM_WLAN_STATE_ENABLED) {
1466 return;
1467 }
1468
1469 if( (wd->wlanMode == ZM_MODE_AP) ||
1470 (wd->wlanMode == ZM_MODE_INFRASTRUCTURE && wd->sta.EnableHT) ||
1471 (wd->wlanMode == ZM_MODE_PSEUDO) ) {
1472 zfAggTxScheduler(dev, 0);
1473 }
1474 #endif
1475 #endif
1476
1477 return;
1478
1479 }
Tomato firmware and modifications.