?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
RT-AC56 3.0.0.4.374.37 core
[tomato.git] / release / src-rt-6.x.4708 / linux / linux-2.6.36 / drivers / pcmcia / yenta_socket.c
blob1075e55adb074de8b0ed330b89b80d6eab47cbd9
1 /*
2 * Regular cardbus driver ("yenta_socket")
3 *
4 * (C) Copyright 1999, 2000 Linus Torvalds
5 *
6 * Changelog:
7 * Aug 2002: Manfred Spraul <manfred@colorfullife.com>
8 * Dynamically adjust the size of the bridge resource
9 *
10 * May 2003: Dominik Brodowski <linux@brodo.de>
11 * Merge pci_socket.c and yenta.c into one file
12 */
13 #include <linux/init.h>
14 #include <linux/pci.h>
15 #include <linux/workqueue.h>
16 #include <linux/interrupt.h>
17 #include <linux/delay.h>
18 #include <linux/module.h>
19 #include <linux/io.h>
20 #include <linux/slab.h>
21
22 #include <pcmcia/ss.h>
23 #include <pcmcia/cs.h>
24
25 #include "yenta_socket.h"
26 #include "i82365.h"
27
28 static int disable_clkrun;
29 module_param(disable_clkrun, bool, 0444);
30 MODULE_PARM_DESC(disable_clkrun, "If PC card doesn't function properly, please try this option");
31
32 static int isa_probe = 1;
33 module_param(isa_probe, bool, 0444);
34 MODULE_PARM_DESC(isa_probe, "If set ISA interrupts are probed (default). Set to N to disable probing");
35
36 static int pwr_irqs_off;
37 module_param(pwr_irqs_off, bool, 0644);
38 MODULE_PARM_DESC(pwr_irqs_off, "Force IRQs off during power-on of slot. Use only when seeing IRQ storms!");
39
40 static char o2_speedup[] = "default";
41 module_param_string(o2_speedup, o2_speedup, sizeof(o2_speedup), 0444);
42 MODULE_PARM_DESC(o2_speedup, "Use prefetch/burst for O2-bridges: 'on', 'off' "
43 "or 'default' (uses recommended behaviour for the detected bridge)");
44
45 /*
46 * Only probe "regular" interrupts, don't
47 * touch dangerous spots like the mouse irq,
48 * because there are mice that apparently
49 * get really confused if they get fondled
50 * too intimately.
51 *
52 * Default to 11, 10, 9, 7, 6, 5, 4, 3.
53 */
54 static u32 isa_interrupts = 0x0ef8;
55
56
57 #define debug(x, s, args...) dev_dbg(&s->dev->dev, x, ##args)
58
59 /* Don't ask.. */
60 #define to_cycles(ns) ((ns)/120)
61 #define to_ns(cycles) ((cycles)*120)
62
63 /*
64 * yenta PCI irq probing.
65 * currently only used in the TI/EnE initialization code
66 */
67 #ifdef CONFIG_YENTA_TI
68 static int yenta_probe_cb_irq(struct yenta_socket *socket);
69 static unsigned int yenta_probe_irq(struct yenta_socket *socket,
70 u32 isa_irq_mask);
71 #endif
72
73
74 static unsigned int override_bios;
75 module_param(override_bios, uint, 0000);
76 MODULE_PARM_DESC(override_bios, "yenta ignore bios resource allocation");
77
78 /*
79 * Generate easy-to-use ways of reading a cardbus sockets
80 * regular memory space ("cb_xxx"), configuration space
81 * ("config_xxx") and compatibility space ("exca_xxxx")
82 */
83 static inline u32 cb_readl(struct yenta_socket *socket, unsigned reg)
84 {
85 u32 val = readl(socket->base + reg);
86 debug("%04x %08x\n", socket, reg, val);
87 return val;
88 }
89
90 static inline void cb_writel(struct yenta_socket *socket, unsigned reg, u32 val)
91 {
92 debug("%04x %08x\n", socket, reg, val);
93 writel(val, socket->base + reg);
94 readl(socket->base + reg); /* avoid problems with PCI write posting */
95 }
96
97 static inline u8 config_readb(struct yenta_socket *socket, unsigned offset)
98 {
99 u8 val;
100 pci_read_config_byte(socket->dev, offset, &val);
101 debug("%04x %02x\n", socket, offset, val);
102 return val;
103 }
104
105 static inline u16 config_readw(struct yenta_socket *socket, unsigned offset)
106 {
107 u16 val;
108 pci_read_config_word(socket->dev, offset, &val);
109 debug("%04x %04x\n", socket, offset, val);
110 return val;
111 }
112
113 static inline u32 config_readl(struct yenta_socket *socket, unsigned offset)
114 {
115 u32 val;
116 pci_read_config_dword(socket->dev, offset, &val);
117 debug("%04x %08x\n", socket, offset, val);
118 return val;
119 }
120
121 static inline void config_writeb(struct yenta_socket *socket, unsigned offset, u8 val)
122 {
123 debug("%04x %02x\n", socket, offset, val);
124 pci_write_config_byte(socket->dev, offset, val);
125 }
126
127 static inline void config_writew(struct yenta_socket *socket, unsigned offset, u16 val)
128 {
129 debug("%04x %04x\n", socket, offset, val);
130 pci_write_config_word(socket->dev, offset, val);
131 }
132
133 static inline void config_writel(struct yenta_socket *socket, unsigned offset, u32 val)
134 {
135 debug("%04x %08x\n", socket, offset, val);
136 pci_write_config_dword(socket->dev, offset, val);
137 }
138
139 static inline u8 exca_readb(struct yenta_socket *socket, unsigned reg)
140 {
141 u8 val = readb(socket->base + 0x800 + reg);
142 debug("%04x %02x\n", socket, reg, val);
143 return val;
144 }
145
146 static inline u8 exca_readw(struct yenta_socket *socket, unsigned reg)
147 {
148 u16 val;
149 val = readb(socket->base + 0x800 + reg);
150 val |= readb(socket->base + 0x800 + reg + 1) << 8;
151 debug("%04x %04x\n", socket, reg, val);
152 return val;
153 }
154
155 static inline void exca_writeb(struct yenta_socket *socket, unsigned reg, u8 val)
156 {
157 debug("%04x %02x\n", socket, reg, val);
158 writeb(val, socket->base + 0x800 + reg);
159 readb(socket->base + 0x800 + reg); /* PCI write posting... */
160 }
161
162 static void exca_writew(struct yenta_socket *socket, unsigned reg, u16 val)
163 {
164 debug("%04x %04x\n", socket, reg, val);
165 writeb(val, socket->base + 0x800 + reg);
166 writeb(val >> 8, socket->base + 0x800 + reg + 1);
167
168 /* PCI write posting... */
169 readb(socket->base + 0x800 + reg);
170 readb(socket->base + 0x800 + reg + 1);
171 }
172
173 static ssize_t show_yenta_registers(struct device *yentadev, struct device_attribute *attr, char *buf)
174 {
175 struct pci_dev *dev = to_pci_dev(yentadev);
176 struct yenta_socket *socket = pci_get_drvdata(dev);
177 int offset = 0, i;
178
179 offset = snprintf(buf, PAGE_SIZE, "CB registers:");
180 for (i = 0; i < 0x24; i += 4) {
181 unsigned val;
182 if (!(i & 15))
183 offset += snprintf(buf + offset, PAGE_SIZE - offset, "\n%02x:", i);
184 val = cb_readl(socket, i);
185 offset += snprintf(buf + offset, PAGE_SIZE - offset, " %08x", val);
186 }
187
188 offset += snprintf(buf + offset, PAGE_SIZE - offset, "\n\nExCA registers:");
189 for (i = 0; i < 0x45; i++) {
190 unsigned char val;
191 if (!(i & 7)) {
192 if (i & 8) {
193 memcpy(buf + offset, " -", 2);
194 offset += 2;
195 } else
196 offset += snprintf(buf + offset, PAGE_SIZE - offset, "\n%02x:", i);
197 }
198 val = exca_readb(socket, i);
199 offset += snprintf(buf + offset, PAGE_SIZE - offset, " %02x", val);
200 }
201 buf[offset++] = '\n';
202 return offset;
203 }
204
205 static DEVICE_ATTR(yenta_registers, S_IRUSR, show_yenta_registers, NULL);
206
207 /*
208 * Ugh, mixed-mode cardbus and 16-bit pccard state: things depend
209 * on what kind of card is inserted..
210 */
211 static int yenta_get_status(struct pcmcia_socket *sock, unsigned int *value)
212 {
213 struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
214 unsigned int val;
215 u32 state = cb_readl(socket, CB_SOCKET_STATE);
216
217 val = (state & CB_3VCARD) ? SS_3VCARD : 0;
218 val |= (state & CB_XVCARD) ? SS_XVCARD : 0;
219 val |= (state & (CB_5VCARD | CB_3VCARD | CB_XVCARD | CB_YVCARD)) ? 0 : SS_PENDING;
220 val |= (state & (CB_CDETECT1 | CB_CDETECT2)) ? SS_PENDING : 0;
221
222
223 if (state & CB_CBCARD) {
224 val |= SS_CARDBUS;
225 val |= (state & CB_CARDSTS) ? SS_STSCHG : 0;
226 val |= (state & (CB_CDETECT1 | CB_CDETECT2)) ? 0 : SS_DETECT;
227 val |= (state & CB_PWRCYCLE) ? SS_POWERON | SS_READY : 0;
228 } else if (state & CB_16BITCARD) {
229 u8 status = exca_readb(socket, I365_STATUS);
230 val |= ((status & I365_CS_DETECT) == I365_CS_DETECT) ? SS_DETECT : 0;
231 if (exca_readb(socket, I365_INTCTL) & I365_PC_IOCARD) {
232 val |= (status & I365_CS_STSCHG) ? 0 : SS_STSCHG;
233 } else {
234 val |= (status & I365_CS_BVD1) ? 0 : SS_BATDEAD;
235 val |= (status & I365_CS_BVD2) ? 0 : SS_BATWARN;
236 }
237 val |= (status & I365_CS_WRPROT) ? SS_WRPROT : 0;
238 val |= (status & I365_CS_READY) ? SS_READY : 0;
239 val |= (status & I365_CS_POWERON) ? SS_POWERON : 0;
240 }
241
242 *value = val;
243 return 0;
244 }
245
246 static void yenta_set_power(struct yenta_socket *socket, socket_state_t *state)
247 {
248 /* some birdges require to use the ExCA registers to power 16bit cards */
249 if (!(cb_readl(socket, CB_SOCKET_STATE) & CB_CBCARD) &&
250 (socket->flags & YENTA_16BIT_POWER_EXCA)) {
251 u8 reg, old;
252 reg = old = exca_readb(socket, I365_POWER);
253 reg &= ~(I365_VCC_MASK | I365_VPP1_MASK | I365_VPP2_MASK);
254
255 /* i82365SL-DF style */
256 if (socket->flags & YENTA_16BIT_POWER_DF) {
257 switch (state->Vcc) {
258 case 33:
259 reg |= I365_VCC_3V;
260 break;
261 case 50:
262 reg |= I365_VCC_5V;
263 break;
264 default:
265 reg = 0;
266 break;
267 }
268 switch (state->Vpp) {
269 case 33:
270 case 50:
271 reg |= I365_VPP1_5V;
272 break;
273 case 120:
274 reg |= I365_VPP1_12V;
275 break;
276 }
277 } else {
278 /* i82365SL-B style */
279 switch (state->Vcc) {
280 case 50:
281 reg |= I365_VCC_5V;
282 break;
283 default:
284 reg = 0;
285 break;
286 }
287 switch (state->Vpp) {
288 case 50:
289 reg |= I365_VPP1_5V | I365_VPP2_5V;
290 break;
291 case 120:
292 reg |= I365_VPP1_12V | I365_VPP2_12V;
293 break;
294 }
295 }
296
297 if (reg != old)
298 exca_writeb(socket, I365_POWER, reg);
299 } else {
300 u32 reg = 0; /* CB_SC_STPCLK? */
301 switch (state->Vcc) {
302 case 33:
303 reg = CB_SC_VCC_3V;
304 break;
305 case 50:
306 reg = CB_SC_VCC_5V;
307 break;
308 default:
309 reg = 0;
310 break;
311 }
312 switch (state->Vpp) {
313 case 33:
314 reg |= CB_SC_VPP_3V;
315 break;
316 case 50:
317 reg |= CB_SC_VPP_5V;
318 break;
319 case 120:
320 reg |= CB_SC_VPP_12V;
321 break;
322 }
323 if (reg != cb_readl(socket, CB_SOCKET_CONTROL))
324 cb_writel(socket, CB_SOCKET_CONTROL, reg);
325 }
326 }
327
328 static int yenta_set_socket(struct pcmcia_socket *sock, socket_state_t *state)
329 {
330 struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
331 u16 bridge;
332
333 /* if powering down: do it immediately */
334 if (state->Vcc == 0)
335 yenta_set_power(socket, state);
336
337 socket->io_irq = state->io_irq;
338 bridge = config_readw(socket, CB_BRIDGE_CONTROL) & ~(CB_BRIDGE_CRST | CB_BRIDGE_INTR);
339 if (cb_readl(socket, CB_SOCKET_STATE) & CB_CBCARD) {
340 u8 intr;
341 bridge |= (state->flags & SS_RESET) ? CB_BRIDGE_CRST : 0;
342
343 /* ISA interrupt control? */
344 intr = exca_readb(socket, I365_INTCTL);
345 intr = (intr & ~0xf);
346 if (!socket->dev->irq) {
347 intr |= socket->cb_irq ? socket->cb_irq : state->io_irq;
348 bridge |= CB_BRIDGE_INTR;
349 }
350 exca_writeb(socket, I365_INTCTL, intr);
351 } else {
352 u8 reg;
353
354 reg = exca_readb(socket, I365_INTCTL) & (I365_RING_ENA | I365_INTR_ENA);
355 reg |= (state->flags & SS_RESET) ? 0 : I365_PC_RESET;
356 reg |= (state->flags & SS_IOCARD) ? I365_PC_IOCARD : 0;
357 if (state->io_irq != socket->dev->irq) {
358 reg |= state->io_irq;
359 bridge |= CB_BRIDGE_INTR;
360 }
361 exca_writeb(socket, I365_INTCTL, reg);
362
363 reg = exca_readb(socket, I365_POWER) & (I365_VCC_MASK|I365_VPP1_MASK);
364 reg |= I365_PWR_NORESET;
365 if (state->flags & SS_PWR_AUTO)
366 reg |= I365_PWR_AUTO;
367 if (state->flags & SS_OUTPUT_ENA)
368 reg |= I365_PWR_OUT;
369 if (exca_readb(socket, I365_POWER) != reg)
370 exca_writeb(socket, I365_POWER, reg);
371
372 /* CSC interrupt: no ISA irq for CSC */
373 reg = exca_readb(socket, I365_CSCINT);
374 reg &= I365_CSC_IRQ_MASK;
375 reg |= I365_CSC_DETECT;
376 if (state->flags & SS_IOCARD) {
377 if (state->csc_mask & SS_STSCHG)
378 reg |= I365_CSC_STSCHG;
379 } else {
380 if (state->csc_mask & SS_BATDEAD)
381 reg |= I365_CSC_BVD1;
382 if (state->csc_mask & SS_BATWARN)
383 reg |= I365_CSC_BVD2;
384 if (state->csc_mask & SS_READY)
385 reg |= I365_CSC_READY;
386 }
387 exca_writeb(socket, I365_CSCINT, reg);
388 exca_readb(socket, I365_CSC);
389 if (sock->zoom_video)
390 sock->zoom_video(sock, state->flags & SS_ZVCARD);
391 }
392 config_writew(socket, CB_BRIDGE_CONTROL, bridge);
393 /* Socket event mask: get card insert/remove events.. */
394 cb_writel(socket, CB_SOCKET_EVENT, -1);
395 cb_writel(socket, CB_SOCKET_MASK, CB_CDMASK);
396
397 /* if powering up: do it as the last step when the socket is configured */
398 if (state->Vcc != 0)
399 yenta_set_power(socket, state);
400 return 0;
401 }
402
403 static int yenta_set_io_map(struct pcmcia_socket *sock, struct pccard_io_map *io)
404 {
405 struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
406 int map;
407 unsigned char ioctl, addr, enable;
408
409 map = io->map;
410
411 if (map > 1)
412 return -EINVAL;
413
414 enable = I365_ENA_IO(map);
415 addr = exca_readb(socket, I365_ADDRWIN);
416
417 /* Disable the window before changing it.. */
418 if (addr & enable) {
419 addr &= ~enable;
420 exca_writeb(socket, I365_ADDRWIN, addr);
421 }
422
423 exca_writew(socket, I365_IO(map)+I365_W_START, io->start);
424 exca_writew(socket, I365_IO(map)+I365_W_STOP, io->stop);
425
426 ioctl = exca_readb(socket, I365_IOCTL) & ~I365_IOCTL_MASK(map);
427 if (io->flags & MAP_0WS)
428 ioctl |= I365_IOCTL_0WS(map);
429 if (io->flags & MAP_16BIT)
430 ioctl |= I365_IOCTL_16BIT(map);
431 if (io->flags & MAP_AUTOSZ)
432 ioctl |= I365_IOCTL_IOCS16(map);
433 exca_writeb(socket, I365_IOCTL, ioctl);
434
435 if (io->flags & MAP_ACTIVE)
436 exca_writeb(socket, I365_ADDRWIN, addr | enable);
437 return 0;
438 }
439
440 static int yenta_set_mem_map(struct pcmcia_socket *sock, struct pccard_mem_map *mem)
441 {
442 struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
443 struct pci_bus_region region;
444 int map;
445 unsigned char addr, enable;
446 unsigned int start, stop, card_start;
447 unsigned short word;
448
449 pcibios_resource_to_bus(socket->dev, &region, mem->res);
450
451 map = mem->map;
452 start = region.start;
453 stop = region.end;
454 card_start = mem->card_start;
455
456 if (map > 4 || start > stop || ((start ^ stop) >> 24) ||
457 (card_start >> 26) || mem->speed > 1000)
458 return -EINVAL;
459
460 enable = I365_ENA_MEM(map);
461 addr = exca_readb(socket, I365_ADDRWIN);
462 if (addr & enable) {
463 addr &= ~enable;
464 exca_writeb(socket, I365_ADDRWIN, addr);
465 }
466
467 exca_writeb(socket, CB_MEM_PAGE(map), start >> 24);
468
469 word = (start >> 12) & 0x0fff;
470 if (mem->flags & MAP_16BIT)
471 word |= I365_MEM_16BIT;
472 if (mem->flags & MAP_0WS)
473 word |= I365_MEM_0WS;
474 exca_writew(socket, I365_MEM(map) + I365_W_START, word);
475
476 word = (stop >> 12) & 0x0fff;
477 switch (to_cycles(mem->speed)) {
478 case 0:
479 break;
480 case 1:
481 word |= I365_MEM_WS0;
482 break;
483 case 2:
484 word |= I365_MEM_WS1;
485 break;
486 default:
487 word |= I365_MEM_WS1 | I365_MEM_WS0;
488 break;
489 }
490 exca_writew(socket, I365_MEM(map) + I365_W_STOP, word);
491
492 word = ((card_start - start) >> 12) & 0x3fff;
493 if (mem->flags & MAP_WRPROT)
494 word |= I365_MEM_WRPROT;
495 if (mem->flags & MAP_ATTRIB)
496 word |= I365_MEM_REG;
497 exca_writew(socket, I365_MEM(map) + I365_W_OFF, word);
498
499 if (mem->flags & MAP_ACTIVE)
500 exca_writeb(socket, I365_ADDRWIN, addr | enable);
501 return 0;
502 }
503
504
505
506 static irqreturn_t yenta_interrupt(int irq, void *dev_id)
507 {
508 unsigned int events;
509 struct yenta_socket *socket = (struct yenta_socket *) dev_id;
510 u8 csc;
511 u32 cb_event;
512
513 /* Clear interrupt status for the event */
514 cb_event = cb_readl(socket, CB_SOCKET_EVENT);
515 cb_writel(socket, CB_SOCKET_EVENT, cb_event);
516
517 csc = exca_readb(socket, I365_CSC);
518
519 if (!(cb_event || csc))
520 return IRQ_NONE;
521
522 events = (cb_event & (CB_CD1EVENT | CB_CD2EVENT)) ? SS_DETECT : 0 ;
523 events |= (csc & I365_CSC_DETECT) ? SS_DETECT : 0;
524 if (exca_readb(socket, I365_INTCTL) & I365_PC_IOCARD) {
525 events |= (csc & I365_CSC_STSCHG) ? SS_STSCHG : 0;
526 } else {
527 events |= (csc & I365_CSC_BVD1) ? SS_BATDEAD : 0;
528 events |= (csc & I365_CSC_BVD2) ? SS_BATWARN : 0;
529 events |= (csc & I365_CSC_READY) ? SS_READY : 0;
530 }
531
532 if (events)
533 pcmcia_parse_events(&socket->socket, events);
534
535 return IRQ_HANDLED;
536 }
537
538 static void yenta_interrupt_wrapper(unsigned long data)
539 {
540 struct yenta_socket *socket = (struct yenta_socket *) data;
541
542 yenta_interrupt(0, (void *)socket);
543 socket->poll_timer.expires = jiffies + HZ;
544 add_timer(&socket->poll_timer);
545 }
546
547 static void yenta_clear_maps(struct yenta_socket *socket)
548 {
549 int i;
550 struct resource res = { .start = 0, .end = 0x0fff };
551 pccard_io_map io = { 0, 0, 0, 0, 1 };
552 pccard_mem_map mem = { .res = &res, };
553
554 yenta_set_socket(&socket->socket, &dead_socket);
555 for (i = 0; i < 2; i++) {
556 io.map = i;
557 yenta_set_io_map(&socket->socket, &io);
558 }
559 for (i = 0; i < 5; i++) {
560 mem.map = i;
561 yenta_set_mem_map(&socket->socket, &mem);
562 }
563 }
564
565 /* redoes voltage interrogation if required */
566 static void yenta_interrogate(struct yenta_socket *socket)
567 {
568 u32 state;
569
570 state = cb_readl(socket, CB_SOCKET_STATE);
571 if (!(state & (CB_5VCARD | CB_3VCARD | CB_XVCARD | CB_YVCARD)) ||
572 (state & (CB_CDETECT1 | CB_CDETECT2 | CB_NOTACARD | CB_BADVCCREQ)) ||
573 ((state & (CB_16BITCARD | CB_CBCARD)) == (CB_16BITCARD | CB_CBCARD)))
574 cb_writel(socket, CB_SOCKET_FORCE, CB_CVSTEST);
575 }
576
577 /* Called at resume and initialization events */
578 static int yenta_sock_init(struct pcmcia_socket *sock)
579 {
580 struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
581
582 exca_writeb(socket, I365_GBLCTL, 0x00);
583 exca_writeb(socket, I365_GENCTL, 0x00);
584
585 /* Redo card voltage interrogation */
586 yenta_interrogate(socket);
587
588 yenta_clear_maps(socket);
589
590 if (socket->type && socket->type->sock_init)
591 socket->type->sock_init(socket);
592
593 /* Re-enable CSC interrupts */
594 cb_writel(socket, CB_SOCKET_MASK, CB_CDMASK);
595
596 return 0;
597 }
598
599 static int yenta_sock_suspend(struct pcmcia_socket *sock)
600 {
601 struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
602
603 /* Disable CSC interrupts */
604 cb_writel(socket, CB_SOCKET_MASK, 0x0);
605
606 return 0;
607 }
608
609 /*
610 * Use an adaptive allocation for the memory resource,
611 * sometimes the memory behind pci bridges is limited:
612 * 1/8 of the size of the io window of the parent.
613 * max 4 MB, min 16 kB. We try very hard to not get below
614 * the "ACC" values, though.
615 */
616 #define BRIDGE_MEM_MAX (4*1024*1024)
617 #define BRIDGE_MEM_ACC (128*1024)
618 #define BRIDGE_MEM_MIN (16*1024)
619
620 #define BRIDGE_IO_MAX 512
621 #define BRIDGE_IO_ACC 256
622 #define BRIDGE_IO_MIN 32
623
624 #ifndef PCIBIOS_MIN_CARDBUS_IO
625 #define PCIBIOS_MIN_CARDBUS_IO PCIBIOS_MIN_IO
626 #endif
627
628 static int yenta_search_one_res(struct resource *root, struct resource *res,
629 u32 min)
630 {
631 u32 align, size, start, end;
632
633 if (res->flags & IORESOURCE_IO) {
634 align = 1024;
635 size = BRIDGE_IO_MAX;
636 start = PCIBIOS_MIN_CARDBUS_IO;
637 end = ~0U;
638 } else {
639 unsigned long avail = root->end - root->start;
640 int i;
641 size = BRIDGE_MEM_MAX;
642 if (size > avail/8) {
643 size = (avail+1)/8;
644 /* round size down to next power of 2 */
645 i = 0;
646 while ((size /= 2) != 0)
647 i++;
648 size = 1 << i;
649 }
650 if (size < min)
651 size = min;
652 align = size;
653 start = PCIBIOS_MIN_MEM;
654 end = ~0U;
655 }
656
657 do {
658 if (allocate_resource(root, res, size, start, end, align,
659 NULL, NULL) == 0) {
660 return 1;
661 }
662 size = size/2;
663 align = size;
664 } while (size >= min);
665
666 return 0;
667 }
668
669
670 static int yenta_search_res(struct yenta_socket *socket, struct resource *res,
671 u32 min)
672 {
673 struct resource *root;
674 int i;
675
676 pci_bus_for_each_resource(socket->dev->bus, root, i) {
677 if (!root)
678 continue;
679
680 if ((res->flags ^ root->flags) &
681 (IORESOURCE_IO | IORESOURCE_MEM | IORESOURCE_PREFETCH))
682 continue; /* Wrong type */
683
684 if (yenta_search_one_res(root, res, min))
685 return 1;
686 }
687 return 0;
688 }
689
690 static int yenta_allocate_res(struct yenta_socket *socket, int nr, unsigned type, int addr_start, int addr_end)
691 {
692 struct pci_dev *dev = socket->dev;
693 struct resource *res;
694 struct pci_bus_region region;
695 unsigned mask;
696
697 res = dev->resource + PCI_BRIDGE_RESOURCES + nr;
698 /* Already allocated? */
699 if (res->parent)
700 return 0;
701
702 /* The granularity of the memory limit is 4kB, on IO it's 4 bytes */
703 mask = ~0xfff;
704 if (type & IORESOURCE_IO)
705 mask = ~3;
706
707 res->name = dev->subordinate->name;
708 res->flags = type;
709
710 region.start = config_readl(socket, addr_start) & mask;
711 region.end = config_readl(socket, addr_end) | ~mask;
712 if (region.start && region.end > region.start && !override_bios) {
713 pcibios_bus_to_resource(dev, res, &region);
714 if (pci_claim_resource(dev, PCI_BRIDGE_RESOURCES + nr) == 0)
715 return 0;
716 dev_printk(KERN_INFO, &dev->dev,
717 "Preassigned resource %d busy or not available, "
718 "reconfiguring...\n",
719 nr);
720 }
721
722 if (type & IORESOURCE_IO) {
723 if ((yenta_search_res(socket, res, BRIDGE_IO_MAX)) ||
724 (yenta_search_res(socket, res, BRIDGE_IO_ACC)) ||
725 (yenta_search_res(socket, res, BRIDGE_IO_MIN)))
726 return 1;
727 } else {
728 if (type & IORESOURCE_PREFETCH) {
729 if ((yenta_search_res(socket, res, BRIDGE_MEM_MAX)) ||
730 (yenta_search_res(socket, res, BRIDGE_MEM_ACC)) ||
731 (yenta_search_res(socket, res, BRIDGE_MEM_MIN)))
732 return 1;
733 /* Approximating prefetchable by non-prefetchable */
734 res->flags = IORESOURCE_MEM;
735 }
736 if ((yenta_search_res(socket, res, BRIDGE_MEM_MAX)) ||
737 (yenta_search_res(socket, res, BRIDGE_MEM_ACC)) ||
738 (yenta_search_res(socket, res, BRIDGE_MEM_MIN)))
739 return 1;
740 }
741
742 dev_printk(KERN_INFO, &dev->dev,
743 "no resource of type %x available, trying to continue...\n",
744 type);
745 res->start = res->end = res->flags = 0;
746 return 0;
747 }
748
749 /*
750 * Allocate the bridge mappings for the device..
751 */
752 static void yenta_allocate_resources(struct yenta_socket *socket)
753 {
754 int program = 0;
755 program += yenta_allocate_res(socket, 0, IORESOURCE_IO,
756 PCI_CB_IO_BASE_0, PCI_CB_IO_LIMIT_0);
757 program += yenta_allocate_res(socket, 1, IORESOURCE_IO,
758 PCI_CB_IO_BASE_1, PCI_CB_IO_LIMIT_1);
759 program += yenta_allocate_res(socket, 2, IORESOURCE_MEM|IORESOURCE_PREFETCH,
760 PCI_CB_MEMORY_BASE_0, PCI_CB_MEMORY_LIMIT_0);
761 program += yenta_allocate_res(socket, 3, IORESOURCE_MEM,
762 PCI_CB_MEMORY_BASE_1, PCI_CB_MEMORY_LIMIT_1);
763 if (program)
764 pci_setup_cardbus(socket->dev->subordinate);
765 }
766
767
768 /*
769 * Free the bridge mappings for the device..
770 */
771 static void yenta_free_resources(struct yenta_socket *socket)
772 {
773 int i;
774 for (i = 0; i < 4; i++) {
775 struct resource *res;
776 res = socket->dev->resource + PCI_BRIDGE_RESOURCES + i;
777 if (res->start != 0 && res->end != 0)
778 release_resource(res);
779 res->start = res->end = res->flags = 0;
780 }
781 }
782
783
784 /*
785 * Close it down - release our resources and go home..
786 */
787 static void __devexit yenta_close(struct pci_dev *dev)
788 {
789 struct yenta_socket *sock = pci_get_drvdata(dev);
790
791 /* Remove the register attributes */
792 device_remove_file(&dev->dev, &dev_attr_yenta_registers);
793
794 /* we don't want a dying socket registered */
795 pcmcia_unregister_socket(&sock->socket);
796
797 /* Disable all events so we don't die in an IRQ storm */
798 cb_writel(sock, CB_SOCKET_MASK, 0x0);
799 exca_writeb(sock, I365_CSCINT, 0);
800
801 if (sock->cb_irq)
802 free_irq(sock->cb_irq, sock);
803 else
804 del_timer_sync(&sock->poll_timer);
805
806 if (sock->base)
807 iounmap(sock->base);
808 yenta_free_resources(sock);
809
810 pci_release_regions(dev);
811 pci_disable_device(dev);
812 pci_set_drvdata(dev, NULL);
813 }
814
815
816 static struct pccard_operations yenta_socket_operations = {
817 .init = yenta_sock_init,
818 .suspend = yenta_sock_suspend,
819 .get_status = yenta_get_status,
820 .set_socket = yenta_set_socket,
821 .set_io_map = yenta_set_io_map,
822 .set_mem_map = yenta_set_mem_map,
823 };
824
825
826 #ifdef CONFIG_YENTA_TI
827 #include "ti113x.h"
828 #endif
829 #ifdef CONFIG_YENTA_RICOH
830 #include "ricoh.h"
831 #endif
832 #ifdef CONFIG_YENTA_TOSHIBA
833 #include "topic.h"
834 #endif
835 #ifdef CONFIG_YENTA_O2
836 #include "o2micro.h"
837 #endif
838
839 enum {
840 CARDBUS_TYPE_DEFAULT = -1,
841 CARDBUS_TYPE_TI,
842 CARDBUS_TYPE_TI113X,
843 CARDBUS_TYPE_TI12XX,
844 CARDBUS_TYPE_TI1250,
845 CARDBUS_TYPE_RICOH,
846 CARDBUS_TYPE_TOPIC95,
847 CARDBUS_TYPE_TOPIC97,
848 CARDBUS_TYPE_O2MICRO,
849 CARDBUS_TYPE_ENE,
850 };
851
852 /*
853 * Different cardbus controllers have slightly different
854 * initialization sequences etc details. List them here..
855 */
856 static struct cardbus_type cardbus_type[] = {
857 #ifdef CONFIG_YENTA_TI
858 [CARDBUS_TYPE_TI] = {
859 .override = ti_override,
860 .save_state = ti_save_state,
861 .restore_state = ti_restore_state,
862 .sock_init = ti_init,
863 },
864 [CARDBUS_TYPE_TI113X] = {
865 .override = ti113x_override,
866 .save_state = ti_save_state,
867 .restore_state = ti_restore_state,
868 .sock_init = ti_init,
869 },
870 [CARDBUS_TYPE_TI12XX] = {
871 .override = ti12xx_override,
872 .save_state = ti_save_state,
873 .restore_state = ti_restore_state,
874 .sock_init = ti_init,
875 },
876 [CARDBUS_TYPE_TI1250] = {
877 .override = ti1250_override,
878 .save_state = ti_save_state,
879 .restore_state = ti_restore_state,
880 .sock_init = ti_init,
881 },
882 [CARDBUS_TYPE_ENE] = {
883 .override = ene_override,
884 .save_state = ti_save_state,
885 .restore_state = ti_restore_state,
886 .sock_init = ti_init,
887 },
888 #endif
889 #ifdef CONFIG_YENTA_RICOH
890 [CARDBUS_TYPE_RICOH] = {
891 .override = ricoh_override,
892 .save_state = ricoh_save_state,
893 .restore_state = ricoh_restore_state,
894 },
895 #endif
896 #ifdef CONFIG_YENTA_TOSHIBA
897 [CARDBUS_TYPE_TOPIC95] = {
898 .override = topic95_override,
899 },
900 [CARDBUS_TYPE_TOPIC97] = {
901 .override = topic97_override,
902 },
903 #endif
904 #ifdef CONFIG_YENTA_O2
905 [CARDBUS_TYPE_O2MICRO] = {
906 .override = o2micro_override,
907 .restore_state = o2micro_restore_state,
908 },
909 #endif
910 };
911
912
913 static unsigned int yenta_probe_irq(struct yenta_socket *socket, u32 isa_irq_mask)
914 {
915 int i;
916 unsigned long val;
917 u32 mask;
918 u8 reg;
919
920 /*
921 * Probe for usable interrupts using the force
922 * register to generate bogus card status events.
923 */
924 cb_writel(socket, CB_SOCKET_EVENT, -1);
925 cb_writel(socket, CB_SOCKET_MASK, CB_CSTSMASK);
926 reg = exca_readb(socket, I365_CSCINT);
927 exca_writeb(socket, I365_CSCINT, 0);
928 val = probe_irq_on() & isa_irq_mask;
929 for (i = 1; i < 16; i++) {
930 if (!((val >> i) & 1))
931 continue;
932 exca_writeb(socket, I365_CSCINT, I365_CSC_STSCHG | (i << 4));
933 cb_writel(socket, CB_SOCKET_FORCE, CB_FCARDSTS);
934 udelay(100);
935 cb_writel(socket, CB_SOCKET_EVENT, -1);
936 }
937 cb_writel(socket, CB_SOCKET_MASK, 0);
938 exca_writeb(socket, I365_CSCINT, reg);
939
940 mask = probe_irq_mask(val) & 0xffff;
941
942 return mask;
943 }
944
945
946 /*
947 * yenta PCI irq probing.
948 * currently only used in the TI/EnE initialization code
949 */
950 #ifdef CONFIG_YENTA_TI
951
952 /* interrupt handler, only used during probing */
953 static irqreturn_t yenta_probe_handler(int irq, void *dev_id)
954 {
955 struct yenta_socket *socket = (struct yenta_socket *) dev_id;
956 u8 csc;
957 u32 cb_event;
958
959 /* Clear interrupt status for the event */
960 cb_event = cb_readl(socket, CB_SOCKET_EVENT);
961 cb_writel(socket, CB_SOCKET_EVENT, -1);
962 csc = exca_readb(socket, I365_CSC);
963
964 if (cb_event || csc) {
965 socket->probe_status = 1;
966 return IRQ_HANDLED;
967 }
968
969 return IRQ_NONE;
970 }
971
972 /* probes the PCI interrupt, use only on override functions */
973 static int yenta_probe_cb_irq(struct yenta_socket *socket)
974 {
975 u8 reg = 0;
976
977 if (!socket->cb_irq)
978 return -1;
979
980 socket->probe_status = 0;
981
982 if (request_irq(socket->cb_irq, yenta_probe_handler, IRQF_SHARED, "yenta", socket)) {
983 dev_printk(KERN_WARNING, &socket->dev->dev,
984 "request_irq() in yenta_probe_cb_irq() failed!\n");
985 return -1;
986 }
987
988 /* generate interrupt, wait */
989 if (!socket->dev->irq)
990 reg = exca_readb(socket, I365_CSCINT);
991 exca_writeb(socket, I365_CSCINT, reg | I365_CSC_STSCHG);
992 cb_writel(socket, CB_SOCKET_EVENT, -1);
993 cb_writel(socket, CB_SOCKET_MASK, CB_CSTSMASK);
994 cb_writel(socket, CB_SOCKET_FORCE, CB_FCARDSTS);
995
996 msleep(100);
997
998 /* disable interrupts */
999 cb_writel(socket, CB_SOCKET_MASK, 0);
1000 exca_writeb(socket, I365_CSCINT, reg);
1001 cb_writel(socket, CB_SOCKET_EVENT, -1);
1002 exca_readb(socket, I365_CSC);
1003
1004 free_irq(socket->cb_irq, socket);
1005
1006 return (int) socket->probe_status;
1007 }
1008
1009 #endif /* CONFIG_YENTA_TI */
1010
1011
1012 /*
1013 * Set static data that doesn't need re-initializing..
1014 */
1015 static void yenta_get_socket_capabilities(struct yenta_socket *socket, u32 isa_irq_mask)
1016 {
1017 socket->socket.pci_irq = socket->cb_irq;
1018 if (isa_probe)
1019 socket->socket.irq_mask = yenta_probe_irq(socket, isa_irq_mask);
1020 else
1021 socket->socket.irq_mask = 0;
1022
1023 dev_printk(KERN_INFO, &socket->dev->dev,
1024 "ISA IRQ mask 0x%04x, PCI irq %d\n",
1025 socket->socket.irq_mask, socket->cb_irq);
1026 }
1027
1028 /*
1029 * Initialize the standard cardbus registers
1030 */
1031 static void yenta_config_init(struct yenta_socket *socket)
1032 {
1033 u16 bridge;
1034 struct pci_dev *dev = socket->dev;
1035 struct pci_bus_region region;
1036
1037 pcibios_resource_to_bus(socket->dev, &region, &dev->resource[0]);
1038
1039 config_writel(socket, CB_LEGACY_MODE_BASE, 0);
1040 config_writel(socket, PCI_BASE_ADDRESS_0, region.start);
1041 config_writew(socket, PCI_COMMAND,
1042 PCI_COMMAND_IO |
1043 PCI_COMMAND_MEMORY |
1044 PCI_COMMAND_MASTER |
1045 PCI_COMMAND_WAIT);
1046
1047 config_writeb(socket, PCI_CACHE_LINE_SIZE, L1_CACHE_BYTES / 4);
1048 config_writeb(socket, PCI_LATENCY_TIMER, 168);
1049 config_writel(socket, PCI_PRIMARY_BUS,
1050 (176 << 24) | /* sec. latency timer */
1051 (dev->subordinate->subordinate << 16) | /* subordinate bus */
1052 (dev->subordinate->secondary << 8) | /* secondary bus */
1053 dev->subordinate->primary); /* primary bus */
1054
1055 /*
1056 * Set up the bridging state:
1057 * - enable write posting.
1058 * - memory window 0 prefetchable, window 1 non-prefetchable
1059 * - PCI interrupts enabled if a PCI interrupt exists..
1060 */
1061 bridge = config_readw(socket, CB_BRIDGE_CONTROL);
1062 bridge &= ~(CB_BRIDGE_CRST | CB_BRIDGE_PREFETCH1 | CB_BRIDGE_ISAEN | CB_BRIDGE_VGAEN);
1063 bridge |= CB_BRIDGE_PREFETCH0 | CB_BRIDGE_POSTEN;
1064 config_writew(socket, CB_BRIDGE_CONTROL, bridge);
1065 }
1066
1067 /**
1068 * yenta_fixup_parent_bridge - Fix subordinate bus# of the parent bridge
1069 * @cardbus_bridge: The PCI bus which the CardBus bridge bridges to
1070 *
1071 * Checks if devices on the bus which the CardBus bridge bridges to would be
1072 * invisible during PCI scans because of a misconfigured subordinate number
1073 * of the parent brige - some BIOSes seem to be too lazy to set it right.
1074 * Does the fixup carefully by checking how far it can go without conflicts.
1075 * See http\://bugzilla.kernel.org/show_bug.cgi?id=2944 for more information.
1076 */
1077 static void yenta_fixup_parent_bridge(struct pci_bus *cardbus_bridge)
1078 {
1079 struct list_head *tmp;
1080 unsigned char upper_limit;
1081 /*
1082 * We only check and fix the parent bridge: All systems which need
1083 * this fixup that have been reviewed are laptops and the only bridge
1084 * which needed fixing was the parent bridge of the CardBus bridge:
1085 */
1086 struct pci_bus *bridge_to_fix = cardbus_bridge->parent;
1087
1088 /* Check bus numbers are already set up correctly: */
1089 if (bridge_to_fix->subordinate >= cardbus_bridge->subordinate)
1090 return; /* The subordinate number is ok, nothing to do */
1091
1092 if (!bridge_to_fix->parent)
1093 return; /* Root bridges are ok */
1094
1095 /* stay within the limits of the bus range of the parent: */
1096 upper_limit = bridge_to_fix->parent->subordinate;
1097
1098 /* check the bus ranges of all silbling bridges to prevent overlap */
1099 list_for_each(tmp, &bridge_to_fix->parent->children) {
1100 struct pci_bus *silbling = pci_bus_b(tmp);
1101 /*
1102 * If the silbling has a higher secondary bus number
1103 * and it's secondary is equal or smaller than our
1104 * current upper limit, set the new upper limit to
1105 * the bus number below the silbling's range:
1106 */
1107 if (silbling->secondary > bridge_to_fix->subordinate
1108 && silbling->secondary <= upper_limit)
1109 upper_limit = silbling->secondary - 1;
1110 }
1111
1112 /* Show that the wanted subordinate number is not possible: */
1113 if (cardbus_bridge->subordinate > upper_limit)
1114 dev_printk(KERN_WARNING, &cardbus_bridge->dev,
1115 "Upper limit for fixing this "
1116 "bridge's parent bridge: #%02x\n", upper_limit);
1117
1118 /* If we have room to increase the bridge's subordinate number, */
1119 if (bridge_to_fix->subordinate < upper_limit) {
1120
1121 /* use the highest number of the hidden bus, within limits */
1122 unsigned char subordinate_to_assign =
1123 min(cardbus_bridge->subordinate, upper_limit);
1124
1125 dev_printk(KERN_INFO, &bridge_to_fix->dev,
1126 "Raising subordinate bus# of parent "
1127 "bus (#%02x) from #%02x to #%02x\n",
1128 bridge_to_fix->number,
1129 bridge_to_fix->subordinate, subordinate_to_assign);
1130
1131 /* Save the new subordinate in the bus struct of the bridge */
1132 bridge_to_fix->subordinate = subordinate_to_assign;
1133
1134 /* and update the PCI config space with the new subordinate */
1135 pci_write_config_byte(bridge_to_fix->self,
1136 PCI_SUBORDINATE_BUS, bridge_to_fix->subordinate);
1137 }
1138 }
1139
1140 /*
1141 * Initialize a cardbus controller. Make sure we have a usable
1142 * interrupt, and that we can map the cardbus area. Fill in the
1143 * socket information structure..
1144 */
1145 static int __devinit yenta_probe(struct pci_dev *dev, const struct pci_device_id *id)
1146 {
1147 struct yenta_socket *socket;
1148 int ret;
1149
1150 /*
1151 * If we failed to assign proper bus numbers for this cardbus
1152 * controller during PCI probe, its subordinate pci_bus is NULL.
1153 * Bail out if so.
1154 */
1155 if (!dev->subordinate) {
1156 dev_printk(KERN_ERR, &dev->dev, "no bus associated! "
1157 "(try 'pci=assign-busses')\n");
1158 return -ENODEV;
1159 }
1160
1161 socket = kzalloc(sizeof(struct yenta_socket), GFP_KERNEL);
1162 if (!socket)
1163 return -ENOMEM;
1164
1165 /* prepare pcmcia_socket */
1166 socket->socket.ops = &yenta_socket_operations;
1167 socket->socket.resource_ops = &pccard_nonstatic_ops;
1168 socket->socket.dev.parent = &dev->dev;
1169 socket->socket.driver_data = socket;
1170 socket->socket.owner = THIS_MODULE;
1171 socket->socket.features = SS_CAP_PAGE_REGS | SS_CAP_PCCARD;
1172 socket->socket.map_size = 0x1000;
1173 socket->socket.cb_dev = dev;
1174
1175 /* prepare struct yenta_socket */
1176 socket->dev = dev;
1177 pci_set_drvdata(dev, socket);
1178
1179 /*
1180 * Do some basic sanity checking..
1181 */
1182 if (pci_enable_device(dev)) {
1183 ret = -EBUSY;
1184 goto free;
1185 }
1186
1187 ret = pci_request_regions(dev, "yenta_socket");
1188 if (ret)
1189 goto disable;
1190
1191 if (!pci_resource_start(dev, 0)) {
1192 dev_printk(KERN_ERR, &dev->dev, "No cardbus resource!\n");
1193 ret = -ENODEV;
1194 goto release;
1195 }
1196
1197 /*
1198 * Ok, start setup.. Map the cardbus registers,
1199 * and request the IRQ.
1200 */
1201 socket->base = ioremap(pci_resource_start(dev, 0), 0x1000);
1202 if (!socket->base) {
1203 ret = -ENOMEM;
1204 goto release;
1205 }
1206
1207 /*
1208 * report the subsystem vendor and device for help debugging
1209 * the irq stuff...
1210 */
1211 dev_printk(KERN_INFO, &dev->dev, "CardBus bridge found [%04x:%04x]\n",
1212 dev->subsystem_vendor, dev->subsystem_device);
1213
1214 yenta_config_init(socket);
1215
1216 /* Disable all events */
1217 cb_writel(socket, CB_SOCKET_MASK, 0x0);
1218
1219 /* Set up the bridge regions.. */
1220 yenta_allocate_resources(socket);
1221
1222 socket->cb_irq = dev->irq;
1223
1224 /* Do we have special options for the device? */
1225 if (id->driver_data != CARDBUS_TYPE_DEFAULT &&
1226 id->driver_data < ARRAY_SIZE(cardbus_type)) {
1227 socket->type = &cardbus_type[id->driver_data];
1228
1229 ret = socket->type->override(socket);
1230 if (ret < 0)
1231 goto unmap;
1232 }
1233
1234 /* We must finish initialization here */
1235
1236 if (!socket->cb_irq || request_irq(socket->cb_irq, yenta_interrupt, IRQF_SHARED, "yenta", socket)) {
1237 /* No IRQ or request_irq failed. Poll */
1238 socket->cb_irq = 0; /* But zero is a valid IRQ number. */
1239 init_timer(&socket->poll_timer);
1240 socket->poll_timer.function = yenta_interrupt_wrapper;
1241 socket->poll_timer.data = (unsigned long)socket;
1242 socket->poll_timer.expires = jiffies + HZ;
1243 add_timer(&socket->poll_timer);
1244 dev_printk(KERN_INFO, &dev->dev,
1245 "no PCI IRQ, CardBus support disabled for this "
1246 "socket.\n");
1247 dev_printk(KERN_INFO, &dev->dev,
1248 "check your BIOS CardBus, BIOS IRQ or ACPI "
1249 "settings.\n");
1250 } else {
1251 socket->socket.features |= SS_CAP_CARDBUS;
1252 }
1253
1254 /* Figure out what the dang thing can do for the PCMCIA layer... */
1255 yenta_interrogate(socket);
1256 yenta_get_socket_capabilities(socket, isa_interrupts);
1257 dev_printk(KERN_INFO, &dev->dev,
1258 "Socket status: %08x\n", cb_readl(socket, CB_SOCKET_STATE));
1259
1260 yenta_fixup_parent_bridge(dev->subordinate);
1261
1262 /* Register it with the pcmcia layer.. */
1263 ret = pcmcia_register_socket(&socket->socket);
1264 if (ret == 0) {
1265 /* Add the yenta register attributes */
1266 ret = device_create_file(&dev->dev, &dev_attr_yenta_registers);
1267 if (ret == 0)
1268 goto out;
1269
1270 /* error path... */
1271 pcmcia_unregister_socket(&socket->socket);
1272 }
1273
1274 unmap:
1275 iounmap(socket->base);
1276 release:
1277 pci_release_regions(dev);
1278 disable:
1279 pci_disable_device(dev);
1280 free:
1281 kfree(socket);
1282 out:
1283 return ret;
1284 }
1285
1286 #ifdef CONFIG_PM
1287 static int yenta_dev_suspend_noirq(struct device *dev)
1288 {
1289 struct pci_dev *pdev = to_pci_dev(dev);
1290 struct yenta_socket *socket = pci_get_drvdata(pdev);
1291
1292 if (!socket)
1293 return 0;
1294
1295 if (socket->type && socket->type->save_state)
1296 socket->type->save_state(socket);
1297
1298 pci_save_state(pdev);
1299 pci_read_config_dword(pdev, 16*4, &socket->saved_state[0]);
1300 pci_read_config_dword(pdev, 17*4, &socket->saved_state[1]);
1301 pci_disable_device(pdev);
1302
1303 return 0;
1304 }
1305
1306 static int yenta_dev_resume_noirq(struct device *dev)
1307 {
1308 struct pci_dev *pdev = to_pci_dev(dev);
1309 struct yenta_socket *socket = pci_get_drvdata(pdev);
1310 int ret;
1311
1312 if (!socket)
1313 return 0;
1314
1315 pci_write_config_dword(pdev, 16*4, socket->saved_state[0]);
1316 pci_write_config_dword(pdev, 17*4, socket->saved_state[1]);
1317
1318 ret = pci_enable_device(pdev);
1319 if (ret)
1320 return ret;
1321
1322 pci_set_master(pdev);
1323
1324 if (socket->type && socket->type->restore_state)
1325 socket->type->restore_state(socket);
1326
1327 return 0;
1328 }
1329
1330 static const struct dev_pm_ops yenta_pm_ops = {
1331 .suspend_noirq = yenta_dev_suspend_noirq,
1332 .resume_noirq = yenta_dev_resume_noirq,
1333 .freeze_noirq = yenta_dev_suspend_noirq,
1334 .thaw_noirq = yenta_dev_resume_noirq,
1335 .poweroff_noirq = yenta_dev_suspend_noirq,
1336 .restore_noirq = yenta_dev_resume_noirq,
1337 };
1338
1339 #define YENTA_PM_OPS (&yenta_pm_ops)
1340 #else
1341 #define YENTA_PM_OPS NULL
1342 #endif
1343
1344 #define CB_ID(vend, dev, type) \
1345 { \
1346 .vendor = vend, \
1347 .device = dev, \
1348 .subvendor = PCI_ANY_ID, \
1349 .subdevice = PCI_ANY_ID, \
1350 .class = PCI_CLASS_BRIDGE_CARDBUS << 8, \
1351 .class_mask = ~0, \
1352 .driver_data = CARDBUS_TYPE_##type, \
1353 }
1354
1355 static struct pci_device_id yenta_table[] = {
1356 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1031, TI),
1357
1358 /*
1359 * TBD: Check if these TI variants can use more
1360 * advanced overrides instead. (I can't get the
1361 * data sheets for these devices. --rmk)
1362 */
1363 #ifdef CONFIG_YENTA_TI
1364 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1210, TI),
1365
1366 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1130, TI113X),
1367 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1131, TI113X),
1368
1369 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1211, TI12XX),
1370 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1220, TI12XX),
1371 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1221, TI12XX),
1372 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1225, TI12XX),
1373 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1251A, TI12XX),
1374 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1251B, TI12XX),
1375 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1420, TI12XX),
1376 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1450, TI12XX),
1377 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1451A, TI12XX),
1378 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1510, TI12XX),
1379 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1520, TI12XX),
1380 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1620, TI12XX),
1381 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4410, TI12XX),
1382 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4450, TI12XX),
1383 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4451, TI12XX),
1384 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4510, TI12XX),
1385 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4520, TI12XX),
1386
1387 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1250, TI1250),
1388 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1410, TI1250),
1389
1390 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_XX21_XX11, TI12XX),
1391 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_X515, TI12XX),
1392 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_XX12, TI12XX),
1393 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_X420, TI12XX),
1394 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_X620, TI12XX),
1395 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_7410, TI12XX),
1396 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_7510, TI12XX),
1397 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_7610, TI12XX),
1398
1399 CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_710, ENE),
1400 CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_712, ENE),
1401 CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_720, ENE),
1402 CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_722, ENE),
1403 CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1211, ENE),
1404 CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1225, ENE),
1405 CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1410, ENE),
1406 CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1420, ENE),
1407 #endif /* CONFIG_YENTA_TI */
1408
1409 #ifdef CONFIG_YENTA_RICOH
1410 CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C465, RICOH),
1411 CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C466, RICOH),
1412 CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C475, RICOH),
1413 CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C476, RICOH),
1414 CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C478, RICOH),
1415 #endif
1416
1417 #ifdef CONFIG_YENTA_TOSHIBA
1418 CB_ID(PCI_VENDOR_ID_TOSHIBA, PCI_DEVICE_ID_TOSHIBA_TOPIC95, TOPIC95),
1419 CB_ID(PCI_VENDOR_ID_TOSHIBA, PCI_DEVICE_ID_TOSHIBA_TOPIC97, TOPIC97),
1420 CB_ID(PCI_VENDOR_ID_TOSHIBA, PCI_DEVICE_ID_TOSHIBA_TOPIC100, TOPIC97),
1421 #endif
1422
1423 #ifdef CONFIG_YENTA_O2
1424 CB_ID(PCI_VENDOR_ID_O2, PCI_ANY_ID, O2MICRO),
1425 #endif
1426
1427 /* match any cardbus bridge */
1428 CB_ID(PCI_ANY_ID, PCI_ANY_ID, DEFAULT),
1429 { /* all zeroes */ }
1430 };
1431 MODULE_DEVICE_TABLE(pci, yenta_table);
1432
1433
1434 static struct pci_driver yenta_cardbus_driver = {
1435 .name = "yenta_cardbus",
1436 .id_table = yenta_table,
1437 .probe = yenta_probe,
1438 .remove = __devexit_p(yenta_close),
1439 .driver.pm = YENTA_PM_OPS,
1440 };
1441
1442
1443 static int __init yenta_socket_init(void)
1444 {
1445 return pci_register_driver(&yenta_cardbus_driver);
1446 }
1447
1448
1449 static void __exit yenta_socket_exit(void)
1450 {
1451 pci_unregister_driver(&yenta_cardbus_driver);
1452 }
1453
1454
1455 module_init(yenta_socket_init);
1456 module_exit(yenta_socket_exit);
1457
1458 MODULE_LICENSE("GPL");
Tomato firmware and modifications.