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RT-AC56 3.0.0.4.374.37 core
[tomato.git] / release / src-rt-6.x.4708 / linux / linux-2.6.36 / drivers / net / wireless / ath / ath9k / ath9k.h
blob852745c2b75261bc4574806ad40649ab26d9ca00
1 /*
2 * Copyright (c) 2008-2009 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17 #ifndef ATH9K_H
18 #define ATH9K_H
19
20 #include <linux/etherdevice.h>
21 #include <linux/device.h>
22 #include <linux/leds.h>
23 #include <linux/completion.h>
24
25 #include "debug.h"
26 #include "common.h"
27
28 /*
29 * Header for the ath9k.ko driver core *only* -- hw code nor any other driver
30 * should rely on this file or its contents.
31 */
32
33 struct ath_node;
34
35 /* Macro to expand scalars to 64-bit objects */
36
37 #define ito64(x) (sizeof(x) == 1) ? \
38 (((unsigned long long int)(x)) & (0xff)) : \
39 (sizeof(x) == 2) ? \
40 (((unsigned long long int)(x)) & 0xffff) : \
41 ((sizeof(x) == 4) ? \
42 (((unsigned long long int)(x)) & 0xffffffff) : \
43 (unsigned long long int)(x))
44
45 /* increment with wrap-around */
46 #define INCR(_l, _sz) do { \
47 (_l)++; \
48 (_l) &= ((_sz) - 1); \
49 } while (0)
50
51 /* decrement with wrap-around */
52 #define DECR(_l, _sz) do { \
53 (_l)--; \
54 (_l) &= ((_sz) - 1); \
55 } while (0)
56
57 #define A_MAX(a, b) ((a) > (b) ? (a) : (b))
58
59 #define TSF_TO_TU(_h,_l) \
60 ((((u32)(_h)) << 22) | (((u32)(_l)) >> 10))
61
62 #define ATH_TXQ_SETUP(sc, i) ((sc)->tx.txqsetup & (1<<i))
63
64 struct ath_config {
65 u32 ath_aggr_prot;
66 u16 txpowlimit;
67 u8 cabqReadytime;
68 };
69
70 /*************************/
71 /* Descriptor Management */
72 /*************************/
73
74 #define ATH_TXBUF_RESET(_bf) do { \
75 (_bf)->bf_stale = false; \
76 (_bf)->bf_lastbf = NULL; \
77 (_bf)->bf_next = NULL; \
78 memset(&((_bf)->bf_state), 0, \
79 sizeof(struct ath_buf_state)); \
80 } while (0)
81
82 #define ATH_RXBUF_RESET(_bf) do { \
83 (_bf)->bf_stale = false; \
84 } while (0)
85
86 /**
87 * enum buffer_type - Buffer type flags
88 *
89 * @BUF_HT: Send this buffer using HT capabilities
90 * @BUF_AMPDU: This buffer is an ampdu, as part of an aggregate (during TX)
91 * @BUF_AGGR: Indicates whether the buffer can be aggregated
92 * (used in aggregation scheduling)
93 * @BUF_RETRY: Indicates whether the buffer is retried
94 * @BUF_XRETRY: To denote excessive retries of the buffer
95 */
96 enum buffer_type {
97 BUF_HT = BIT(1),
98 BUF_AMPDU = BIT(2),
99 BUF_AGGR = BIT(3),
100 BUF_RETRY = BIT(4),
101 BUF_XRETRY = BIT(5),
102 };
103
104 #define bf_nframes bf_state.bfs_nframes
105 #define bf_al bf_state.bfs_al
106 #define bf_frmlen bf_state.bfs_frmlen
107 #define bf_retries bf_state.bfs_retries
108 #define bf_seqno bf_state.bfs_seqno
109 #define bf_tidno bf_state.bfs_tidno
110 #define bf_keyix bf_state.bfs_keyix
111 #define bf_keytype bf_state.bfs_keytype
112 #define bf_isht(bf) (bf->bf_state.bf_type & BUF_HT)
113 #define bf_isampdu(bf) (bf->bf_state.bf_type & BUF_AMPDU)
114 #define bf_isaggr(bf) (bf->bf_state.bf_type & BUF_AGGR)
115 #define bf_isretried(bf) (bf->bf_state.bf_type & BUF_RETRY)
116 #define bf_isxretried(bf) (bf->bf_state.bf_type & BUF_XRETRY)
117
118 #define ATH_TXSTATUS_RING_SIZE 64
119
120 struct ath_descdma {
121 void *dd_desc;
122 dma_addr_t dd_desc_paddr;
123 u32 dd_desc_len;
124 struct ath_buf *dd_bufptr;
125 };
126
127 int ath_descdma_setup(struct ath_softc *sc, struct ath_descdma *dd,
128 struct list_head *head, const char *name,
129 int nbuf, int ndesc, bool is_tx);
130 void ath_descdma_cleanup(struct ath_softc *sc, struct ath_descdma *dd,
131 struct list_head *head);
132
133 /***********/
134 /* RX / TX */
135 /***********/
136
137 #define ATH_MAX_ANTENNA 3
138 #define ATH_RXBUF 512
139 #define ATH_TXBUF 512
140 #define ATH_TXBUF_RESERVE 5
141 #define ATH_MAX_QDEPTH (ATH_TXBUF / 4 - ATH_TXBUF_RESERVE)
142 #define ATH_TXMAXTRY 13
143 #define ATH_MGT_TXMAXTRY 4
144
145 #define TID_TO_WME_AC(_tid) \
146 ((((_tid) == 0) || ((_tid) == 3)) ? WME_AC_BE : \
147 (((_tid) == 1) || ((_tid) == 2)) ? WME_AC_BK : \
148 (((_tid) == 4) || ((_tid) == 5)) ? WME_AC_VI : \
149 WME_AC_VO)
150
151 #define ADDBA_EXCHANGE_ATTEMPTS 10
152 #define ATH_AGGR_DELIM_SZ 4
153 #define ATH_AGGR_MINPLEN 256 /* in bytes, minimum packet length */
154 /* number of delimiters for encryption padding */
155 #define ATH_AGGR_ENCRYPTDELIM 10
156 /* minimum h/w qdepth to be sustained to maximize aggregation */
157 #define ATH_AGGR_MIN_QDEPTH 2
158 #define ATH_AMPDU_SUBFRAME_DEFAULT 32
159
160 #define IEEE80211_SEQ_SEQ_SHIFT 4
161 #define IEEE80211_SEQ_MAX 4096
162 #define IEEE80211_WEP_IVLEN 3
163 #define IEEE80211_WEP_KIDLEN 1
164 #define IEEE80211_WEP_CRCLEN 4
165 #define IEEE80211_MAX_MPDU_LEN (3840 + FCS_LEN + \
166 (IEEE80211_WEP_IVLEN + \
167 IEEE80211_WEP_KIDLEN + \
168 IEEE80211_WEP_CRCLEN))
169
170 /* return whether a bit at index _n in bitmap _bm is set
171 * _sz is the size of the bitmap */
172 #define ATH_BA_ISSET(_bm, _n) (((_n) < (WME_BA_BMP_SIZE)) && \
173 ((_bm)[(_n) >> 5] & (1 << ((_n) & 31))))
174
175 /* return block-ack bitmap index given sequence and starting sequence */
176 #define ATH_BA_INDEX(_st, _seq) (((_seq) - (_st)) & (IEEE80211_SEQ_MAX - 1))
177
178 /* returns delimiter padding required given the packet length */
179 #define ATH_AGGR_GET_NDELIM(_len) \
180 (((_len) >= ATH_AGGR_MINPLEN) ? 0 : \
181 DIV_ROUND_UP(ATH_AGGR_MINPLEN - (_len), ATH_AGGR_DELIM_SZ))
182
183 #define BAW_WITHIN(_start, _bawsz, _seqno) \
184 ((((_seqno) - (_start)) & 4095) < (_bawsz))
185
186 #define ATH_AN_2_TID(_an, _tidno) (&(_an)->tid[(_tidno)])
187
188 #define ATH_TX_COMPLETE_POLL_INT 1000
189
190 enum ATH_AGGR_STATUS {
191 ATH_AGGR_DONE,
192 ATH_AGGR_BAW_CLOSED,
193 ATH_AGGR_LIMITED,
194 };
195
196 #define ATH_TXFIFO_DEPTH 8
197 struct ath_txq {
198 int axq_class;
199 u32 axq_qnum;
200 u32 *axq_link;
201 struct list_head axq_q;
202 spinlock_t axq_lock;
203 u32 axq_depth;
204 bool stopped;
205 bool axq_tx_inprogress;
206 struct list_head axq_acq;
207 struct list_head txq_fifo[ATH_TXFIFO_DEPTH];
208 struct list_head txq_fifo_pending;
209 u8 txq_headidx;
210 u8 txq_tailidx;
211 };
212
213 struct ath_atx_ac {
214 int sched;
215 int qnum;
216 struct list_head list;
217 struct list_head tid_q;
218 };
219
220 struct ath_buf_state {
221 int bfs_nframes;
222 u16 bfs_al;
223 u16 bfs_frmlen;
224 int bfs_seqno;
225 int bfs_tidno;
226 int bfs_retries;
227 u8 bf_type;
228 u8 bfs_paprd;
229 unsigned long bfs_paprd_timestamp;
230 u32 bfs_keyix;
231 enum ath9k_key_type bfs_keytype;
232 };
233
234 struct ath_buf {
235 struct list_head list;
236 struct ath_buf *bf_lastbf; /* last buf of this unit (a frame or
237 an aggregate) */
238 struct ath_buf *bf_next; /* next subframe in the aggregate */
239 struct sk_buff *bf_mpdu; /* enclosing frame structure */
240 void *bf_desc; /* virtual addr of desc */
241 dma_addr_t bf_daddr; /* physical addr of desc */
242 dma_addr_t bf_buf_addr; /* physical addr of data buffer */
243 bool bf_stale;
244 bool bf_isnullfunc;
245 bool bf_tx_aborted;
246 u16 bf_flags;
247 struct ath_buf_state bf_state;
248 dma_addr_t bf_dmacontext;
249 struct ath_wiphy *aphy;
250 };
251
252 struct ath_atx_tid {
253 struct list_head list;
254 struct list_head buf_q;
255 struct ath_node *an;
256 struct ath_atx_ac *ac;
257 struct ath_buf *tx_buf[ATH_TID_MAX_BUFS];
258 u16 seq_start;
259 u16 seq_next;
260 u16 baw_size;
261 int tidno;
262 int baw_head; /* first un-acked tx buffer */
263 int baw_tail; /* next unused tx buffer slot */
264 int sched;
265 int paused;
266 u8 state;
267 };
268
269 struct ath_node {
270 struct ath_common *common;
271 struct ath_atx_tid tid[WME_NUM_TID];
272 struct ath_atx_ac ac[WME_NUM_AC];
273 u16 maxampdu;
274 u8 mpdudensity;
275 int last_rssi;
276 };
277
278 #define AGGR_CLEANUP BIT(1)
279 #define AGGR_ADDBA_COMPLETE BIT(2)
280 #define AGGR_ADDBA_PROGRESS BIT(3)
281
282 struct ath_tx_control {
283 struct ath_txq *txq;
284 int if_id;
285 enum ath9k_internal_frame_type frame_type;
286 u8 paprd;
287 };
288
289 #define ATH_TX_ERROR 0x01
290 #define ATH_TX_XRETRY 0x02
291 #define ATH_TX_BAR 0x04
292
293 struct ath_tx {
294 u16 seq_no;
295 u32 txqsetup;
296 int hwq_map[WME_NUM_AC];
297 spinlock_t txbuflock;
298 struct list_head txbuf;
299 struct ath_txq txq[ATH9K_NUM_TX_QUEUES];
300 struct ath_descdma txdma;
301 int pending_frames[WME_NUM_AC];
302 };
303
304 struct ath_rx_edma {
305 struct sk_buff_head rx_fifo;
306 struct sk_buff_head rx_buffers;
307 u32 rx_fifo_hwsize;
308 };
309
310 struct ath_rx {
311 u8 defant;
312 u8 rxotherant;
313 u32 *rxlink;
314 unsigned int rxfilter;
315 spinlock_t rxbuflock;
316 struct list_head rxbuf;
317 struct ath_descdma rxdma;
318 struct ath_buf *rx_bufptr;
319 struct ath_rx_edma rx_edma[ATH9K_RX_QUEUE_MAX];
320 };
321
322 int ath_startrecv(struct ath_softc *sc);
323 bool ath_stoprecv(struct ath_softc *sc);
324 void ath_flushrecv(struct ath_softc *sc);
325 u32 ath_calcrxfilter(struct ath_softc *sc);
326 int ath_rx_init(struct ath_softc *sc, int nbufs);
327 void ath_rx_cleanup(struct ath_softc *sc);
328 int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp);
329 struct ath_txq *ath_txq_setup(struct ath_softc *sc, int qtype, int subtype);
330 void ath_tx_cleanupq(struct ath_softc *sc, struct ath_txq *txq);
331 int ath_tx_setup(struct ath_softc *sc, int haltype);
332 void ath_drain_all_txq(struct ath_softc *sc, bool retry_tx);
333 void ath_draintxq(struct ath_softc *sc,
334 struct ath_txq *txq, bool retry_tx);
335 void ath_tx_node_init(struct ath_softc *sc, struct ath_node *an);
336 void ath_tx_node_cleanup(struct ath_softc *sc, struct ath_node *an);
337 void ath_txq_schedule(struct ath_softc *sc, struct ath_txq *txq);
338 int ath_tx_init(struct ath_softc *sc, int nbufs);
339 void ath_tx_cleanup(struct ath_softc *sc);
340 int ath_txq_update(struct ath_softc *sc, int qnum,
341 struct ath9k_tx_queue_info *q);
342 int ath_tx_start(struct ieee80211_hw *hw, struct sk_buff *skb,
343 struct ath_tx_control *txctl);
344 void ath_tx_tasklet(struct ath_softc *sc);
345 void ath_tx_edma_tasklet(struct ath_softc *sc);
346 void ath_tx_cabq(struct ieee80211_hw *hw, struct sk_buff *skb);
347 bool ath_tx_aggr_check(struct ath_softc *sc, struct ath_node *an, u8 tidno);
348 int ath_tx_aggr_start(struct ath_softc *sc, struct ieee80211_sta *sta,
349 u16 tid, u16 *ssn);
350 void ath_tx_aggr_stop(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid);
351 void ath_tx_aggr_resume(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid);
352 void ath9k_enable_ps(struct ath_softc *sc);
353
354 /********/
355 /* VIFs */
356 /********/
357
358 struct ath_vif {
359 int av_bslot;
360 __le64 tsf_adjust; /* TSF adjustment for staggered beacons */
361 enum nl80211_iftype av_opmode;
362 struct ath_buf *av_bcbuf;
363 struct ath_tx_control av_btxctl;
364 u8 bssid[ETH_ALEN]; /* current BSSID from config_interface */
365 };
366
367 /*******************/
368 /* Beacon Handling */
369 /*******************/
370
371 /*
372 * Regardless of the number of beacons we stagger, (i.e. regardless of the
373 * number of BSSIDs) if a given beacon does not go out even after waiting this
374 * number of beacon intervals, the game's up.
375 */
376 #define BSTUCK_THRESH (9 * ATH_BCBUF)
377 #define ATH_BCBUF 4
378 #define ATH_DEFAULT_BINTVAL 100 /* TU */
379 #define ATH_DEFAULT_BMISS_LIMIT 10
380 #define IEEE80211_MS_TO_TU(x) (((x) * 1000) / 1024)
381
382 struct ath_beacon_config {
383 u16 beacon_interval;
384 u16 listen_interval;
385 u16 dtim_period;
386 u16 bmiss_timeout;
387 u8 dtim_count;
388 };
389
390 struct ath_beacon {
391 enum {
392 OK, /* no change needed */
393 UPDATE, /* update pending */
394 COMMIT /* beacon sent, commit change */
395 } updateslot; /* slot time update fsm */
396
397 u32 beaconq;
398 u32 bmisscnt;
399 u32 ast_be_xmit;
400 u64 bc_tstamp;
401 struct ieee80211_vif *bslot[ATH_BCBUF];
402 struct ath_wiphy *bslot_aphy[ATH_BCBUF];
403 int slottime;
404 int slotupdate;
405 struct ath9k_tx_queue_info beacon_qi;
406 struct ath_descdma bdma;
407 struct ath_txq *cabq;
408 struct list_head bbuf;
409 };
410
411 void ath_beacon_tasklet(unsigned long data);
412 void ath_beacon_config(struct ath_softc *sc, struct ieee80211_vif *vif);
413 int ath_beacon_alloc(struct ath_wiphy *aphy, struct ieee80211_vif *vif);
414 void ath_beacon_return(struct ath_softc *sc, struct ath_vif *avp);
415 int ath_beaconq_config(struct ath_softc *sc);
416
417 /*******/
418 /* ANI */
419 /*******/
420
421 #define ATH_STA_SHORT_CALINTERVAL 1000 /* 1 second */
422 #define ATH_AP_SHORT_CALINTERVAL 100 /* 100 ms */
423 #define ATH_ANI_POLLINTERVAL_OLD 100 /* 100 ms */
424 #define ATH_ANI_POLLINTERVAL_NEW 1000 /* 1000 ms */
425 #define ATH_LONG_CALINTERVAL 30000 /* 30 seconds */
426 #define ATH_RESTART_CALINTERVAL 1200000 /* 20 minutes */
427
428 #define ATH_PAPRD_TIMEOUT 100 /* msecs */
429
430 void ath_hw_check(struct work_struct *work);
431 void ath_paprd_calibrate(struct work_struct *work);
432 void ath_ani_calibrate(unsigned long data);
433
434 /**********/
435 /* BTCOEX */
436 /**********/
437
438 /* Defines the BT AR_BT_COEX_WGHT used */
439 enum ath_stomp_type {
440 ATH_BTCOEX_NO_STOMP,
441 ATH_BTCOEX_STOMP_ALL,
442 ATH_BTCOEX_STOMP_LOW,
443 ATH_BTCOEX_STOMP_NONE
444 };
445
446 struct ath_btcoex {
447 bool hw_timer_enabled;
448 spinlock_t btcoex_lock;
449 struct timer_list period_timer; /* Timer for BT period */
450 u32 bt_priority_cnt;
451 unsigned long bt_priority_time;
452 int bt_stomp_type; /* Types of BT stomping */
453 u32 btcoex_no_stomp; /* in usec */
454 u32 btcoex_period; /* in usec */
455 u32 btscan_no_stomp; /* in usec */
456 struct ath_gen_timer *no_stomp_timer; /* Timer for no BT stomping */
457 };
458
459 int ath_init_btcoex_timer(struct ath_softc *sc);
460 void ath9k_btcoex_timer_resume(struct ath_softc *sc);
461 void ath9k_btcoex_timer_pause(struct ath_softc *sc);
462
463 /********************/
464 /* LED Control */
465 /********************/
466
467 #define ATH_LED_PIN_DEF 1
468 #define ATH_LED_PIN_9287 8
469 #define ATH_LED_ON_DURATION_IDLE 350 /* in msecs */
470 #define ATH_LED_OFF_DURATION_IDLE 250 /* in msecs */
471
472 enum ath_led_type {
473 ATH_LED_RADIO,
474 ATH_LED_ASSOC,
475 ATH_LED_TX,
476 ATH_LED_RX
477 };
478
479 struct ath_led {
480 struct ath_softc *sc;
481 struct led_classdev led_cdev;
482 enum ath_led_type led_type;
483 char name[32];
484 bool registered;
485 };
486
487 void ath_init_leds(struct ath_softc *sc);
488 void ath_deinit_leds(struct ath_softc *sc);
489
490 /********************/
491 /* Main driver core */
492 /********************/
493
494 /*
495 * Default cache line size, in bytes.
496 * Used when PCI device not fully initialized by bootrom/BIOS
497 */
498 #define DEFAULT_CACHELINE 32
499 #define ATH_REGCLASSIDS_MAX 10
500 #define ATH_CABQ_READY_TIME 80 /* % of beacon interval */
501 #define ATH_MAX_SW_RETRIES 10
502 #define ATH_CHAN_MAX 255
503 #define IEEE80211_WEP_NKID 4 /* number of key ids */
504
505 #define ATH_TXPOWER_MAX 100 /* .5 dBm units */
506 #define ATH_RATE_DUMMY_MARKER 0
507
508 #define SC_OP_INVALID BIT(0)
509 #define SC_OP_BEACONS BIT(1)
510 #define SC_OP_RXAGGR BIT(2)
511 #define SC_OP_TXAGGR BIT(3)
512 #define SC_OP_OFFCHANNEL BIT(4)
513 #define SC_OP_PREAMBLE_SHORT BIT(5)
514 #define SC_OP_PROTECT_ENABLE BIT(6)
515 #define SC_OP_RXFLUSH BIT(7)
516 #define SC_OP_LED_ASSOCIATED BIT(8)
517 #define SC_OP_LED_ON BIT(9)
518 #define SC_OP_TSF_RESET BIT(11)
519 #define SC_OP_BT_PRIORITY_DETECTED BIT(12)
520 #define SC_OP_BT_SCAN BIT(13)
521 #define SC_OP_ANI_RUN BIT(14)
522
523 /* Powersave flags */
524 #define PS_WAIT_FOR_BEACON BIT(0)
525 #define PS_WAIT_FOR_CAB BIT(1)
526 #define PS_WAIT_FOR_PSPOLL_DATA BIT(2)
527 #define PS_WAIT_FOR_TX_ACK BIT(3)
528 #define PS_BEACON_SYNC BIT(4)
529 #define PS_NULLFUNC_COMPLETED BIT(5)
530 #define PS_ENABLED BIT(6)
531
532 struct ath_wiphy;
533 struct ath_rate_table;
534
535 struct ath_softc {
536 struct ieee80211_hw *hw;
537 struct device *dev;
538
539 spinlock_t wiphy_lock; /* spinlock to protect ath_wiphy data */
540 struct ath_wiphy *pri_wiphy;
541 struct ath_wiphy **sec_wiphy; /* secondary wiphys (virtual radios); may
542 * have NULL entries */
543 int num_sec_wiphy; /* number of sec_wiphy pointers in the array */
544 int chan_idx;
545 int chan_is_ht;
546 struct ath_wiphy *next_wiphy;
547 struct work_struct chan_work;
548 int wiphy_select_failures;
549 unsigned long wiphy_select_first_fail;
550 struct delayed_work wiphy_work;
551 unsigned long wiphy_scheduler_int;
552 int wiphy_scheduler_index;
553
554 struct tasklet_struct intr_tq;
555 struct tasklet_struct bcon_tasklet;
556 struct ath_hw *sc_ah;
557 void __iomem *mem;
558 int irq;
559 spinlock_t sc_serial_rw;
560 spinlock_t sc_pm_lock;
561 spinlock_t sc_pcu_lock;
562 struct mutex mutex;
563 struct work_struct paprd_work;
564 struct work_struct hw_check_work;
565 struct completion paprd_complete;
566
567 u32 intrstatus;
568 u32 sc_flags; /* SC_OP_* */
569 u16 ps_flags; /* PS_* */
570 u16 curtxpow;
571 u8 nbcnvifs;
572 u16 nvifs;
573 bool ps_enabled;
574 bool ps_idle;
575 unsigned long ps_usecount;
576
577 struct ath_config config;
578 struct ath_rx rx;
579 struct ath_tx tx;
580 struct ath_beacon beacon;
581 const struct ath_rate_table *cur_rate_table;
582 enum wireless_mode cur_rate_mode;
583 struct ieee80211_supported_band sbands[IEEE80211_NUM_BANDS];
584
585 struct ath_led radio_led;
586 struct ath_led assoc_led;
587 struct ath_led tx_led;
588 struct ath_led rx_led;
589 struct delayed_work ath_led_blink_work;
590 int led_on_duration;
591 int led_off_duration;
592 int led_on_cnt;
593 int led_off_cnt;
594
595 int beacon_interval;
596
597 #ifdef CONFIG_ATH9K_DEBUGFS
598 struct ath9k_debug debug;
599 #endif
600 struct ath_beacon_config cur_beacon_conf;
601 struct delayed_work tx_complete_work;
602 struct ath_btcoex btcoex;
603
604 struct ath_descdma txsdma;
605 };
606
607 struct ath_wiphy {
608 struct ath_softc *sc; /* shared for all virtual wiphys */
609 struct ieee80211_hw *hw;
610 struct ath9k_hw_cal_data caldata;
611 enum ath_wiphy_state {
612 ATH_WIPHY_INACTIVE,
613 ATH_WIPHY_ACTIVE,
614 ATH_WIPHY_PAUSING,
615 ATH_WIPHY_PAUSED,
616 ATH_WIPHY_SCAN,
617 } state;
618 bool idle;
619 int chan_idx;
620 int chan_is_ht;
621 };
622
623 void ath9k_tasklet(unsigned long data);
624 int ath_reset(struct ath_softc *sc, bool retry_tx);
625 int ath_get_mac80211_qnum(u32 queue, struct ath_softc *sc);
626 int ath_cabq_update(struct ath_softc *);
627
628 static inline void ath_read_cachesize(struct ath_common *common, int *csz)
629 {
630 common->bus_ops->read_cachesize(common, csz);
631 }
632
633 extern struct ieee80211_ops ath9k_ops;
634 extern int modparam_nohwcrypt;
635 extern int led_blink;
636
637 irqreturn_t ath_isr(int irq, void *dev);
638 int ath9k_init_device(u16 devid, struct ath_softc *sc, u16 subsysid,
639 const struct ath_bus_ops *bus_ops);
640 void ath9k_deinit_device(struct ath_softc *sc);
641 void ath9k_set_hw_capab(struct ath_softc *sc, struct ieee80211_hw *hw);
642 void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
643 struct ath9k_channel *ichan);
644 void ath_update_chainmask(struct ath_softc *sc, int is_ht);
645 int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
646 struct ath9k_channel *hchan);
647
648 void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw);
649 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw);
650 bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode);
651
652 #ifdef CONFIG_PCI
653 int ath_pci_init(void);
654 void ath_pci_exit(void);
655 #else
656 static inline int ath_pci_init(void) { return 0; };
657 static inline void ath_pci_exit(void) {};
658 #endif
659
660 #ifdef CONFIG_ATHEROS_AR71XX
661 int ath_ahb_init(void);
662 void ath_ahb_exit(void);
663 #else
664 static inline int ath_ahb_init(void) { return 0; };
665 static inline void ath_ahb_exit(void) {};
666 #endif
667
668 void ath9k_ps_wakeup(struct ath_softc *sc);
669 void ath9k_ps_restore(struct ath_softc *sc);
670
671 void ath9k_set_bssid_mask(struct ieee80211_hw *hw);
672 int ath9k_wiphy_add(struct ath_softc *sc);
673 int ath9k_wiphy_del(struct ath_wiphy *aphy);
674 void ath9k_tx_status(struct ieee80211_hw *hw, struct sk_buff *skb);
675 int ath9k_wiphy_pause(struct ath_wiphy *aphy);
676 int ath9k_wiphy_unpause(struct ath_wiphy *aphy);
677 int ath9k_wiphy_select(struct ath_wiphy *aphy);
678 void ath9k_wiphy_set_scheduler(struct ath_softc *sc, unsigned int msec_int);
679 void ath9k_wiphy_chan_work(struct work_struct *work);
680 bool ath9k_wiphy_started(struct ath_softc *sc);
681 void ath9k_wiphy_pause_all_forced(struct ath_softc *sc,
682 struct ath_wiphy *selected);
683 bool ath9k_wiphy_scanning(struct ath_softc *sc);
684 void ath9k_wiphy_work(struct work_struct *work);
685 bool ath9k_all_wiphys_idle(struct ath_softc *sc);
686 void ath9k_set_wiphy_idle(struct ath_wiphy *aphy, bool idle);
687
688 void ath_mac80211_stop_queue(struct ath_softc *sc, u16 skb_queue);
689 bool ath_mac80211_start_queue(struct ath_softc *sc, u16 skb_queue);
690
691 void ath_start_rfkill_poll(struct ath_softc *sc);
692 extern void ath9k_rfkill_poll_state(struct ieee80211_hw *hw);
693
694 #endif /* ATH9K_H */
Tomato firmware and modifications.