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RT-AC56 3.0.0.4.374.37 core
[tomato.git] / release / src-rt-6.x.4708 / linux / linux-2.6.36 / drivers / net / cris / eth_v10.c
blob9780380df856740a698d114b83c62bf495f12c07
1 /*
2 * e100net.c: A network driver for the ETRAX 100LX network controller.
3 *
4 * Copyright (c) 1998-2002 Axis Communications AB.
5 *
6 * The outline of this driver comes from skeleton.c.
7 *
8 */
9
10
11 #include <linux/module.h>
12
13 #include <linux/kernel.h>
14 #include <linux/delay.h>
15 #include <linux/types.h>
16 #include <linux/fcntl.h>
17 #include <linux/interrupt.h>
18 #include <linux/ptrace.h>
19 #include <linux/ioport.h>
20 #include <linux/in.h>
21 #include <linux/string.h>
22 #include <linux/spinlock.h>
23 #include <linux/errno.h>
24 #include <linux/init.h>
25 #include <linux/bitops.h>
26
27 #include <linux/if.h>
28 #include <linux/mii.h>
29 #include <linux/netdevice.h>
30 #include <linux/etherdevice.h>
31 #include <linux/skbuff.h>
32 #include <linux/ethtool.h>
33
34 #include <arch/svinto.h>/* DMA and register descriptions */
35 #include <asm/io.h> /* CRIS_LED_* I/O functions */
36 #include <asm/irq.h>
37 #include <asm/dma.h>
38 #include <asm/system.h>
39 #include <asm/ethernet.h>
40 #include <asm/cache.h>
41 #include <arch/io_interface_mux.h>
42
43 //#define ETHDEBUG
44 #define D(x)
45
46 /*
47 * The name of the card. Is used for messages and in the requests for
48 * io regions, irqs and dma channels
49 */
50
51 static const char* cardname = "ETRAX 100LX built-in ethernet controller";
52
53 /* A default ethernet address. Highlevel SW will set the real one later */
54
55 static struct sockaddr default_mac = {
56 0,
57 { 0x00, 0x40, 0x8C, 0xCD, 0x00, 0x00 }
58 };
59
60 /* Information that need to be kept for each board. */
61 struct net_local {
62 struct net_device_stats stats;
63 struct mii_if_info mii_if;
64
65 /* Tx control lock. This protects the transmit buffer ring
66 * state along with the "tx full" state of the driver. This
67 * means all netif_queue flow control actions are protected
68 * by this lock as well.
69 */
70 spinlock_t lock;
71
72 spinlock_t led_lock; /* Protect LED state */
73 spinlock_t transceiver_lock; /* Protect transceiver state. */
74 };
75
76 typedef struct etrax_eth_descr
77 {
78 etrax_dma_descr descr;
79 struct sk_buff* skb;
80 } etrax_eth_descr;
81
82 /* Some transceivers requires special handling */
83 struct transceiver_ops
84 {
85 unsigned int oui;
86 void (*check_speed)(struct net_device* dev);
87 void (*check_duplex)(struct net_device* dev);
88 };
89
90 /* Duplex settings */
91 enum duplex
92 {
93 half,
94 full,
95 autoneg
96 };
97
98 /* Dma descriptors etc. */
99
100 #define MAX_MEDIA_DATA_SIZE 1522
101
102 #define MIN_PACKET_LEN 46
103 #define ETHER_HEAD_LEN 14
104
105 /*
106 ** MDIO constants.
107 */
108 #define MDIO_START 0x1
109 #define MDIO_READ 0x2
110 #define MDIO_WRITE 0x1
111 #define MDIO_PREAMBLE 0xfffffffful
112
113 /* Broadcom specific */
114 #define MDIO_AUX_CTRL_STATUS_REG 0x18
115 #define MDIO_BC_FULL_DUPLEX_IND 0x1
116 #define MDIO_BC_SPEED 0x2
117
118 /* TDK specific */
119 #define MDIO_TDK_DIAGNOSTIC_REG 18
120 #define MDIO_TDK_DIAGNOSTIC_RATE 0x400
121 #define MDIO_TDK_DIAGNOSTIC_DPLX 0x800
122
123 /*Intel LXT972A specific*/
124 #define MDIO_INT_STATUS_REG_2 0x0011
125 #define MDIO_INT_FULL_DUPLEX_IND (1 << 9)
126 #define MDIO_INT_SPEED (1 << 14)
127
128 /* Network flash constants */
129 #define NET_FLASH_TIME (HZ/50) /* 20 ms */
130 #define NET_FLASH_PAUSE (HZ/100) /* 10 ms */
131 #define NET_LINK_UP_CHECK_INTERVAL (2*HZ) /* 2 s */
132 #define NET_DUPLEX_CHECK_INTERVAL (2*HZ) /* 2 s */
133
134 #define NO_NETWORK_ACTIVITY 0
135 #define NETWORK_ACTIVITY 1
136
137 #define NBR_OF_RX_DESC 32
138 #define NBR_OF_TX_DESC 16
139
140 /* Large packets are sent directly to upper layers while small packets are */
141 /* copied (to reduce memory waste). The following constant decides the breakpoint */
142 #define RX_COPYBREAK 256
143
144 /* Due to a chip bug we need to flush the cache when descriptors are returned */
145 /* to the DMA. To decrease performance impact we return descriptors in chunks. */
146 /* The following constant determines the number of descriptors to return. */
147 #define RX_QUEUE_THRESHOLD NBR_OF_RX_DESC/2
148
149 #define GET_BIT(bit,val) (((val) >> (bit)) & 0x01)
150
151 /* Define some macros to access ETRAX 100 registers */
152 #define SETF(var, reg, field, val) var = (var & ~IO_MASK_(reg##_, field##_)) | \
153 IO_FIELD_(reg##_, field##_, val)
154 #define SETS(var, reg, field, val) var = (var & ~IO_MASK_(reg##_, field##_)) | \
155 IO_STATE_(reg##_, field##_, _##val)
156
157 static etrax_eth_descr *myNextRxDesc; /* Points to the next descriptor to
158 to be processed */
159 static etrax_eth_descr *myLastRxDesc; /* The last processed descriptor */
160
161 static etrax_eth_descr RxDescList[NBR_OF_RX_DESC] __attribute__ ((aligned(32)));
162
163 static etrax_eth_descr* myFirstTxDesc; /* First packet not yet sent */
164 static etrax_eth_descr* myLastTxDesc; /* End of send queue */
165 static etrax_eth_descr* myNextTxDesc; /* Next descriptor to use */
166 static etrax_eth_descr TxDescList[NBR_OF_TX_DESC] __attribute__ ((aligned(32)));
167
168 static unsigned int network_rec_config_shadow = 0;
169
170 static unsigned int network_tr_ctrl_shadow = 0;
171
172 /* Network speed indication. */
173 static DEFINE_TIMER(speed_timer, NULL, 0, 0);
174 static DEFINE_TIMER(clear_led_timer, NULL, 0, 0);
175 static int current_speed; /* Speed read from transceiver */
176 static int current_speed_selection; /* Speed selected by user */
177 static unsigned long led_next_time;
178 static int led_active;
179 static int rx_queue_len;
180
181 /* Duplex */
182 static DEFINE_TIMER(duplex_timer, NULL, 0, 0);
183 static int full_duplex;
184 static enum duplex current_duplex;
185
186 /* Index to functions, as function prototypes. */
187
188 static int etrax_ethernet_init(void);
189
190 static int e100_open(struct net_device *dev);
191 static int e100_set_mac_address(struct net_device *dev, void *addr);
192 static int e100_send_packet(struct sk_buff *skb, struct net_device *dev);
193 static irqreturn_t e100rxtx_interrupt(int irq, void *dev_id);
194 static irqreturn_t e100nw_interrupt(int irq, void *dev_id);
195 static void e100_rx(struct net_device *dev);
196 static int e100_close(struct net_device *dev);
197 static int e100_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd);
198 static int e100_set_config(struct net_device* dev, struct ifmap* map);
199 static void e100_tx_timeout(struct net_device *dev);
200 static struct net_device_stats *e100_get_stats(struct net_device *dev);
201 static void set_multicast_list(struct net_device *dev);
202 static void e100_hardware_send_packet(struct net_local* np, char *buf, int length);
203 static void update_rx_stats(struct net_device_stats *);
204 static void update_tx_stats(struct net_device_stats *);
205 static int e100_probe_transceiver(struct net_device* dev);
206
207 static void e100_check_speed(unsigned long priv);
208 static void e100_set_speed(struct net_device* dev, unsigned long speed);
209 static void e100_check_duplex(unsigned long priv);
210 static void e100_set_duplex(struct net_device* dev, enum duplex);
211 static void e100_negotiate(struct net_device* dev);
212
213 static int e100_get_mdio_reg(struct net_device *dev, int phy_id, int location);
214 static void e100_set_mdio_reg(struct net_device *dev, int phy_id, int location, int value);
215
216 static void e100_send_mdio_cmd(unsigned short cmd, int write_cmd);
217 static void e100_send_mdio_bit(unsigned char bit);
218 static unsigned char e100_receive_mdio_bit(void);
219 static void e100_reset_transceiver(struct net_device* net);
220
221 static void e100_clear_network_leds(unsigned long dummy);
222 static void e100_set_network_leds(int active);
223
224 static const struct ethtool_ops e100_ethtool_ops;
225 #if defined(CONFIG_ETRAX_NO_PHY)
226 static void dummy_check_speed(struct net_device* dev);
227 static void dummy_check_duplex(struct net_device* dev);
228 #else
229 static void broadcom_check_speed(struct net_device* dev);
230 static void broadcom_check_duplex(struct net_device* dev);
231 static void tdk_check_speed(struct net_device* dev);
232 static void tdk_check_duplex(struct net_device* dev);
233 static void intel_check_speed(struct net_device* dev);
234 static void intel_check_duplex(struct net_device* dev);
235 static void generic_check_speed(struct net_device* dev);
236 static void generic_check_duplex(struct net_device* dev);
237 #endif
238 #ifdef CONFIG_NET_POLL_CONTROLLER
239 static void e100_netpoll(struct net_device* dev);
240 #endif
241
242 static int autoneg_normal = 1;
243
244 struct transceiver_ops transceivers[] =
245 {
246 #if defined(CONFIG_ETRAX_NO_PHY)
247 {0x0000, dummy_check_speed, dummy_check_duplex} /* Dummy */
248 #else
249 {0x1018, broadcom_check_speed, broadcom_check_duplex}, /* Broadcom */
250 {0xC039, tdk_check_speed, tdk_check_duplex}, /* TDK 2120 */
251 {0x039C, tdk_check_speed, tdk_check_duplex}, /* TDK 2120C */
252 {0x04de, intel_check_speed, intel_check_duplex}, /* Intel LXT972A*/
253 {0x0000, generic_check_speed, generic_check_duplex} /* Generic, must be last */
254 #endif
255 };
256
257 struct transceiver_ops* transceiver = &transceivers[0];
258
259 static const struct net_device_ops e100_netdev_ops = {
260 .ndo_open = e100_open,
261 .ndo_stop = e100_close,
262 .ndo_start_xmit = e100_send_packet,
263 .ndo_tx_timeout = e100_tx_timeout,
264 .ndo_get_stats = e100_get_stats,
265 .ndo_set_multicast_list = set_multicast_list,
266 .ndo_do_ioctl = e100_ioctl,
267 .ndo_set_mac_address = e100_set_mac_address,
268 .ndo_validate_addr = eth_validate_addr,
269 .ndo_change_mtu = eth_change_mtu,
270 .ndo_set_config = e100_set_config,
271 #ifdef CONFIG_NET_POLL_CONTROLLER
272 .ndo_poll_controller = e100_netpoll,
273 #endif
274 };
275
276 #define tx_done(dev) (*R_DMA_CH0_CMD == 0)
277
278 /*
279 * Check for a network adaptor of this type, and return '0' if one exists.
280 * If dev->base_addr == 0, probe all likely locations.
281 * If dev->base_addr == 1, always return failure.
282 * If dev->base_addr == 2, allocate space for the device and return success
283 * (detachable devices only).
284 */
285
286 static int __init
287 etrax_ethernet_init(void)
288 {
289 struct net_device *dev;
290 struct net_local* np;
291 int i, err;
292
293 printk(KERN_INFO
294 "ETRAX 100LX 10/100MBit ethernet v2.0 (c) 1998-2007 Axis Communications AB\n");
295
296 if (cris_request_io_interface(if_eth, cardname)) {
297 printk(KERN_CRIT "etrax_ethernet_init failed to get IO interface\n");
298 return -EBUSY;
299 }
300
301 dev = alloc_etherdev(sizeof(struct net_local));
302 if (!dev)
303 return -ENOMEM;
304
305 np = netdev_priv(dev);
306
307 /* we do our own locking */
308 dev->features |= NETIF_F_LLTX;
309
310 dev->base_addr = (unsigned int)R_NETWORK_SA_0; /* just to have something to show */
311
312 /* now setup our etrax specific stuff */
313
314 dev->irq = NETWORK_DMA_RX_IRQ_NBR; /* we really use DMATX as well... */
315 dev->dma = NETWORK_RX_DMA_NBR;
316
317 /* fill in our handlers so the network layer can talk to us in the future */
318
319 dev->ethtool_ops = &e100_ethtool_ops;
320 dev->netdev_ops = &e100_netdev_ops;
321
322 spin_lock_init(&np->lock);
323 spin_lock_init(&np->led_lock);
324 spin_lock_init(&np->transceiver_lock);
325
326 /* Initialise the list of Etrax DMA-descriptors */
327
328 /* Initialise receive descriptors */
329
330 for (i = 0; i < NBR_OF_RX_DESC; i++) {
331 /* Allocate two extra cachelines to make sure that buffer used
332 * by DMA does not share cacheline with any other data (to
333 * avoid cache bug)
334 */
335 RxDescList[i].skb = dev_alloc_skb(MAX_MEDIA_DATA_SIZE + 2 * L1_CACHE_BYTES);
336 if (!RxDescList[i].skb)
337 return -ENOMEM;
338 RxDescList[i].descr.ctrl = 0;
339 RxDescList[i].descr.sw_len = MAX_MEDIA_DATA_SIZE;
340 RxDescList[i].descr.next = virt_to_phys(&RxDescList[i + 1]);
341 RxDescList[i].descr.buf = L1_CACHE_ALIGN(virt_to_phys(RxDescList[i].skb->data));
342 RxDescList[i].descr.status = 0;
343 RxDescList[i].descr.hw_len = 0;
344 prepare_rx_descriptor(&RxDescList[i].descr);
345 }
346
347 RxDescList[NBR_OF_RX_DESC - 1].descr.ctrl = d_eol;
348 RxDescList[NBR_OF_RX_DESC - 1].descr.next = virt_to_phys(&RxDescList[0]);
349 rx_queue_len = 0;
350
351 /* Initialize transmit descriptors */
352 for (i = 0; i < NBR_OF_TX_DESC; i++) {
353 TxDescList[i].descr.ctrl = 0;
354 TxDescList[i].descr.sw_len = 0;
355 TxDescList[i].descr.next = virt_to_phys(&TxDescList[i + 1].descr);
356 TxDescList[i].descr.buf = 0;
357 TxDescList[i].descr.status = 0;
358 TxDescList[i].descr.hw_len = 0;
359 TxDescList[i].skb = 0;
360 }
361
362 TxDescList[NBR_OF_TX_DESC - 1].descr.ctrl = d_eol;
363 TxDescList[NBR_OF_TX_DESC - 1].descr.next = virt_to_phys(&TxDescList[0].descr);
364
365 /* Initialise initial pointers */
366
367 myNextRxDesc = &RxDescList[0];
368 myLastRxDesc = &RxDescList[NBR_OF_RX_DESC - 1];
369 myFirstTxDesc = &TxDescList[0];
370 myNextTxDesc = &TxDescList[0];
371 myLastTxDesc = &TxDescList[NBR_OF_TX_DESC - 1];
372
373 /* Register device */
374 err = register_netdev(dev);
375 if (err) {
376 free_netdev(dev);
377 return err;
378 }
379
380 /* set the default MAC address */
381
382 e100_set_mac_address(dev, &default_mac);
383
384 /* Initialize speed indicator stuff. */
385
386 current_speed = 10;
387 current_speed_selection = 0; /* Auto */
388 speed_timer.expires = jiffies + NET_LINK_UP_CHECK_INTERVAL;
389 speed_timer.data = (unsigned long)dev;
390 speed_timer.function = e100_check_speed;
391
392 clear_led_timer.function = e100_clear_network_leds;
393 clear_led_timer.data = (unsigned long)dev;
394
395 full_duplex = 0;
396 current_duplex = autoneg;
397 duplex_timer.expires = jiffies + NET_DUPLEX_CHECK_INTERVAL;
398 duplex_timer.data = (unsigned long)dev;
399 duplex_timer.function = e100_check_duplex;
400
401 /* Initialize mii interface */
402 np->mii_if.phy_id_mask = 0x1f;
403 np->mii_if.reg_num_mask = 0x1f;
404 np->mii_if.dev = dev;
405 np->mii_if.mdio_read = e100_get_mdio_reg;
406 np->mii_if.mdio_write = e100_set_mdio_reg;
407
408 /* Initialize group address registers to make sure that no */
409 /* unwanted addresses are matched */
410 *R_NETWORK_GA_0 = 0x00000000;
411 *R_NETWORK_GA_1 = 0x00000000;
412
413 /* Initialize next time the led can flash */
414 led_next_time = jiffies;
415 return 0;
416 }
417
418 /* set MAC address of the interface. called from the core after a
419 * SIOCSIFADDR ioctl, and from the bootup above.
420 */
421
422 static int
423 e100_set_mac_address(struct net_device *dev, void *p)
424 {
425 struct net_local *np = netdev_priv(dev);
426 struct sockaddr *addr = p;
427
428 spin_lock(&np->lock); /* preemption protection */
429
430 /* remember it */
431
432 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
433
434 /* Write it to the hardware.
435 * Note the way the address is wrapped:
436 * *R_NETWORK_SA_0 = a0_0 | (a0_1 << 8) | (a0_2 << 16) | (a0_3 << 24);
437 * *R_NETWORK_SA_1 = a0_4 | (a0_5 << 8);
438 */
439
440 *R_NETWORK_SA_0 = dev->dev_addr[0] | (dev->dev_addr[1] << 8) |
441 (dev->dev_addr[2] << 16) | (dev->dev_addr[3] << 24);
442 *R_NETWORK_SA_1 = dev->dev_addr[4] | (dev->dev_addr[5] << 8);
443 *R_NETWORK_SA_2 = 0;
444
445 /* show it in the log as well */
446
447 printk(KERN_INFO "%s: changed MAC to %pM\n", dev->name, dev->dev_addr);
448
449 spin_unlock(&np->lock);
450
451 return 0;
452 }
453
454 /*
455 * Open/initialize the board. This is called (in the current kernel)
456 * sometime after booting when the 'ifconfig' program is run.
457 *
458 * This routine should set everything up anew at each open, even
459 * registers that "should" only need to be set once at boot, so that
460 * there is non-reboot way to recover if something goes wrong.
461 */
462
463 static int
464 e100_open(struct net_device *dev)
465 {
466 unsigned long flags;
467
468 /* enable the MDIO output pin */
469
470 *R_NETWORK_MGM_CTRL = IO_STATE(R_NETWORK_MGM_CTRL, mdoe, enable);
471
472 *R_IRQ_MASK0_CLR =
473 IO_STATE(R_IRQ_MASK0_CLR, overrun, clr) |
474 IO_STATE(R_IRQ_MASK0_CLR, underrun, clr) |
475 IO_STATE(R_IRQ_MASK0_CLR, excessive_col, clr);
476
477 /* clear dma0 and 1 eop and descr irq masks */
478 *R_IRQ_MASK2_CLR =
479 IO_STATE(R_IRQ_MASK2_CLR, dma0_descr, clr) |
480 IO_STATE(R_IRQ_MASK2_CLR, dma0_eop, clr) |
481 IO_STATE(R_IRQ_MASK2_CLR, dma1_descr, clr) |
482 IO_STATE(R_IRQ_MASK2_CLR, dma1_eop, clr);
483
484 /* Reset and wait for the DMA channels */
485
486 RESET_DMA(NETWORK_TX_DMA_NBR);
487 RESET_DMA(NETWORK_RX_DMA_NBR);
488 WAIT_DMA(NETWORK_TX_DMA_NBR);
489 WAIT_DMA(NETWORK_RX_DMA_NBR);
490
491 /* Initialise the etrax network controller */
492
493 /* allocate the irq corresponding to the receiving DMA */
494
495 if (request_irq(NETWORK_DMA_RX_IRQ_NBR, e100rxtx_interrupt,
496 IRQF_SAMPLE_RANDOM, cardname, (void *)dev)) {
497 goto grace_exit0;
498 }
499
500 /* allocate the irq corresponding to the transmitting DMA */
501
502 if (request_irq(NETWORK_DMA_TX_IRQ_NBR, e100rxtx_interrupt, 0,
503 cardname, (void *)dev)) {
504 goto grace_exit1;
505 }
506
507 /* allocate the irq corresponding to the network errors etc */
508
509 if (request_irq(NETWORK_STATUS_IRQ_NBR, e100nw_interrupt, 0,
510 cardname, (void *)dev)) {
511 goto grace_exit2;
512 }
513
514 /*
515 * Always allocate the DMA channels after the IRQ,
516 * and clean up on failure.
517 */
518
519 if (cris_request_dma(NETWORK_TX_DMA_NBR,
520 cardname,
521 DMA_VERBOSE_ON_ERROR,
522 dma_eth)) {
523 goto grace_exit3;
524 }
525
526 if (cris_request_dma(NETWORK_RX_DMA_NBR,
527 cardname,
528 DMA_VERBOSE_ON_ERROR,
529 dma_eth)) {
530 goto grace_exit4;
531 }
532
533 /* give the HW an idea of what MAC address we want */
534
535 *R_NETWORK_SA_0 = dev->dev_addr[0] | (dev->dev_addr[1] << 8) |
536 (dev->dev_addr[2] << 16) | (dev->dev_addr[3] << 24);
537 *R_NETWORK_SA_1 = dev->dev_addr[4] | (dev->dev_addr[5] << 8);
538 *R_NETWORK_SA_2 = 0;
539
540 SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, max_size, size1522);
541 SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, broadcast, receive);
542 SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, ma0, enable);
543 SETF(network_rec_config_shadow, R_NETWORK_REC_CONFIG, duplex, full_duplex);
544 *R_NETWORK_REC_CONFIG = network_rec_config_shadow;
545
546 *R_NETWORK_GEN_CONFIG =
547 IO_STATE(R_NETWORK_GEN_CONFIG, phy, mii_clk) |
548 IO_STATE(R_NETWORK_GEN_CONFIG, enable, on);
549
550 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, clr_error, clr);
551 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, delay, none);
552 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, cancel, dont);
553 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, cd, enable);
554 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, retry, enable);
555 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, pad, enable);
556 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, crc, enable);
557 *R_NETWORK_TR_CTRL = network_tr_ctrl_shadow;
558
559 local_irq_save(flags);
560
561 /* enable the irq's for ethernet DMA */
562
563 *R_IRQ_MASK2_SET =
564 IO_STATE(R_IRQ_MASK2_SET, dma0_eop, set) |
565 IO_STATE(R_IRQ_MASK2_SET, dma1_eop, set);
566
567 *R_IRQ_MASK0_SET =
568 IO_STATE(R_IRQ_MASK0_SET, overrun, set) |
569 IO_STATE(R_IRQ_MASK0_SET, underrun, set) |
570 IO_STATE(R_IRQ_MASK0_SET, excessive_col, set);
571
572 /* make sure the irqs are cleared */
573
574 *R_DMA_CH0_CLR_INTR = IO_STATE(R_DMA_CH0_CLR_INTR, clr_eop, do);
575 *R_DMA_CH1_CLR_INTR = IO_STATE(R_DMA_CH1_CLR_INTR, clr_eop, do);
576
577 /* make sure the rec and transmit error counters are cleared */
578
579 (void)*R_REC_COUNTERS; /* dummy read */
580 (void)*R_TR_COUNTERS; /* dummy read */
581
582 /* start the receiving DMA channel so we can receive packets from now on */
583
584 *R_DMA_CH1_FIRST = virt_to_phys(myNextRxDesc);
585 *R_DMA_CH1_CMD = IO_STATE(R_DMA_CH1_CMD, cmd, start);
586
587 /* Set up transmit DMA channel so it can be restarted later */
588
589 *R_DMA_CH0_FIRST = 0;
590 *R_DMA_CH0_DESCR = virt_to_phys(myLastTxDesc);
591 netif_start_queue(dev);
592
593 local_irq_restore(flags);
594
595 /* Probe for transceiver */
596 if (e100_probe_transceiver(dev))
597 goto grace_exit5;
598
599 /* Start duplex/speed timers */
600 add_timer(&speed_timer);
601 add_timer(&duplex_timer);
602
603 /* We are now ready to accept transmit requeusts from
604 * the queueing layer of the networking.
605 */
606 netif_carrier_on(dev);
607
608 return 0;
609
610 grace_exit5:
611 cris_free_dma(NETWORK_RX_DMA_NBR, cardname);
612 grace_exit4:
613 cris_free_dma(NETWORK_TX_DMA_NBR, cardname);
614 grace_exit3:
615 free_irq(NETWORK_STATUS_IRQ_NBR, (void *)dev);
616 grace_exit2:
617 free_irq(NETWORK_DMA_TX_IRQ_NBR, (void *)dev);
618 grace_exit1:
619 free_irq(NETWORK_DMA_RX_IRQ_NBR, (void *)dev);
620 grace_exit0:
621 return -EAGAIN;
622 }
623
624 #if defined(CONFIG_ETRAX_NO_PHY)
625 static void
626 dummy_check_speed(struct net_device* dev)
627 {
628 current_speed = 100;
629 }
630 #else
631 static void
632 generic_check_speed(struct net_device* dev)
633 {
634 unsigned long data;
635 struct net_local *np = netdev_priv(dev);
636
637 data = e100_get_mdio_reg(dev, np->mii_if.phy_id, MII_ADVERTISE);
638 if ((data & ADVERTISE_100FULL) ||
639 (data & ADVERTISE_100HALF))
640 current_speed = 100;
641 else
642 current_speed = 10;
643 }
644
645 static void
646 tdk_check_speed(struct net_device* dev)
647 {
648 unsigned long data;
649 struct net_local *np = netdev_priv(dev);
650
651 data = e100_get_mdio_reg(dev, np->mii_if.phy_id,
652 MDIO_TDK_DIAGNOSTIC_REG);
653 current_speed = (data & MDIO_TDK_DIAGNOSTIC_RATE ? 100 : 10);
654 }
655
656 static void
657 broadcom_check_speed(struct net_device* dev)
658 {
659 unsigned long data;
660 struct net_local *np = netdev_priv(dev);
661
662 data = e100_get_mdio_reg(dev, np->mii_if.phy_id,
663 MDIO_AUX_CTRL_STATUS_REG);
664 current_speed = (data & MDIO_BC_SPEED ? 100 : 10);
665 }
666
667 static void
668 intel_check_speed(struct net_device* dev)
669 {
670 unsigned long data;
671 struct net_local *np = netdev_priv(dev);
672
673 data = e100_get_mdio_reg(dev, np->mii_if.phy_id,
674 MDIO_INT_STATUS_REG_2);
675 current_speed = (data & MDIO_INT_SPEED ? 100 : 10);
676 }
677 #endif
678 static void
679 e100_check_speed(unsigned long priv)
680 {
681 struct net_device* dev = (struct net_device*)priv;
682 struct net_local *np = netdev_priv(dev);
683 static int led_initiated = 0;
684 unsigned long data;
685 int old_speed = current_speed;
686
687 spin_lock(&np->transceiver_lock);
688
689 data = e100_get_mdio_reg(dev, np->mii_if.phy_id, MII_BMSR);
690 if (!(data & BMSR_LSTATUS)) {
691 current_speed = 0;
692 } else {
693 transceiver->check_speed(dev);
694 }
695
696 spin_lock(&np->led_lock);
697 if ((old_speed != current_speed) || !led_initiated) {
698 led_initiated = 1;
699 e100_set_network_leds(NO_NETWORK_ACTIVITY);
700 if (current_speed)
701 netif_carrier_on(dev);
702 else
703 netif_carrier_off(dev);
704 }
705 spin_unlock(&np->led_lock);
706
707 /* Reinitialize the timer. */
708 speed_timer.expires = jiffies + NET_LINK_UP_CHECK_INTERVAL;
709 add_timer(&speed_timer);
710
711 spin_unlock(&np->transceiver_lock);
712 }
713
714 static void
715 e100_negotiate(struct net_device* dev)
716 {
717 struct net_local *np = netdev_priv(dev);
718 unsigned short data = e100_get_mdio_reg(dev, np->mii_if.phy_id,
719 MII_ADVERTISE);
720
721 /* Discard old speed and duplex settings */
722 data &= ~(ADVERTISE_100HALF | ADVERTISE_100FULL |
723 ADVERTISE_10HALF | ADVERTISE_10FULL);
724
725 switch (current_speed_selection) {
726 case 10:
727 if (current_duplex == full)
728 data |= ADVERTISE_10FULL;
729 else if (current_duplex == half)
730 data |= ADVERTISE_10HALF;
731 else
732 data |= ADVERTISE_10HALF | ADVERTISE_10FULL;
733 break;
734
735 case 100:
736 if (current_duplex == full)
737 data |= ADVERTISE_100FULL;
738 else if (current_duplex == half)
739 data |= ADVERTISE_100HALF;
740 else
741 data |= ADVERTISE_100HALF | ADVERTISE_100FULL;
742 break;
743
744 case 0: /* Auto */
745 if (current_duplex == full)
746 data |= ADVERTISE_100FULL | ADVERTISE_10FULL;
747 else if (current_duplex == half)
748 data |= ADVERTISE_100HALF | ADVERTISE_10HALF;
749 else
750 data |= ADVERTISE_10HALF | ADVERTISE_10FULL |
751 ADVERTISE_100HALF | ADVERTISE_100FULL;
752 break;
753
754 default: /* assume autoneg speed and duplex */
755 data |= ADVERTISE_10HALF | ADVERTISE_10FULL |
756 ADVERTISE_100HALF | ADVERTISE_100FULL;
757 break;
758 }
759
760 e100_set_mdio_reg(dev, np->mii_if.phy_id, MII_ADVERTISE, data);
761
762 data = e100_get_mdio_reg(dev, np->mii_if.phy_id, MII_BMCR);
763 if (autoneg_normal) {
764 /* Renegotiate with link partner */
765 data |= BMCR_ANENABLE | BMCR_ANRESTART;
766 } else {
767 /* Don't negotiate speed or duplex */
768 data &= ~(BMCR_ANENABLE | BMCR_ANRESTART);
769
770 /* Set speed and duplex static */
771 if (current_speed_selection == 10)
772 data &= ~BMCR_SPEED100;
773 else
774 data |= BMCR_SPEED100;
775
776 if (current_duplex != full)
777 data &= ~BMCR_FULLDPLX;
778 else
779 data |= BMCR_FULLDPLX;
780 }
781 e100_set_mdio_reg(dev, np->mii_if.phy_id, MII_BMCR, data);
782 }
783
784 static void
785 e100_set_speed(struct net_device* dev, unsigned long speed)
786 {
787 struct net_local *np = netdev_priv(dev);
788
789 spin_lock(&np->transceiver_lock);
790 if (speed != current_speed_selection) {
791 current_speed_selection = speed;
792 e100_negotiate(dev);
793 }
794 spin_unlock(&np->transceiver_lock);
795 }
796
797 static void
798 e100_check_duplex(unsigned long priv)
799 {
800 struct net_device *dev = (struct net_device *)priv;
801 struct net_local *np = netdev_priv(dev);
802 int old_duplex;
803
804 spin_lock(&np->transceiver_lock);
805 old_duplex = full_duplex;
806 transceiver->check_duplex(dev);
807 if (old_duplex != full_duplex) {
808 /* Duplex changed */
809 SETF(network_rec_config_shadow, R_NETWORK_REC_CONFIG, duplex, full_duplex);
810 *R_NETWORK_REC_CONFIG = network_rec_config_shadow;
811 }
812
813 /* Reinitialize the timer. */
814 duplex_timer.expires = jiffies + NET_DUPLEX_CHECK_INTERVAL;
815 add_timer(&duplex_timer);
816 np->mii_if.full_duplex = full_duplex;
817 spin_unlock(&np->transceiver_lock);
818 }
819 #if defined(CONFIG_ETRAX_NO_PHY)
820 static void
821 dummy_check_duplex(struct net_device* dev)
822 {
823 full_duplex = 1;
824 }
825 #else
826 static void
827 generic_check_duplex(struct net_device* dev)
828 {
829 unsigned long data;
830 struct net_local *np = netdev_priv(dev);
831
832 data = e100_get_mdio_reg(dev, np->mii_if.phy_id, MII_ADVERTISE);
833 if ((data & ADVERTISE_10FULL) ||
834 (data & ADVERTISE_100FULL))
835 full_duplex = 1;
836 else
837 full_duplex = 0;
838 }
839
840 static void
841 tdk_check_duplex(struct net_device* dev)
842 {
843 unsigned long data;
844 struct net_local *np = netdev_priv(dev);
845
846 data = e100_get_mdio_reg(dev, np->mii_if.phy_id,
847 MDIO_TDK_DIAGNOSTIC_REG);
848 full_duplex = (data & MDIO_TDK_DIAGNOSTIC_DPLX) ? 1 : 0;
849 }
850
851 static void
852 broadcom_check_duplex(struct net_device* dev)
853 {
854 unsigned long data;
855 struct net_local *np = netdev_priv(dev);
856
857 data = e100_get_mdio_reg(dev, np->mii_if.phy_id,
858 MDIO_AUX_CTRL_STATUS_REG);
859 full_duplex = (data & MDIO_BC_FULL_DUPLEX_IND) ? 1 : 0;
860 }
861
862 static void
863 intel_check_duplex(struct net_device* dev)
864 {
865 unsigned long data;
866 struct net_local *np = netdev_priv(dev);
867
868 data = e100_get_mdio_reg(dev, np->mii_if.phy_id,
869 MDIO_INT_STATUS_REG_2);
870 full_duplex = (data & MDIO_INT_FULL_DUPLEX_IND) ? 1 : 0;
871 }
872 #endif
873 static void
874 e100_set_duplex(struct net_device* dev, enum duplex new_duplex)
875 {
876 struct net_local *np = netdev_priv(dev);
877
878 spin_lock(&np->transceiver_lock);
879 if (new_duplex != current_duplex) {
880 current_duplex = new_duplex;
881 e100_negotiate(dev);
882 }
883 spin_unlock(&np->transceiver_lock);
884 }
885
886 static int
887 e100_probe_transceiver(struct net_device* dev)
888 {
889 int ret = 0;
890
891 #if !defined(CONFIG_ETRAX_NO_PHY)
892 unsigned int phyid_high;
893 unsigned int phyid_low;
894 unsigned int oui;
895 struct transceiver_ops* ops = NULL;
896 struct net_local *np = netdev_priv(dev);
897
898 spin_lock(&np->transceiver_lock);
899
900 /* Probe MDIO physical address */
901 for (np->mii_if.phy_id = 0; np->mii_if.phy_id <= 31;
902 np->mii_if.phy_id++) {
903 if (e100_get_mdio_reg(dev,
904 np->mii_if.phy_id, MII_BMSR) != 0xffff)
905 break;
906 }
907 if (np->mii_if.phy_id == 32) {
908 ret = -ENODEV;
909 goto out;
910 }
911
912 /* Get manufacturer */
913 phyid_high = e100_get_mdio_reg(dev, np->mii_if.phy_id, MII_PHYSID1);
914 phyid_low = e100_get_mdio_reg(dev, np->mii_if.phy_id, MII_PHYSID2);
915 oui = (phyid_high << 6) | (phyid_low >> 10);
916
917 for (ops = &transceivers[0]; ops->oui; ops++) {
918 if (ops->oui == oui)
919 break;
920 }
921 transceiver = ops;
922 out:
923 spin_unlock(&np->transceiver_lock);
924 #endif
925 return ret;
926 }
927
928 static int
929 e100_get_mdio_reg(struct net_device *dev, int phy_id, int location)
930 {
931 unsigned short cmd; /* Data to be sent on MDIO port */
932 int data; /* Data read from MDIO */
933 int bitCounter;
934
935 /* Start of frame, OP Code, Physical Address, Register Address */
936 cmd = (MDIO_START << 14) | (MDIO_READ << 12) | (phy_id << 7) |
937 (location << 2);
938
939 e100_send_mdio_cmd(cmd, 0);
940
941 data = 0;
942
943 /* Data... */
944 for (bitCounter=15; bitCounter>=0 ; bitCounter--) {
945 data |= (e100_receive_mdio_bit() << bitCounter);
946 }
947
948 return data;
949 }
950
951 static void
952 e100_set_mdio_reg(struct net_device *dev, int phy_id, int location, int value)
953 {
954 int bitCounter;
955 unsigned short cmd;
956
957 cmd = (MDIO_START << 14) | (MDIO_WRITE << 12) | (phy_id << 7) |
958 (location << 2);
959
960 e100_send_mdio_cmd(cmd, 1);
961
962 /* Data... */
963 for (bitCounter=15; bitCounter>=0 ; bitCounter--) {
964 e100_send_mdio_bit(GET_BIT(bitCounter, value));
965 }
966
967 }
968
969 static void
970 e100_send_mdio_cmd(unsigned short cmd, int write_cmd)
971 {
972 int bitCounter;
973 unsigned char data = 0x2;
974
975 /* Preamble */
976 for (bitCounter = 31; bitCounter>= 0; bitCounter--)
977 e100_send_mdio_bit(GET_BIT(bitCounter, MDIO_PREAMBLE));
978
979 for (bitCounter = 15; bitCounter >= 2; bitCounter--)
980 e100_send_mdio_bit(GET_BIT(bitCounter, cmd));
981
982 /* Turnaround */
983 for (bitCounter = 1; bitCounter >= 0 ; bitCounter--)
984 if (write_cmd)
985 e100_send_mdio_bit(GET_BIT(bitCounter, data));
986 else
987 e100_receive_mdio_bit();
988 }
989
990 static void
991 e100_send_mdio_bit(unsigned char bit)
992 {
993 *R_NETWORK_MGM_CTRL =
994 IO_STATE(R_NETWORK_MGM_CTRL, mdoe, enable) |
995 IO_FIELD(R_NETWORK_MGM_CTRL, mdio, bit);
996 udelay(1);
997 *R_NETWORK_MGM_CTRL =
998 IO_STATE(R_NETWORK_MGM_CTRL, mdoe, enable) |
999 IO_MASK(R_NETWORK_MGM_CTRL, mdck) |
1000 IO_FIELD(R_NETWORK_MGM_CTRL, mdio, bit);
1001 udelay(1);
1002 }
1003
1004 static unsigned char
1005 e100_receive_mdio_bit()
1006 {
1007 unsigned char bit;
1008 *R_NETWORK_MGM_CTRL = 0;
1009 bit = IO_EXTRACT(R_NETWORK_STAT, mdio, *R_NETWORK_STAT);
1010 udelay(1);
1011 *R_NETWORK_MGM_CTRL = IO_MASK(R_NETWORK_MGM_CTRL, mdck);
1012 udelay(1);
1013 return bit;
1014 }
1015
1016 static void
1017 e100_reset_transceiver(struct net_device* dev)
1018 {
1019 struct net_local *np = netdev_priv(dev);
1020 unsigned short cmd;
1021 unsigned short data;
1022 int bitCounter;
1023
1024 data = e100_get_mdio_reg(dev, np->mii_if.phy_id, MII_BMCR);
1025
1026 cmd = (MDIO_START << 14) | (MDIO_WRITE << 12) | (np->mii_if.phy_id << 7) | (MII_BMCR << 2);
1027
1028 e100_send_mdio_cmd(cmd, 1);
1029
1030 data |= 0x8000;
1031
1032 for (bitCounter = 15; bitCounter >= 0 ; bitCounter--) {
1033 e100_send_mdio_bit(GET_BIT(bitCounter, data));
1034 }
1035 }
1036
1037 /* Called by upper layers if they decide it took too long to complete
1038 * sending a packet - we need to reset and stuff.
1039 */
1040
1041 static void
1042 e100_tx_timeout(struct net_device *dev)
1043 {
1044 struct net_local *np = netdev_priv(dev);
1045 unsigned long flags;
1046
1047 spin_lock_irqsave(&np->lock, flags);
1048
1049 printk(KERN_WARNING "%s: transmit timed out, %s?\n", dev->name,
1050 tx_done(dev) ? "IRQ problem" : "network cable problem");
1051
1052 /* remember we got an error */
1053
1054 np->stats.tx_errors++;
1055
1056 /* reset the TX DMA in case it has hung on something */
1057
1058 RESET_DMA(NETWORK_TX_DMA_NBR);
1059 WAIT_DMA(NETWORK_TX_DMA_NBR);
1060
1061 /* Reset the transceiver. */
1062
1063 e100_reset_transceiver(dev);
1064
1065 /* and get rid of the packets that never got an interrupt */
1066 while (myFirstTxDesc != myNextTxDesc) {
1067 dev_kfree_skb(myFirstTxDesc->skb);
1068 myFirstTxDesc->skb = 0;
1069 myFirstTxDesc = phys_to_virt(myFirstTxDesc->descr.next);
1070 }
1071
1072 /* Set up transmit DMA channel so it can be restarted later */
1073 *R_DMA_CH0_FIRST = 0;
1074 *R_DMA_CH0_DESCR = virt_to_phys(myLastTxDesc);
1075
1076 /* tell the upper layers we're ok again */
1077
1078 netif_wake_queue(dev);
1079 spin_unlock_irqrestore(&np->lock, flags);
1080 }
1081
1082
1083 /* This will only be invoked if the driver is _not_ in XOFF state.
1084 * What this means is that we need not check it, and that this
1085 * invariant will hold if we make sure that the netif_*_queue()
1086 * calls are done at the proper times.
1087 */
1088
1089 static int
1090 e100_send_packet(struct sk_buff *skb, struct net_device *dev)
1091 {
1092 struct net_local *np = netdev_priv(dev);
1093 unsigned char *buf = skb->data;
1094 unsigned long flags;
1095
1096 #ifdef ETHDEBUG
1097 printk("send packet len %d\n", length);
1098 #endif
1099 spin_lock_irqsave(&np->lock, flags); /* protect from tx_interrupt and ourself */
1100
1101 myNextTxDesc->skb = skb;
1102
1103 dev->trans_start = jiffies; /* NETIF_F_LLTX driver :( */
1104
1105 e100_hardware_send_packet(np, buf, skb->len);
1106
1107 myNextTxDesc = phys_to_virt(myNextTxDesc->descr.next);
1108
1109 /* Stop queue if full */
1110 if (myNextTxDesc == myFirstTxDesc) {
1111 netif_stop_queue(dev);
1112 }
1113
1114 spin_unlock_irqrestore(&np->lock, flags);
1115
1116 return NETDEV_TX_OK;
1117 }
1118
1119 /*
1120 * The typical workload of the driver:
1121 * Handle the network interface interrupts.
1122 */
1123
1124 static irqreturn_t
1125 e100rxtx_interrupt(int irq, void *dev_id)
1126 {
1127 struct net_device *dev = (struct net_device *)dev_id;
1128 struct net_local *np = netdev_priv(dev);
1129 unsigned long irqbits;
1130
1131 /*
1132 * Note that both rx and tx interrupts are blocked at this point,
1133 * regardless of which got us here.
1134 */
1135
1136 irqbits = *R_IRQ_MASK2_RD;
1137
1138 /* Handle received packets */
1139 if (irqbits & IO_STATE(R_IRQ_MASK2_RD, dma1_eop, active)) {
1140 /* acknowledge the eop interrupt */
1141
1142 *R_DMA_CH1_CLR_INTR = IO_STATE(R_DMA_CH1_CLR_INTR, clr_eop, do);
1143
1144 /* check if one or more complete packets were indeed received */
1145
1146 while ((*R_DMA_CH1_FIRST != virt_to_phys(myNextRxDesc)) &&
1147 (myNextRxDesc != myLastRxDesc)) {
1148 /* Take out the buffer and give it to the OS, then
1149 * allocate a new buffer to put a packet in.
1150 */
1151 e100_rx(dev);
1152 np->stats.rx_packets++;
1153 /* restart/continue on the channel, for safety */
1154 *R_DMA_CH1_CMD = IO_STATE(R_DMA_CH1_CMD, cmd, restart);
1155 /* clear dma channel 1 eop/descr irq bits */
1156 *R_DMA_CH1_CLR_INTR =
1157 IO_STATE(R_DMA_CH1_CLR_INTR, clr_eop, do) |
1158 IO_STATE(R_DMA_CH1_CLR_INTR, clr_descr, do);
1159
1160 /* now, we might have gotten another packet
1161 so we have to loop back and check if so */
1162 }
1163 }
1164
1165 /* Report any packets that have been sent */
1166 while (virt_to_phys(myFirstTxDesc) != *R_DMA_CH0_FIRST &&
1167 (netif_queue_stopped(dev) || myFirstTxDesc != myNextTxDesc)) {
1168 np->stats.tx_bytes += myFirstTxDesc->skb->len;
1169 np->stats.tx_packets++;
1170
1171 /* dma is ready with the transmission of the data in tx_skb, so now
1172 we can release the skb memory */
1173 dev_kfree_skb_irq(myFirstTxDesc->skb);
1174 myFirstTxDesc->skb = 0;
1175 myFirstTxDesc = phys_to_virt(myFirstTxDesc->descr.next);
1176 /* Wake up queue. */
1177 netif_wake_queue(dev);
1178 }
1179
1180 if (irqbits & IO_STATE(R_IRQ_MASK2_RD, dma0_eop, active)) {
1181 /* acknowledge the eop interrupt. */
1182 *R_DMA_CH0_CLR_INTR = IO_STATE(R_DMA_CH0_CLR_INTR, clr_eop, do);
1183 }
1184
1185 return IRQ_HANDLED;
1186 }
1187
1188 static irqreturn_t
1189 e100nw_interrupt(int irq, void *dev_id)
1190 {
1191 struct net_device *dev = (struct net_device *)dev_id;
1192 struct net_local *np = netdev_priv(dev);
1193 unsigned long irqbits = *R_IRQ_MASK0_RD;
1194
1195 /* check for underrun irq */
1196 if (irqbits & IO_STATE(R_IRQ_MASK0_RD, underrun, active)) {
1197 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, clr_error, clr);
1198 *R_NETWORK_TR_CTRL = network_tr_ctrl_shadow;
1199 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, clr_error, nop);
1200 np->stats.tx_errors++;
1201 D(printk("ethernet receiver underrun!\n"));
1202 }
1203
1204 /* check for overrun irq */
1205 if (irqbits & IO_STATE(R_IRQ_MASK0_RD, overrun, active)) {
1206 update_rx_stats(&np->stats); /* this will ack the irq */
1207 D(printk("ethernet receiver overrun!\n"));
1208 }
1209 /* check for excessive collision irq */
1210 if (irqbits & IO_STATE(R_IRQ_MASK0_RD, excessive_col, active)) {
1211 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, clr_error, clr);
1212 *R_NETWORK_TR_CTRL = network_tr_ctrl_shadow;
1213 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, clr_error, nop);
1214 np->stats.tx_errors++;
1215 D(printk("ethernet excessive collisions!\n"));
1216 }
1217 return IRQ_HANDLED;
1218 }
1219
1220 /* We have a good packet(s), get it/them out of the buffers. */
1221 static void
1222 e100_rx(struct net_device *dev)
1223 {
1224 struct sk_buff *skb;
1225 int length = 0;
1226 struct net_local *np = netdev_priv(dev);
1227 unsigned char *skb_data_ptr;
1228 #ifdef ETHDEBUG
1229 int i;
1230 #endif
1231 etrax_eth_descr *prevRxDesc; /* The descriptor right before myNextRxDesc */
1232 spin_lock(&np->led_lock);
1233 if (!led_active && time_after(jiffies, led_next_time)) {
1234 /* light the network leds depending on the current speed. */
1235 e100_set_network_leds(NETWORK_ACTIVITY);
1236
1237 /* Set the earliest time we may clear the LED */
1238 led_next_time = jiffies + NET_FLASH_TIME;
1239 led_active = 1;
1240 mod_timer(&clear_led_timer, jiffies + HZ/10);
1241 }
1242 spin_unlock(&np->led_lock);
1243
1244 length = myNextRxDesc->descr.hw_len - 4;
1245 np->stats.rx_bytes += length;
1246
1247 #ifdef ETHDEBUG
1248 printk("Got a packet of length %d:\n", length);
1249 /* dump the first bytes in the packet */
1250 skb_data_ptr = (unsigned char *)phys_to_virt(myNextRxDesc->descr.buf);
1251 for (i = 0; i < 8; i++) {
1252 printk("%d: %.2x %.2x %.2x %.2x %.2x %.2x %.2x %.2x\n", i * 8,
1253 skb_data_ptr[0],skb_data_ptr[1],skb_data_ptr[2],skb_data_ptr[3],
1254 skb_data_ptr[4],skb_data_ptr[5],skb_data_ptr[6],skb_data_ptr[7]);
1255 skb_data_ptr += 8;
1256 }
1257 #endif
1258
1259 if (length < RX_COPYBREAK) {
1260 /* Small packet, copy data */
1261 skb = dev_alloc_skb(length - ETHER_HEAD_LEN);
1262 if (!skb) {
1263 np->stats.rx_errors++;
1264 printk(KERN_NOTICE "%s: Memory squeeze, dropping packet.\n", dev->name);
1265 goto update_nextrxdesc;
1266 }
1267
1268 skb_put(skb, length - ETHER_HEAD_LEN); /* allocate room for the packet body */
1269 skb_data_ptr = skb_push(skb, ETHER_HEAD_LEN); /* allocate room for the header */
1270
1271 #ifdef ETHDEBUG
1272 printk("head = 0x%x, data = 0x%x, tail = 0x%x, end = 0x%x\n",
1273 skb->head, skb->data, skb_tail_pointer(skb),
1274 skb_end_pointer(skb));
1275 printk("copying packet to 0x%x.\n", skb_data_ptr);
1276 #endif
1277
1278 memcpy(skb_data_ptr, phys_to_virt(myNextRxDesc->descr.buf), length);
1279 }
1280 else {
1281 /* Large packet, send directly to upper layers and allocate new
1282 * memory (aligned to cache line boundary to avoid bug).
1283 * Before sending the skb to upper layers we must make sure
1284 * that skb->data points to the aligned start of the packet.
1285 */
1286 int align;
1287 struct sk_buff *new_skb = dev_alloc_skb(MAX_MEDIA_DATA_SIZE + 2 * L1_CACHE_BYTES);
1288 if (!new_skb) {
1289 np->stats.rx_errors++;
1290 printk(KERN_NOTICE "%s: Memory squeeze, dropping packet.\n", dev->name);
1291 goto update_nextrxdesc;
1292 }
1293 skb = myNextRxDesc->skb;
1294 align = (int)phys_to_virt(myNextRxDesc->descr.buf) - (int)skb->data;
1295 skb_put(skb, length + align);
1296 skb_pull(skb, align); /* Remove alignment bytes */
1297 myNextRxDesc->skb = new_skb;
1298 myNextRxDesc->descr.buf = L1_CACHE_ALIGN(virt_to_phys(myNextRxDesc->skb->data));
1299 }
1300
1301 skb->protocol = eth_type_trans(skb, dev);
1302
1303 /* Send the packet to the upper layers */
1304 netif_rx(skb);
1305
1306 update_nextrxdesc:
1307 /* Prepare for next packet */
1308 myNextRxDesc->descr.status = 0;
1309 prevRxDesc = myNextRxDesc;
1310 myNextRxDesc = phys_to_virt(myNextRxDesc->descr.next);
1311
1312 rx_queue_len++;
1313
1314 /* Check if descriptors should be returned */
1315 if (rx_queue_len == RX_QUEUE_THRESHOLD) {
1316 flush_etrax_cache();
1317 prevRxDesc->descr.ctrl |= d_eol;
1318 myLastRxDesc->descr.ctrl &= ~d_eol;
1319 myLastRxDesc = prevRxDesc;
1320 rx_queue_len = 0;
1321 }
1322 }
1323
1324 /* The inverse routine to net_open(). */
1325 static int
1326 e100_close(struct net_device *dev)
1327 {
1328 struct net_local *np = netdev_priv(dev);
1329
1330 printk(KERN_INFO "Closing %s.\n", dev->name);
1331
1332 netif_stop_queue(dev);
1333
1334 *R_IRQ_MASK0_CLR =
1335 IO_STATE(R_IRQ_MASK0_CLR, overrun, clr) |
1336 IO_STATE(R_IRQ_MASK0_CLR, underrun, clr) |
1337 IO_STATE(R_IRQ_MASK0_CLR, excessive_col, clr);
1338
1339 *R_IRQ_MASK2_CLR =
1340 IO_STATE(R_IRQ_MASK2_CLR, dma0_descr, clr) |
1341 IO_STATE(R_IRQ_MASK2_CLR, dma0_eop, clr) |
1342 IO_STATE(R_IRQ_MASK2_CLR, dma1_descr, clr) |
1343 IO_STATE(R_IRQ_MASK2_CLR, dma1_eop, clr);
1344
1345 /* Stop the receiver and the transmitter */
1346
1347 RESET_DMA(NETWORK_TX_DMA_NBR);
1348 RESET_DMA(NETWORK_RX_DMA_NBR);
1349
1350 /* Flush the Tx and disable Rx here. */
1351
1352 free_irq(NETWORK_DMA_RX_IRQ_NBR, (void *)dev);
1353 free_irq(NETWORK_DMA_TX_IRQ_NBR, (void *)dev);
1354 free_irq(NETWORK_STATUS_IRQ_NBR, (void *)dev);
1355
1356 cris_free_dma(NETWORK_TX_DMA_NBR, cardname);
1357 cris_free_dma(NETWORK_RX_DMA_NBR, cardname);
1358
1359 /* Update the statistics here. */
1360
1361 update_rx_stats(&np->stats);
1362 update_tx_stats(&np->stats);
1363
1364 /* Stop speed/duplex timers */
1365 del_timer(&speed_timer);
1366 del_timer(&duplex_timer);
1367
1368 return 0;
1369 }
1370
1371 static int
1372 e100_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
1373 {
1374 struct mii_ioctl_data *data = if_mii(ifr);
1375 struct net_local *np = netdev_priv(dev);
1376 int rc = 0;
1377 int old_autoneg;
1378
1379 spin_lock(&np->lock); /* Preempt protection */
1380 switch (cmd) {
1381 /* The ioctls below should be considered obsolete but are */
1382 /* still present for compatability with old scripts/apps */
1383 case SET_ETH_SPEED_10: /* 10 Mbps */
1384 e100_set_speed(dev, 10);
1385 break;
1386 case SET_ETH_SPEED_100: /* 100 Mbps */
1387 e100_set_speed(dev, 100);
1388 break;
1389 case SET_ETH_SPEED_AUTO: /* Auto-negotiate speed */
1390 e100_set_speed(dev, 0);
1391 break;
1392 case SET_ETH_DUPLEX_HALF: /* Half duplex */
1393 e100_set_duplex(dev, half);
1394 break;
1395 case SET_ETH_DUPLEX_FULL: /* Full duplex */
1396 e100_set_duplex(dev, full);
1397 break;
1398 case SET_ETH_DUPLEX_AUTO: /* Auto-negotiate duplex */
1399 e100_set_duplex(dev, autoneg);
1400 break;
1401 case SET_ETH_AUTONEG:
1402 old_autoneg = autoneg_normal;
1403 autoneg_normal = *(int*)data;
1404 if (autoneg_normal != old_autoneg)
1405 e100_negotiate(dev);
1406 break;
1407 default:
1408 rc = generic_mii_ioctl(&np->mii_if, if_mii(ifr),
1409 cmd, NULL);
1410 break;
1411 }
1412 spin_unlock(&np->lock);
1413 return rc;
1414 }
1415
1416 static int e100_get_settings(struct net_device *dev,
1417 struct ethtool_cmd *cmd)
1418 {
1419 struct net_local *np = netdev_priv(dev);
1420 int err;
1421
1422 spin_lock_irq(&np->lock);
1423 err = mii_ethtool_gset(&np->mii_if, cmd);
1424 spin_unlock_irq(&np->lock);
1425
1426 /* The PHY may support 1000baseT, but the Etrax100 does not. */
1427 cmd->supported &= ~(SUPPORTED_1000baseT_Half
1428 | SUPPORTED_1000baseT_Full);
1429 return err;
1430 }
1431
1432 static int e100_set_settings(struct net_device *dev,
1433 struct ethtool_cmd *ecmd)
1434 {
1435 if (ecmd->autoneg == AUTONEG_ENABLE) {
1436 e100_set_duplex(dev, autoneg);
1437 e100_set_speed(dev, 0);
1438 } else {
1439 e100_set_duplex(dev, ecmd->duplex == DUPLEX_HALF ? half : full);
1440 e100_set_speed(dev, ecmd->speed == SPEED_10 ? 10: 100);
1441 }
1442
1443 return 0;
1444 }
1445
1446 static void e100_get_drvinfo(struct net_device *dev,
1447 struct ethtool_drvinfo *info)
1448 {
1449 strncpy(info->driver, "ETRAX 100LX", sizeof(info->driver) - 1);
1450 strncpy(info->version, "$Revision: 1.31 $", sizeof(info->version) - 1);
1451 strncpy(info->fw_version, "N/A", sizeof(info->fw_version) - 1);
1452 strncpy(info->bus_info, "N/A", sizeof(info->bus_info) - 1);
1453 }
1454
1455 static int e100_nway_reset(struct net_device *dev)
1456 {
1457 if (current_duplex == autoneg && current_speed_selection == 0)
1458 e100_negotiate(dev);
1459 return 0;
1460 }
1461
1462 static const struct ethtool_ops e100_ethtool_ops = {
1463 .get_settings = e100_get_settings,
1464 .set_settings = e100_set_settings,
1465 .get_drvinfo = e100_get_drvinfo,
1466 .nway_reset = e100_nway_reset,
1467 .get_link = ethtool_op_get_link,
1468 };
1469
1470 static int
1471 e100_set_config(struct net_device *dev, struct ifmap *map)
1472 {
1473 struct net_local *np = netdev_priv(dev);
1474
1475 spin_lock(&np->lock); /* Preempt protection */
1476
1477 switch(map->port) {
1478 case IF_PORT_UNKNOWN:
1479 /* Use autoneg */
1480 e100_set_speed(dev, 0);
1481 e100_set_duplex(dev, autoneg);
1482 break;
1483 case IF_PORT_10BASET:
1484 e100_set_speed(dev, 10);
1485 e100_set_duplex(dev, autoneg);
1486 break;
1487 case IF_PORT_100BASET:
1488 case IF_PORT_100BASETX:
1489 e100_set_speed(dev, 100);
1490 e100_set_duplex(dev, autoneg);
1491 break;
1492 case IF_PORT_100BASEFX:
1493 case IF_PORT_10BASE2:
1494 case IF_PORT_AUI:
1495 spin_unlock(&np->lock);
1496 return -EOPNOTSUPP;
1497 break;
1498 default:
1499 printk(KERN_ERR "%s: Invalid media selected", dev->name);
1500 spin_unlock(&np->lock);
1501 return -EINVAL;
1502 }
1503 spin_unlock(&np->lock);
1504 return 0;
1505 }
1506
1507 static void
1508 update_rx_stats(struct net_device_stats *es)
1509 {
1510 unsigned long r = *R_REC_COUNTERS;
1511 /* update stats relevant to reception errors */
1512 es->rx_fifo_errors += IO_EXTRACT(R_REC_COUNTERS, congestion, r);
1513 es->rx_crc_errors += IO_EXTRACT(R_REC_COUNTERS, crc_error, r);
1514 es->rx_frame_errors += IO_EXTRACT(R_REC_COUNTERS, alignment_error, r);
1515 es->rx_length_errors += IO_EXTRACT(R_REC_COUNTERS, oversize, r);
1516 }
1517
1518 static void
1519 update_tx_stats(struct net_device_stats *es)
1520 {
1521 unsigned long r = *R_TR_COUNTERS;
1522 /* update stats relevant to transmission errors */
1523 es->collisions +=
1524 IO_EXTRACT(R_TR_COUNTERS, single_col, r) +
1525 IO_EXTRACT(R_TR_COUNTERS, multiple_col, r);
1526 }
1527
1528 /*
1529 * Get the current statistics.
1530 * This may be called with the card open or closed.
1531 */
1532 static struct net_device_stats *
1533 e100_get_stats(struct net_device *dev)
1534 {
1535 struct net_local *lp = netdev_priv(dev);
1536 unsigned long flags;
1537
1538 spin_lock_irqsave(&lp->lock, flags);
1539
1540 update_rx_stats(&lp->stats);
1541 update_tx_stats(&lp->stats);
1542
1543 spin_unlock_irqrestore(&lp->lock, flags);
1544 return &lp->stats;
1545 }
1546
1547 /*
1548 * Set or clear the multicast filter for this adaptor.
1549 * num_addrs == -1 Promiscuous mode, receive all packets
1550 * num_addrs == 0 Normal mode, clear multicast list
1551 * num_addrs > 0 Multicast mode, receive normal and MC packets,
1552 * and do best-effort filtering.
1553 */
1554 static void
1555 set_multicast_list(struct net_device *dev)
1556 {
1557 struct net_local *lp = netdev_priv(dev);
1558 int num_addr = netdev_mc_count(dev);
1559 unsigned long int lo_bits;
1560 unsigned long int hi_bits;
1561
1562 spin_lock(&lp->lock);
1563 if (dev->flags & IFF_PROMISC) {
1564 /* promiscuous mode */
1565 lo_bits = 0xfffffffful;
1566 hi_bits = 0xfffffffful;
1567
1568 /* Enable individual receive */
1569 SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, individual, receive);
1570 *R_NETWORK_REC_CONFIG = network_rec_config_shadow;
1571 } else if (dev->flags & IFF_ALLMULTI) {
1572 /* enable all multicasts */
1573 lo_bits = 0xfffffffful;
1574 hi_bits = 0xfffffffful;
1575
1576 /* Disable individual receive */
1577 SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, individual, discard);
1578 *R_NETWORK_REC_CONFIG = network_rec_config_shadow;
1579 } else if (num_addr == 0) {
1580 /* Normal, clear the mc list */
1581 lo_bits = 0x00000000ul;
1582 hi_bits = 0x00000000ul;
1583
1584 /* Disable individual receive */
1585 SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, individual, discard);
1586 *R_NETWORK_REC_CONFIG = network_rec_config_shadow;
1587 } else {
1588 /* MC mode, receive normal and MC packets */
1589 char hash_ix;
1590 struct netdev_hw_addr *ha;
1591 char *baddr;
1592
1593 lo_bits = 0x00000000ul;
1594 hi_bits = 0x00000000ul;
1595 netdev_for_each_mc_addr(ha, dev) {
1596 /* Calculate the hash index for the GA registers */
1597
1598 hash_ix = 0;
1599 baddr = ha->addr;
1600 hash_ix ^= (*baddr) & 0x3f;
1601 hash_ix ^= ((*baddr) >> 6) & 0x03;
1602 ++baddr;
1603 hash_ix ^= ((*baddr) << 2) & 0x03c;
1604 hash_ix ^= ((*baddr) >> 4) & 0xf;
1605 ++baddr;
1606 hash_ix ^= ((*baddr) << 4) & 0x30;
1607 hash_ix ^= ((*baddr) >> 2) & 0x3f;
1608 ++baddr;
1609 hash_ix ^= (*baddr) & 0x3f;
1610 hash_ix ^= ((*baddr) >> 6) & 0x03;
1611 ++baddr;
1612 hash_ix ^= ((*baddr) << 2) & 0x03c;
1613 hash_ix ^= ((*baddr) >> 4) & 0xf;
1614 ++baddr;
1615 hash_ix ^= ((*baddr) << 4) & 0x30;
1616 hash_ix ^= ((*baddr) >> 2) & 0x3f;
1617
1618 hash_ix &= 0x3f;
1619
1620 if (hash_ix >= 32) {
1621 hi_bits |= (1 << (hash_ix-32));
1622 } else {
1623 lo_bits |= (1 << hash_ix);
1624 }
1625 }
1626 /* Disable individual receive */
1627 SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, individual, discard);
1628 *R_NETWORK_REC_CONFIG = network_rec_config_shadow;
1629 }
1630 *R_NETWORK_GA_0 = lo_bits;
1631 *R_NETWORK_GA_1 = hi_bits;
1632 spin_unlock(&lp->lock);
1633 }
1634
1635 void
1636 e100_hardware_send_packet(struct net_local *np, char *buf, int length)
1637 {
1638 D(printk("e100 send pack, buf 0x%x len %d\n", buf, length));
1639
1640 spin_lock(&np->led_lock);
1641 if (!led_active && time_after(jiffies, led_next_time)) {
1642 /* light the network leds depending on the current speed. */
1643 e100_set_network_leds(NETWORK_ACTIVITY);
1644
1645 /* Set the earliest time we may clear the LED */
1646 led_next_time = jiffies + NET_FLASH_TIME;
1647 led_active = 1;
1648 mod_timer(&clear_led_timer, jiffies + HZ/10);
1649 }
1650 spin_unlock(&np->led_lock);
1651
1652 /* configure the tx dma descriptor */
1653 myNextTxDesc->descr.sw_len = length;
1654 myNextTxDesc->descr.ctrl = d_eop | d_eol | d_wait;
1655 myNextTxDesc->descr.buf = virt_to_phys(buf);
1656
1657 /* Move end of list */
1658 myLastTxDesc->descr.ctrl &= ~d_eol;
1659 myLastTxDesc = myNextTxDesc;
1660
1661 /* Restart DMA channel */
1662 *R_DMA_CH0_CMD = IO_STATE(R_DMA_CH0_CMD, cmd, restart);
1663 }
1664
1665 static void
1666 e100_clear_network_leds(unsigned long dummy)
1667 {
1668 struct net_device *dev = (struct net_device *)dummy;
1669 struct net_local *np = netdev_priv(dev);
1670
1671 spin_lock(&np->led_lock);
1672
1673 if (led_active && time_after(jiffies, led_next_time)) {
1674 e100_set_network_leds(NO_NETWORK_ACTIVITY);
1675
1676 /* Set the earliest time we may set the LED */
1677 led_next_time = jiffies + NET_FLASH_PAUSE;
1678 led_active = 0;
1679 }
1680
1681 spin_unlock(&np->led_lock);
1682 }
1683
1684 static void
1685 e100_set_network_leds(int active)
1686 {
1687 #if defined(CONFIG_ETRAX_NETWORK_LED_ON_WHEN_LINK)
1688 int light_leds = (active == NO_NETWORK_ACTIVITY);
1689 #elif defined(CONFIG_ETRAX_NETWORK_LED_ON_WHEN_ACTIVITY)
1690 int light_leds = (active == NETWORK_ACTIVITY);
1691 #else
1692 #error "Define either CONFIG_ETRAX_NETWORK_LED_ON_WHEN_LINK or CONFIG_ETRAX_NETWORK_LED_ON_WHEN_ACTIVITY"
1693 #endif
1694
1695 if (!current_speed) {
1696 /* Make LED red, link is down */
1697 CRIS_LED_NETWORK_SET(CRIS_LED_OFF);
1698 } else if (light_leds) {
1699 if (current_speed == 10) {
1700 CRIS_LED_NETWORK_SET(CRIS_LED_ORANGE);
1701 } else {
1702 CRIS_LED_NETWORK_SET(CRIS_LED_GREEN);
1703 }
1704 } else {
1705 CRIS_LED_NETWORK_SET(CRIS_LED_OFF);
1706 }
1707 }
1708
1709 #ifdef CONFIG_NET_POLL_CONTROLLER
1710 static void
1711 e100_netpoll(struct net_device* netdev)
1712 {
1713 e100rxtx_interrupt(NETWORK_DMA_TX_IRQ_NBR, netdev, NULL);
1714 }
1715 #endif
1716
1717 static int
1718 etrax_init_module(void)
1719 {
1720 return etrax_ethernet_init();
1721 }
1722
1723 static int __init
1724 e100_boot_setup(char* str)
1725 {
1726 struct sockaddr sa = {0};
1727 int i;
1728
1729 /* Parse the colon separated Ethernet station address */
1730 for (i = 0; i < ETH_ALEN; i++) {
1731 unsigned int tmp;
1732 if (sscanf(str + 3*i, "%2x", &tmp) != 1) {
1733 printk(KERN_WARNING "Malformed station address");
1734 return 0;
1735 }
1736 sa.sa_data[i] = (char)tmp;
1737 }
1738
1739 default_mac = sa;
1740 return 1;
1741 }
1742
1743 __setup("etrax100_eth=", e100_boot_setup);
1744
1745 module_init(etrax_init_module);
Tomato firmware and modifications.