RT-AC56 3.0.0.4.374.37 core
[tomato.git] / release / src-rt-6.x.4708 / linux / linux-2.6.36 / drivers / mtd / devices / pmc551.c
blobc8eb5f142e7db4535e2199664121efec32d525cf
1 /*
2 * PMC551 PCI Mezzanine Ram Device
4 * Author:
5 * Mark Ferrell <mferrell@mvista.com>
6 * Copyright 1999,2000 Nortel Networks
8 * License:
9 * As part of this driver was derived from the slram.c driver it
10 * falls under the same license, which is GNU General Public
11 * License v2
13 * Description:
14 * This driver is intended to support the PMC551 PCI Ram device
15 * from Ramix Inc. The PMC551 is a PMC Mezzanine module for
16 * cPCI embedded systems. The device contains a single SROM
17 * that initially programs the V370PDC chipset onboard the
18 * device, and various banks of DRAM/SDRAM onboard. This driver
19 * implements this PCI Ram device as an MTD (Memory Technology
20 * Device) so that it can be used to hold a file system, or for
21 * added swap space in embedded systems. Since the memory on
22 * this board isn't as fast as main memory we do not try to hook
23 * it into main memory as that would simply reduce performance
24 * on the system. Using it as a block device allows us to use
25 * it as high speed swap or for a high speed disk device of some
26 * sort. Which becomes very useful on diskless systems in the
27 * embedded market I might add.
29 * Notes:
30 * Due to what I assume is more buggy SROM, the 64M PMC551 I
31 * have available claims that all 4 of its DRAM banks have 64MiB
32 * of ram configured (making a grand total of 256MiB onboard).
33 * This is slightly annoying since the BAR0 size reflects the
34 * aperture size, not the dram size, and the V370PDC supplies no
35 * other method for memory size discovery. This problem is
36 * mostly only relevant when compiled as a module, as the
37 * unloading of the module with an aperture size smaller than
38 * the ram will cause the driver to detect the onboard memory
39 * size to be equal to the aperture size when the module is
40 * reloaded. Soooo, to help, the module supports an msize
41 * option to allow the specification of the onboard memory, and
42 * an asize option, to allow the specification of the aperture
43 * size. The aperture must be equal to or less then the memory
44 * size, the driver will correct this if you screw it up. This
45 * problem is not relevant for compiled in drivers as compiled
46 * in drivers only init once.
48 * Credits:
49 * Saeed Karamooz <saeed@ramix.com> of Ramix INC. for the
50 * initial example code of how to initialize this device and for
51 * help with questions I had concerning operation of the device.
53 * Most of the MTD code for this driver was originally written
54 * for the slram.o module in the MTD drivers package which
55 * allows the mapping of system memory into an MTD device.
56 * Since the PMC551 memory module is accessed in the same
57 * fashion as system memory, the slram.c code became a very nice
58 * fit to the needs of this driver. All we added was PCI
59 * detection/initialization to the driver and automatically figure
60 * out the size via the PCI detection.o, later changes by Corey
61 * Minyard set up the card to utilize a 1M sliding apature.
63 * Corey Minyard <minyard@nortelnetworks.com>
64 * * Modified driver to utilize a sliding aperture instead of
65 * mapping all memory into kernel space which turned out to
66 * be very wasteful.
67 * * Located a bug in the SROM's initialization sequence that
68 * made the memory unusable, added a fix to code to touch up
69 * the DRAM some.
71 * Bugs/FIXMEs:
72 * * MUST fix the init function to not spin on a register
73 * waiting for it to set .. this does not safely handle busted
74 * devices that never reset the register correctly which will
75 * cause the system to hang w/ a reboot being the only chance at
76 * recover. [sort of fixed, could be better]
77 * * Add I2C handling of the SROM so we can read the SROM's information
78 * about the aperture size. This should always accurately reflect the
79 * onboard memory size.
80 * * Comb the init routine. It's still a bit cludgy on a few things.
83 #include <linux/kernel.h>
84 #include <linux/module.h>
85 #include <asm/uaccess.h>
86 #include <linux/types.h>
87 #include <linux/init.h>
88 #include <linux/ptrace.h>
89 #include <linux/slab.h>
90 #include <linux/string.h>
91 #include <linux/timer.h>
92 #include <linux/major.h>
93 #include <linux/fs.h>
94 #include <linux/ioctl.h>
95 #include <asm/io.h>
96 #include <asm/system.h>
97 #include <linux/pci.h>
99 #include <linux/mtd/mtd.h>
100 #include <linux/mtd/pmc551.h>
102 static struct mtd_info *pmc551list;
104 static int pmc551_erase(struct mtd_info *mtd, struct erase_info *instr)
106 struct mypriv *priv = mtd->priv;
107 u32 soff_hi, soff_lo; /* start address offset hi/lo */
108 u32 eoff_hi, eoff_lo; /* end address offset hi/lo */
109 unsigned long end;
110 u_char *ptr;
111 size_t retlen;
113 #ifdef CONFIG_MTD_PMC551_DEBUG
114 printk(KERN_DEBUG "pmc551_erase(pos:%ld, len:%ld)\n", (long)instr->addr,
115 (long)instr->len);
116 #endif
118 end = instr->addr + instr->len - 1;
120 /* Is it past the end? */
121 if (end > mtd->size) {
122 #ifdef CONFIG_MTD_PMC551_DEBUG
123 printk(KERN_DEBUG "pmc551_erase() out of bounds (%ld > %ld)\n",
124 (long)end, (long)mtd->size);
125 #endif
126 return -EINVAL;
129 eoff_hi = end & ~(priv->asize - 1);
130 soff_hi = instr->addr & ~(priv->asize - 1);
131 eoff_lo = end & (priv->asize - 1);
132 soff_lo = instr->addr & (priv->asize - 1);
134 pmc551_point(mtd, instr->addr, instr->len, &retlen,
135 (void **)&ptr, NULL);
137 if (soff_hi == eoff_hi || mtd->size == priv->asize) {
138 /* The whole thing fits within one access, so just one shot
139 will do it. */
140 memset(ptr, 0xff, instr->len);
141 } else {
142 /* We have to do multiple writes to get all the data
143 written. */
144 while (soff_hi != eoff_hi) {
145 #ifdef CONFIG_MTD_PMC551_DEBUG
146 printk(KERN_DEBUG "pmc551_erase() soff_hi: %ld, "
147 "eoff_hi: %ld\n", (long)soff_hi, (long)eoff_hi);
148 #endif
149 memset(ptr, 0xff, priv->asize);
150 if (soff_hi + priv->asize >= mtd->size) {
151 goto out;
153 soff_hi += priv->asize;
154 pmc551_point(mtd, (priv->base_map0 | soff_hi),
155 priv->asize, &retlen,
156 (void **)&ptr, NULL);
158 memset(ptr, 0xff, eoff_lo);
161 out:
162 instr->state = MTD_ERASE_DONE;
163 #ifdef CONFIG_MTD_PMC551_DEBUG
164 printk(KERN_DEBUG "pmc551_erase() done\n");
165 #endif
167 mtd_erase_callback(instr);
168 return 0;
171 static int pmc551_point(struct mtd_info *mtd, loff_t from, size_t len,
172 size_t *retlen, void **virt, resource_size_t *phys)
174 struct mypriv *priv = mtd->priv;
175 u32 soff_hi;
176 u32 soff_lo;
178 #ifdef CONFIG_MTD_PMC551_DEBUG
179 printk(KERN_DEBUG "pmc551_point(%ld, %ld)\n", (long)from, (long)len);
180 #endif
182 if (from + len > mtd->size) {
183 #ifdef CONFIG_MTD_PMC551_DEBUG
184 printk(KERN_DEBUG "pmc551_point() out of bounds (%ld > %ld)\n",
185 (long)from + len, (long)mtd->size);
186 #endif
187 return -EINVAL;
190 /* can we return a physical address with this driver? */
191 if (phys)
192 return -EINVAL;
194 soff_hi = from & ~(priv->asize - 1);
195 soff_lo = from & (priv->asize - 1);
197 /* Cheap hack optimization */
198 if (priv->curr_map0 != from) {
199 pci_write_config_dword(priv->dev, PMC551_PCI_MEM_MAP0,
200 (priv->base_map0 | soff_hi));
201 priv->curr_map0 = soff_hi;
204 *virt = priv->start + soff_lo;
205 *retlen = len;
206 return 0;
209 static void pmc551_unpoint(struct mtd_info *mtd, loff_t from, size_t len)
211 #ifdef CONFIG_MTD_PMC551_DEBUG
212 printk(KERN_DEBUG "pmc551_unpoint()\n");
213 #endif
216 static int pmc551_read(struct mtd_info *mtd, loff_t from, size_t len,
217 size_t * retlen, u_char * buf)
219 struct mypriv *priv = mtd->priv;
220 u32 soff_hi, soff_lo; /* start address offset hi/lo */
221 u32 eoff_hi, eoff_lo; /* end address offset hi/lo */
222 unsigned long end;
223 u_char *ptr;
224 u_char *copyto = buf;
226 #ifdef CONFIG_MTD_PMC551_DEBUG
227 printk(KERN_DEBUG "pmc551_read(pos:%ld, len:%ld) asize: %ld\n",
228 (long)from, (long)len, (long)priv->asize);
229 #endif
231 end = from + len - 1;
233 /* Is it past the end? */
234 if (end > mtd->size) {
235 #ifdef CONFIG_MTD_PMC551_DEBUG
236 printk(KERN_DEBUG "pmc551_read() out of bounds (%ld > %ld)\n",
237 (long)end, (long)mtd->size);
238 #endif
239 return -EINVAL;
242 soff_hi = from & ~(priv->asize - 1);
243 eoff_hi = end & ~(priv->asize - 1);
244 soff_lo = from & (priv->asize - 1);
245 eoff_lo = end & (priv->asize - 1);
247 pmc551_point(mtd, from, len, retlen, (void **)&ptr, NULL);
249 if (soff_hi == eoff_hi) {
250 /* The whole thing fits within one access, so just one shot
251 will do it. */
252 memcpy(copyto, ptr, len);
253 copyto += len;
254 } else {
255 /* We have to do multiple writes to get all the data
256 written. */
257 while (soff_hi != eoff_hi) {
258 #ifdef CONFIG_MTD_PMC551_DEBUG
259 printk(KERN_DEBUG "pmc551_read() soff_hi: %ld, "
260 "eoff_hi: %ld\n", (long)soff_hi, (long)eoff_hi);
261 #endif
262 memcpy(copyto, ptr, priv->asize);
263 copyto += priv->asize;
264 if (soff_hi + priv->asize >= mtd->size) {
265 goto out;
267 soff_hi += priv->asize;
268 pmc551_point(mtd, soff_hi, priv->asize, retlen,
269 (void **)&ptr, NULL);
271 memcpy(copyto, ptr, eoff_lo);
272 copyto += eoff_lo;
275 out:
276 #ifdef CONFIG_MTD_PMC551_DEBUG
277 printk(KERN_DEBUG "pmc551_read() done\n");
278 #endif
279 *retlen = copyto - buf;
280 return 0;
283 static int pmc551_write(struct mtd_info *mtd, loff_t to, size_t len,
284 size_t * retlen, const u_char * buf)
286 struct mypriv *priv = mtd->priv;
287 u32 soff_hi, soff_lo; /* start address offset hi/lo */
288 u32 eoff_hi, eoff_lo; /* end address offset hi/lo */
289 unsigned long end;
290 u_char *ptr;
291 const u_char *copyfrom = buf;
293 #ifdef CONFIG_MTD_PMC551_DEBUG
294 printk(KERN_DEBUG "pmc551_write(pos:%ld, len:%ld) asize:%ld\n",
295 (long)to, (long)len, (long)priv->asize);
296 #endif
298 end = to + len - 1;
299 /* Is it past the end? or did the u32 wrap? */
300 if (end > mtd->size) {
301 #ifdef CONFIG_MTD_PMC551_DEBUG
302 printk(KERN_DEBUG "pmc551_write() out of bounds (end: %ld, "
303 "size: %ld, to: %ld)\n", (long)end, (long)mtd->size,
304 (long)to);
305 #endif
306 return -EINVAL;
309 soff_hi = to & ~(priv->asize - 1);
310 eoff_hi = end & ~(priv->asize - 1);
311 soff_lo = to & (priv->asize - 1);
312 eoff_lo = end & (priv->asize - 1);
314 pmc551_point(mtd, to, len, retlen, (void **)&ptr, NULL);
316 if (soff_hi == eoff_hi) {
317 /* The whole thing fits within one access, so just one shot
318 will do it. */
319 memcpy(ptr, copyfrom, len);
320 copyfrom += len;
321 } else {
322 /* We have to do multiple writes to get all the data
323 written. */
324 while (soff_hi != eoff_hi) {
325 #ifdef CONFIG_MTD_PMC551_DEBUG
326 printk(KERN_DEBUG "pmc551_write() soff_hi: %ld, "
327 "eoff_hi: %ld\n", (long)soff_hi, (long)eoff_hi);
328 #endif
329 memcpy(ptr, copyfrom, priv->asize);
330 copyfrom += priv->asize;
331 if (soff_hi >= mtd->size) {
332 goto out;
334 soff_hi += priv->asize;
335 pmc551_point(mtd, soff_hi, priv->asize, retlen,
336 (void **)&ptr, NULL);
338 memcpy(ptr, copyfrom, eoff_lo);
339 copyfrom += eoff_lo;
342 out:
343 #ifdef CONFIG_MTD_PMC551_DEBUG
344 printk(KERN_DEBUG "pmc551_write() done\n");
345 #endif
346 *retlen = copyfrom - buf;
347 return 0;
350 static u32 fixup_pmc551(struct pci_dev *dev)
352 #ifdef CONFIG_MTD_PMC551_BUGFIX
353 u32 dram_data;
354 #endif
355 u32 size, dcmd, cfg, dtmp;
356 u16 cmd, tmp, i;
357 u8 bcmd, counter;
359 /* Sanity Check */
360 if (!dev) {
361 return -ENODEV;
364 counter = 0;
365 /* unlock registers */
366 pci_write_config_byte(dev, PMC551_SYS_CTRL_REG, 0xA5);
367 /* read in old data */
368 pci_read_config_byte(dev, PMC551_SYS_CTRL_REG, &bcmd);
369 /* bang the reset line up and down for a few */
370 for (i = 0; i < 10; i++) {
371 counter = 0;
372 bcmd &= ~0x80;
373 while (counter++ < 100) {
374 pci_write_config_byte(dev, PMC551_SYS_CTRL_REG, bcmd);
376 counter = 0;
377 bcmd |= 0x80;
378 while (counter++ < 100) {
379 pci_write_config_byte(dev, PMC551_SYS_CTRL_REG, bcmd);
382 bcmd |= (0x40 | 0x20);
383 pci_write_config_byte(dev, PMC551_SYS_CTRL_REG, bcmd);
386 * Take care and turn off the memory on the device while we
387 * tweak the configurations
389 pci_read_config_word(dev, PCI_COMMAND, &cmd);
390 tmp = cmd & ~(PCI_COMMAND_IO | PCI_COMMAND_MEMORY);
391 pci_write_config_word(dev, PCI_COMMAND, tmp);
394 * Disable existing aperture before probing memory size
396 pci_read_config_dword(dev, PMC551_PCI_MEM_MAP0, &dcmd);
397 dtmp = (dcmd | PMC551_PCI_MEM_MAP_ENABLE | PMC551_PCI_MEM_MAP_REG_EN);
398 pci_write_config_dword(dev, PMC551_PCI_MEM_MAP0, dtmp);
400 * Grab old BAR0 config so that we can figure out memory size
401 * This is another bit of kludge going on. The reason for the
402 * redundancy is I am hoping to retain the original configuration
403 * previously assigned to the card by the BIOS or some previous
404 * fixup routine in the kernel. So we read the old config into cfg,
405 * then write all 1's to the memory space, read back the result into
406 * "size", and then write back all the old config.
408 pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &cfg);
409 #ifndef CONFIG_MTD_PMC551_BUGFIX
410 pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, ~0);
411 pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &size);
412 size = (size & PCI_BASE_ADDRESS_MEM_MASK);
413 size &= ~(size - 1);
414 pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, cfg);
415 #else
417 * Get the size of the memory by reading all the DRAM size values
418 * and adding them up.
420 * KLUDGE ALERT: the boards we are using have invalid column and
421 * row mux values. We fix them here, but this will break other
422 * memory configurations.
424 pci_read_config_dword(dev, PMC551_DRAM_BLK0, &dram_data);
425 size = PMC551_DRAM_BLK_GET_SIZE(dram_data);
426 dram_data = PMC551_DRAM_BLK_SET_COL_MUX(dram_data, 0x5);
427 dram_data = PMC551_DRAM_BLK_SET_ROW_MUX(dram_data, 0x9);
428 pci_write_config_dword(dev, PMC551_DRAM_BLK0, dram_data);
430 pci_read_config_dword(dev, PMC551_DRAM_BLK1, &dram_data);
431 size += PMC551_DRAM_BLK_GET_SIZE(dram_data);
432 dram_data = PMC551_DRAM_BLK_SET_COL_MUX(dram_data, 0x5);
433 dram_data = PMC551_DRAM_BLK_SET_ROW_MUX(dram_data, 0x9);
434 pci_write_config_dword(dev, PMC551_DRAM_BLK1, dram_data);
436 pci_read_config_dword(dev, PMC551_DRAM_BLK2, &dram_data);
437 size += PMC551_DRAM_BLK_GET_SIZE(dram_data);
438 dram_data = PMC551_DRAM_BLK_SET_COL_MUX(dram_data, 0x5);
439 dram_data = PMC551_DRAM_BLK_SET_ROW_MUX(dram_data, 0x9);
440 pci_write_config_dword(dev, PMC551_DRAM_BLK2, dram_data);
442 pci_read_config_dword(dev, PMC551_DRAM_BLK3, &dram_data);
443 size += PMC551_DRAM_BLK_GET_SIZE(dram_data);
444 dram_data = PMC551_DRAM_BLK_SET_COL_MUX(dram_data, 0x5);
445 dram_data = PMC551_DRAM_BLK_SET_ROW_MUX(dram_data, 0x9);
446 pci_write_config_dword(dev, PMC551_DRAM_BLK3, dram_data);
449 * Oops .. something went wrong
451 if ((size &= PCI_BASE_ADDRESS_MEM_MASK) == 0) {
452 return -ENODEV;
454 #endif /* CONFIG_MTD_PMC551_BUGFIX */
456 if ((cfg & PCI_BASE_ADDRESS_SPACE) != PCI_BASE_ADDRESS_SPACE_MEMORY) {
457 return -ENODEV;
461 * Precharge Dram
463 pci_write_config_word(dev, PMC551_SDRAM_MA, 0x0400);
464 pci_write_config_word(dev, PMC551_SDRAM_CMD, 0x00bf);
466 do {
467 pci_read_config_word(dev, PMC551_SDRAM_CMD, &cmd);
468 if (counter++ > 100)
469 break;
470 } while ((PCI_COMMAND_IO) & cmd);
473 * Turn on auto refresh
474 * The loop is taken directly from Ramix's example code. I assume that
475 * this must be held high for some duration of time, but I can find no
476 * documentation refrencing the reasons why.
478 for (i = 1; i <= 8; i++) {
479 pci_write_config_word(dev, PMC551_SDRAM_CMD, 0x0df);
481 counter = 0;
482 do {
483 pci_read_config_word(dev, PMC551_SDRAM_CMD, &cmd);
484 if (counter++ > 100)
485 break;
486 } while ((PCI_COMMAND_IO) & cmd);
489 pci_write_config_word(dev, PMC551_SDRAM_MA, 0x0020);
490 pci_write_config_word(dev, PMC551_SDRAM_CMD, 0x0ff);
492 counter = 0;
493 do {
494 pci_read_config_word(dev, PMC551_SDRAM_CMD, &cmd);
495 if (counter++ > 100)
496 break;
497 } while ((PCI_COMMAND_IO) & cmd);
499 pci_read_config_dword(dev, PMC551_DRAM_CFG, &dcmd);
500 dcmd |= 0x02000000;
501 pci_write_config_dword(dev, PMC551_DRAM_CFG, dcmd);
504 * Check to make certain fast back-to-back, if not
505 * then set it so
507 pci_read_config_word(dev, PCI_STATUS, &cmd);
508 if ((cmd & PCI_COMMAND_FAST_BACK) == 0) {
509 cmd |= PCI_COMMAND_FAST_BACK;
510 pci_write_config_word(dev, PCI_STATUS, cmd);
514 * Check to make certain the DEVSEL is set correctly, this device
515 * has a tendancy to assert DEVSEL and TRDY when a write is performed
516 * to the memory when memory is read-only
518 if ((cmd & PCI_STATUS_DEVSEL_MASK) != 0x0) {
519 cmd &= ~PCI_STATUS_DEVSEL_MASK;
520 pci_write_config_word(dev, PCI_STATUS, cmd);
523 * Set to be prefetchable and put everything back based on old cfg.
524 * it's possible that the reset of the V370PDC nuked the original
525 * setup
528 cfg |= PCI_BASE_ADDRESS_MEM_PREFETCH;
529 pci_write_config_dword( dev, PCI_BASE_ADDRESS_0, cfg );
533 * Turn PCI memory and I/O bus access back on
535 pci_write_config_word(dev, PCI_COMMAND,
536 PCI_COMMAND_MEMORY | PCI_COMMAND_IO);
537 #ifdef CONFIG_MTD_PMC551_DEBUG
539 * Some screen fun
541 printk(KERN_DEBUG "pmc551: %d%sB (0x%x) of %sprefetchable memory at "
542 "0x%llx\n", (size < 1024) ? size : (size < 1048576) ?
543 size >> 10 : size >> 20,
544 (size < 1024) ? "" : (size < 1048576) ? "Ki" : "Mi", size,
545 ((dcmd & (0x1 << 3)) == 0) ? "non-" : "",
546 (unsigned long long)pci_resource_start(dev, 0));
549 * Check to see the state of the memory
551 pci_read_config_dword(dev, PMC551_DRAM_BLK0, &dcmd);
552 printk(KERN_DEBUG "pmc551: DRAM_BLK0 Flags: %s,%s\n"
553 "pmc551: DRAM_BLK0 Size: %d at %d\n"
554 "pmc551: DRAM_BLK0 Row MUX: %d, Col MUX: %d\n",
555 (((0x1 << 1) & dcmd) == 0) ? "RW" : "RO",
556 (((0x1 << 0) & dcmd) == 0) ? "Off" : "On",
557 PMC551_DRAM_BLK_GET_SIZE(dcmd),
558 ((dcmd >> 20) & 0x7FF), ((dcmd >> 13) & 0x7),
559 ((dcmd >> 9) & 0xF));
561 pci_read_config_dword(dev, PMC551_DRAM_BLK1, &dcmd);
562 printk(KERN_DEBUG "pmc551: DRAM_BLK1 Flags: %s,%s\n"
563 "pmc551: DRAM_BLK1 Size: %d at %d\n"
564 "pmc551: DRAM_BLK1 Row MUX: %d, Col MUX: %d\n",
565 (((0x1 << 1) & dcmd) == 0) ? "RW" : "RO",
566 (((0x1 << 0) & dcmd) == 0) ? "Off" : "On",
567 PMC551_DRAM_BLK_GET_SIZE(dcmd),
568 ((dcmd >> 20) & 0x7FF), ((dcmd >> 13) & 0x7),
569 ((dcmd >> 9) & 0xF));
571 pci_read_config_dword(dev, PMC551_DRAM_BLK2, &dcmd);
572 printk(KERN_DEBUG "pmc551: DRAM_BLK2 Flags: %s,%s\n"
573 "pmc551: DRAM_BLK2 Size: %d at %d\n"
574 "pmc551: DRAM_BLK2 Row MUX: %d, Col MUX: %d\n",
575 (((0x1 << 1) & dcmd) == 0) ? "RW" : "RO",
576 (((0x1 << 0) & dcmd) == 0) ? "Off" : "On",
577 PMC551_DRAM_BLK_GET_SIZE(dcmd),
578 ((dcmd >> 20) & 0x7FF), ((dcmd >> 13) & 0x7),
579 ((dcmd >> 9) & 0xF));
581 pci_read_config_dword(dev, PMC551_DRAM_BLK3, &dcmd);
582 printk(KERN_DEBUG "pmc551: DRAM_BLK3 Flags: %s,%s\n"
583 "pmc551: DRAM_BLK3 Size: %d at %d\n"
584 "pmc551: DRAM_BLK3 Row MUX: %d, Col MUX: %d\n",
585 (((0x1 << 1) & dcmd) == 0) ? "RW" : "RO",
586 (((0x1 << 0) & dcmd) == 0) ? "Off" : "On",
587 PMC551_DRAM_BLK_GET_SIZE(dcmd),
588 ((dcmd >> 20) & 0x7FF), ((dcmd >> 13) & 0x7),
589 ((dcmd >> 9) & 0xF));
591 pci_read_config_word(dev, PCI_COMMAND, &cmd);
592 printk(KERN_DEBUG "pmc551: Memory Access %s\n",
593 (((0x1 << 1) & cmd) == 0) ? "off" : "on");
594 printk(KERN_DEBUG "pmc551: I/O Access %s\n",
595 (((0x1 << 0) & cmd) == 0) ? "off" : "on");
597 pci_read_config_word(dev, PCI_STATUS, &cmd);
598 printk(KERN_DEBUG "pmc551: Devsel %s\n",
599 ((PCI_STATUS_DEVSEL_MASK & cmd) == 0x000) ? "Fast" :
600 ((PCI_STATUS_DEVSEL_MASK & cmd) == 0x200) ? "Medium" :
601 ((PCI_STATUS_DEVSEL_MASK & cmd) == 0x400) ? "Slow" : "Invalid");
603 printk(KERN_DEBUG "pmc551: %sFast Back-to-Back\n",
604 ((PCI_COMMAND_FAST_BACK & cmd) == 0) ? "Not " : "");
606 pci_read_config_byte(dev, PMC551_SYS_CTRL_REG, &bcmd);
607 printk(KERN_DEBUG "pmc551: EEPROM is under %s control\n"
608 "pmc551: System Control Register is %slocked to PCI access\n"
609 "pmc551: System Control Register is %slocked to EEPROM access\n",
610 (bcmd & 0x1) ? "software" : "hardware",
611 (bcmd & 0x20) ? "" : "un", (bcmd & 0x40) ? "" : "un");
612 #endif
613 return size;
617 * Kernel version specific module stuffages
620 MODULE_LICENSE("GPL");
621 MODULE_AUTHOR("Mark Ferrell <mferrell@mvista.com>");
622 MODULE_DESCRIPTION(PMC551_VERSION);
625 * Stuff these outside the ifdef so as to not bust compiled in driver support
627 static int msize = 0;
628 static int asize = 0;
630 module_param(msize, int, 0);
631 MODULE_PARM_DESC(msize, "memory size in MiB [1 - 1024]");
632 module_param(asize, int, 0);
633 MODULE_PARM_DESC(asize, "aperture size, must be <= memsize [1-1024]");
636 * PMC551 Card Initialization
638 static int __init init_pmc551(void)
640 struct pci_dev *PCI_Device = NULL;
641 struct mypriv *priv;
642 int found = 0;
643 struct mtd_info *mtd;
644 u32 length = 0;
646 if (msize) {
647 msize = (1 << (ffs(msize) - 1)) << 20;
648 if (msize > (1 << 30)) {
649 printk(KERN_NOTICE "pmc551: Invalid memory size [%d]\n",
650 msize);
651 return -EINVAL;
655 if (asize) {
656 asize = (1 << (ffs(asize) - 1)) << 20;
657 if (asize > (1 << 30)) {
658 printk(KERN_NOTICE "pmc551: Invalid aperture size "
659 "[%d]\n", asize);
660 return -EINVAL;
664 printk(KERN_INFO PMC551_VERSION);
667 * PCU-bus chipset probe.
669 for (;;) {
671 if ((PCI_Device = pci_get_device(PCI_VENDOR_ID_V3_SEMI,
672 PCI_DEVICE_ID_V3_SEMI_V370PDC,
673 PCI_Device)) == NULL) {
674 break;
677 printk(KERN_NOTICE "pmc551: Found PCI V370PDC at 0x%llx\n",
678 (unsigned long long)pci_resource_start(PCI_Device, 0));
681 * The PMC551 device acts VERY weird if you don't init it
682 * first. i.e. it will not correctly report devsel. If for
683 * some reason the sdram is in a wrote-protected state the
684 * device will DEVSEL when it is written to causing problems
685 * with the oldproc.c driver in
686 * some kernels (2.2.*)
688 if ((length = fixup_pmc551(PCI_Device)) <= 0) {
689 printk(KERN_NOTICE "pmc551: Cannot init SDRAM\n");
690 break;
694 * This is needed until the driver is capable of reading the
695 * onboard I2C SROM to discover the "real" memory size.
697 if (msize) {
698 length = msize;
699 printk(KERN_NOTICE "pmc551: Using specified memory "
700 "size 0x%x\n", length);
701 } else {
702 msize = length;
705 mtd = kzalloc(sizeof(struct mtd_info), GFP_KERNEL);
706 if (!mtd) {
707 printk(KERN_NOTICE "pmc551: Cannot allocate new MTD "
708 "device.\n");
709 break;
712 priv = kzalloc(sizeof(struct mypriv), GFP_KERNEL);
713 if (!priv) {
714 printk(KERN_NOTICE "pmc551: Cannot allocate new MTD "
715 "device.\n");
716 kfree(mtd);
717 break;
719 mtd->priv = priv;
720 priv->dev = PCI_Device;
722 if (asize > length) {
723 printk(KERN_NOTICE "pmc551: reducing aperture size to "
724 "fit %dM\n", length >> 20);
725 priv->asize = asize = length;
726 } else if (asize == 0 || asize == length) {
727 printk(KERN_NOTICE "pmc551: Using existing aperture "
728 "size %dM\n", length >> 20);
729 priv->asize = asize = length;
730 } else {
731 printk(KERN_NOTICE "pmc551: Using specified aperture "
732 "size %dM\n", asize >> 20);
733 priv->asize = asize;
735 priv->start = pci_iomap(PCI_Device, 0, priv->asize);
737 if (!priv->start) {
738 printk(KERN_NOTICE "pmc551: Unable to map IO space\n");
739 kfree(mtd->priv);
740 kfree(mtd);
741 break;
743 #ifdef CONFIG_MTD_PMC551_DEBUG
744 printk(KERN_DEBUG "pmc551: setting aperture to %d\n",
745 ffs(priv->asize >> 20) - 1);
746 #endif
748 priv->base_map0 = (PMC551_PCI_MEM_MAP_REG_EN
749 | PMC551_PCI_MEM_MAP_ENABLE
750 | (ffs(priv->asize >> 20) - 1) << 4);
751 priv->curr_map0 = priv->base_map0;
752 pci_write_config_dword(priv->dev, PMC551_PCI_MEM_MAP0,
753 priv->curr_map0);
755 #ifdef CONFIG_MTD_PMC551_DEBUG
756 printk(KERN_DEBUG "pmc551: aperture set to %d\n",
757 (priv->base_map0 & 0xF0) >> 4);
758 #endif
760 mtd->size = msize;
761 mtd->flags = MTD_CAP_RAM;
762 mtd->erase = pmc551_erase;
763 mtd->read = pmc551_read;
764 mtd->write = pmc551_write;
765 mtd->point = pmc551_point;
766 mtd->unpoint = pmc551_unpoint;
767 mtd->type = MTD_RAM;
768 mtd->name = "PMC551 RAM board";
769 mtd->erasesize = 0x10000;
770 mtd->writesize = 1;
771 mtd->owner = THIS_MODULE;
773 if (add_mtd_device(mtd)) {
774 printk(KERN_NOTICE "pmc551: Failed to register new device\n");
775 pci_iounmap(PCI_Device, priv->start);
776 kfree(mtd->priv);
777 kfree(mtd);
778 break;
781 /* Keep a reference as the add_mtd_device worked */
782 pci_dev_get(PCI_Device);
784 printk(KERN_NOTICE "Registered pmc551 memory device.\n");
785 printk(KERN_NOTICE "Mapped %dMiB of memory from 0x%p to 0x%p\n",
786 priv->asize >> 20,
787 priv->start, priv->start + priv->asize);
788 printk(KERN_NOTICE "Total memory is %d%sB\n",
789 (length < 1024) ? length :
790 (length < 1048576) ? length >> 10 : length >> 20,
791 (length < 1024) ? "" : (length < 1048576) ? "Ki" : "Mi");
792 priv->nextpmc551 = pmc551list;
793 pmc551list = mtd;
794 found++;
797 /* Exited early, reference left over */
798 if (PCI_Device)
799 pci_dev_put(PCI_Device);
801 if (!pmc551list) {
802 printk(KERN_NOTICE "pmc551: not detected\n");
803 return -ENODEV;
804 } else {
805 printk(KERN_NOTICE "pmc551: %d pmc551 devices loaded\n", found);
806 return 0;
811 * PMC551 Card Cleanup
813 static void __exit cleanup_pmc551(void)
815 int found = 0;
816 struct mtd_info *mtd;
817 struct mypriv *priv;
819 while ((mtd = pmc551list)) {
820 priv = mtd->priv;
821 pmc551list = priv->nextpmc551;
823 if (priv->start) {
824 printk(KERN_DEBUG "pmc551: unmapping %dMiB starting at "
825 "0x%p\n", priv->asize >> 20, priv->start);
826 pci_iounmap(priv->dev, priv->start);
828 pci_dev_put(priv->dev);
830 kfree(mtd->priv);
831 del_mtd_device(mtd);
832 kfree(mtd);
833 found++;
836 printk(KERN_NOTICE "pmc551: %d pmc551 devices unloaded\n", found);
839 module_init(init_pmc551);
840 module_exit(cleanup_pmc551);