RT-AC56 3.0.0.4.374.37 core
[tomato.git] / release / src-rt-6.x.4708 / linux / linux-2.6.36 / drivers / media / video / mt9v011.c
blobf5e778d5ca9fdb859754b8d3f99601833029d973
1 /*
2 * mt9v011 -Micron 1/4-Inch VGA Digital Image Sensor
4 * Copyright (c) 2009 Mauro Carvalho Chehab (mchehab@redhat.com)
5 * This code is placed under the terms of the GNU General Public License v2
6 */
8 #include <linux/i2c.h>
9 #include <linux/slab.h>
10 #include <linux/videodev2.h>
11 #include <linux/delay.h>
12 #include <asm/div64.h>
13 #include <media/v4l2-device.h>
14 #include "mt9v011.h"
15 #include <media/v4l2-i2c-drv.h>
16 #include <media/v4l2-chip-ident.h>
18 MODULE_DESCRIPTION("Micron mt9v011 sensor driver");
19 MODULE_AUTHOR("Mauro Carvalho Chehab <mchehab@redhat.com>");
20 MODULE_LICENSE("GPL");
23 static int debug;
24 module_param(debug, int, 0);
25 MODULE_PARM_DESC(debug, "Debug level (0-2)");
27 /* supported controls */
28 static struct v4l2_queryctrl mt9v011_qctrl[] = {
30 .id = V4L2_CID_GAIN,
31 .type = V4L2_CTRL_TYPE_INTEGER,
32 .name = "Gain",
33 .minimum = 0,
34 .maximum = (1 << 10) - 1,
35 .step = 1,
36 .default_value = 0x0020,
37 .flags = 0,
38 }, {
39 .id = V4L2_CID_RED_BALANCE,
40 .type = V4L2_CTRL_TYPE_INTEGER,
41 .name = "Red Balance",
42 .minimum = -1 << 9,
43 .maximum = (1 << 9) - 1,
44 .step = 1,
45 .default_value = 0,
46 .flags = 0,
47 }, {
48 .id = V4L2_CID_BLUE_BALANCE,
49 .type = V4L2_CTRL_TYPE_INTEGER,
50 .name = "Blue Balance",
51 .minimum = -1 << 9,
52 .maximum = (1 << 9) - 1,
53 .step = 1,
54 .default_value = 0,
55 .flags = 0,
56 }, {
57 .id = V4L2_CID_HFLIP,
58 .type = V4L2_CTRL_TYPE_BOOLEAN,
59 .name = "Mirror",
60 .minimum = 0,
61 .maximum = 1,
62 .step = 1,
63 .default_value = 0,
64 .flags = 0,
65 }, {
66 .id = V4L2_CID_VFLIP,
67 .type = V4L2_CTRL_TYPE_BOOLEAN,
68 .name = "Vflip",
69 .minimum = 0,
70 .maximum = 1,
71 .step = 1,
72 .default_value = 0,
73 .flags = 0,
74 }, {
78 struct mt9v011 {
79 struct v4l2_subdev sd;
80 unsigned width, height;
81 unsigned xtal;
82 unsigned hflip:1;
83 unsigned vflip:1;
85 u16 global_gain, red_bal, blue_bal;
88 static inline struct mt9v011 *to_mt9v011(struct v4l2_subdev *sd)
90 return container_of(sd, struct mt9v011, sd);
93 static int mt9v011_read(struct v4l2_subdev *sd, unsigned char addr)
95 struct i2c_client *c = v4l2_get_subdevdata(sd);
96 __be16 buffer;
97 int rc, val;
99 rc = i2c_master_send(c, &addr, 1);
100 if (rc != 1)
101 v4l2_dbg(0, debug, sd,
102 "i2c i/o error: rc == %d (should be 1)\n", rc);
104 msleep(10);
106 rc = i2c_master_recv(c, (char *)&buffer, 2);
107 if (rc != 2)
108 v4l2_dbg(0, debug, sd,
109 "i2c i/o error: rc == %d (should be 2)\n", rc);
111 val = be16_to_cpu(buffer);
113 v4l2_dbg(2, debug, sd, "mt9v011: read 0x%02x = 0x%04x\n", addr, val);
115 return val;
118 static void mt9v011_write(struct v4l2_subdev *sd, unsigned char addr,
119 u16 value)
121 struct i2c_client *c = v4l2_get_subdevdata(sd);
122 unsigned char buffer[3];
123 int rc;
125 buffer[0] = addr;
126 buffer[1] = value >> 8;
127 buffer[2] = value & 0xff;
129 v4l2_dbg(2, debug, sd,
130 "mt9v011: writing 0x%02x 0x%04x\n", buffer[0], value);
131 rc = i2c_master_send(c, buffer, 3);
132 if (rc != 3)
133 v4l2_dbg(0, debug, sd,
134 "i2c i/o error: rc == %d (should be 3)\n", rc);
138 struct i2c_reg_value {
139 unsigned char reg;
140 u16 value;
144 * Values used at the original driver
145 * Some values are marked as Reserved at the datasheet
147 static const struct i2c_reg_value mt9v011_init_default[] = {
148 { R0D_MT9V011_RESET, 0x0001 },
149 { R0D_MT9V011_RESET, 0x0000 },
151 { R0C_MT9V011_SHUTTER_DELAY, 0x0000 },
152 { R09_MT9V011_SHUTTER_WIDTH, 0x1fc },
154 { R0A_MT9V011_CLK_SPEED, 0x0000 },
155 { R1E_MT9V011_DIGITAL_ZOOM, 0x0000 },
157 { R07_MT9V011_OUT_CTRL, 0x0002 }, /* chip enable */
160 static void set_balance(struct v4l2_subdev *sd)
162 struct mt9v011 *core = to_mt9v011(sd);
163 u16 green1_gain, green2_gain, blue_gain, red_gain;
165 green1_gain = core->global_gain;
166 green2_gain = core->global_gain;
168 blue_gain = core->global_gain +
169 core->global_gain * core->blue_bal / (1 << 9);
171 red_gain = core->global_gain +
172 core->global_gain * core->blue_bal / (1 << 9);
174 mt9v011_write(sd, R2B_MT9V011_GREEN_1_GAIN, green1_gain);
175 mt9v011_write(sd, R2E_MT9V011_GREEN_2_GAIN, green1_gain);
176 mt9v011_write(sd, R2C_MT9V011_BLUE_GAIN, blue_gain);
177 mt9v011_write(sd, R2D_MT9V011_RED_GAIN, red_gain);
180 static void calc_fps(struct v4l2_subdev *sd, u32 *numerator, u32 *denominator)
182 struct mt9v011 *core = to_mt9v011(sd);
183 unsigned height, width, hblank, vblank, speed;
184 unsigned row_time, t_time;
185 u64 frames_per_ms;
186 unsigned tmp;
188 height = mt9v011_read(sd, R03_MT9V011_HEIGHT);
189 width = mt9v011_read(sd, R04_MT9V011_WIDTH);
190 hblank = mt9v011_read(sd, R05_MT9V011_HBLANK);
191 vblank = mt9v011_read(sd, R06_MT9V011_VBLANK);
192 speed = mt9v011_read(sd, R0A_MT9V011_CLK_SPEED);
194 row_time = (width + 113 + hblank) * (speed + 2);
195 t_time = row_time * (height + vblank + 1);
197 frames_per_ms = core->xtal * 1000l;
198 do_div(frames_per_ms, t_time);
199 tmp = frames_per_ms;
201 v4l2_dbg(1, debug, sd, "Programmed to %u.%03u fps (%d pixel clcks)\n",
202 tmp / 1000, tmp % 1000, t_time);
204 if (numerator && denominator) {
205 *numerator = 1000;
206 *denominator = (u32)frames_per_ms;
210 static u16 calc_speed(struct v4l2_subdev *sd, u32 numerator, u32 denominator)
212 struct mt9v011 *core = to_mt9v011(sd);
213 unsigned height, width, hblank, vblank;
214 unsigned row_time, line_time;
215 u64 t_time, speed;
217 /* Avoid bogus calculus */
218 if (!numerator || !denominator)
219 return 0;
221 height = mt9v011_read(sd, R03_MT9V011_HEIGHT);
222 width = mt9v011_read(sd, R04_MT9V011_WIDTH);
223 hblank = mt9v011_read(sd, R05_MT9V011_HBLANK);
224 vblank = mt9v011_read(sd, R06_MT9V011_VBLANK);
226 row_time = width + 113 + hblank;
227 line_time = height + vblank + 1;
229 t_time = core->xtal * ((u64)numerator);
230 /* round to the closest value */
231 t_time += denominator / 2;
232 do_div(t_time, denominator);
234 speed = t_time;
235 do_div(speed, row_time * line_time);
237 /* Avoid having a negative value for speed */
238 if (speed < 2)
239 speed = 0;
240 else
241 speed -= 2;
243 /* Avoid speed overflow */
244 if (speed > 15)
245 return 15;
247 return (u16)speed;
250 static void set_res(struct v4l2_subdev *sd)
252 struct mt9v011 *core = to_mt9v011(sd);
253 unsigned vstart, hstart;
256 * The mt9v011 doesn't have scaling. So, in order to select the desired
257 * resolution, we're cropping at the middle of the sensor.
258 * hblank and vblank should be adjusted, in order to warrant that
259 * we'll preserve the line timings for 30 fps, no matter what resolution
260 * is selected.
261 * NOTE: datasheet says that width (and height) should be filled with
262 * width-1. However, this doesn't work, since one pixel per line will
263 * be missing.
266 hstart = 14 + (640 - core->width) / 2;
267 mt9v011_write(sd, R02_MT9V011_COLSTART, hstart);
268 mt9v011_write(sd, R04_MT9V011_WIDTH, core->width);
269 mt9v011_write(sd, R05_MT9V011_HBLANK, 771 - core->width);
271 vstart = 8 + (480 - core->height) / 2;
272 mt9v011_write(sd, R01_MT9V011_ROWSTART, vstart);
273 mt9v011_write(sd, R03_MT9V011_HEIGHT, core->height);
274 mt9v011_write(sd, R06_MT9V011_VBLANK, 508 - core->height);
276 calc_fps(sd, NULL, NULL);
279 static void set_read_mode(struct v4l2_subdev *sd)
281 struct mt9v011 *core = to_mt9v011(sd);
282 unsigned mode = 0x1000;
284 if (core->hflip)
285 mode |= 0x4000;
287 if (core->vflip)
288 mode |= 0x8000;
290 mt9v011_write(sd, R20_MT9V011_READ_MODE, mode);
293 static int mt9v011_reset(struct v4l2_subdev *sd, u32 val)
295 int i;
297 for (i = 0; i < ARRAY_SIZE(mt9v011_init_default); i++)
298 mt9v011_write(sd, mt9v011_init_default[i].reg,
299 mt9v011_init_default[i].value);
301 set_balance(sd);
302 set_res(sd);
303 set_read_mode(sd);
305 return 0;
308 static int mt9v011_g_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
310 struct mt9v011 *core = to_mt9v011(sd);
312 v4l2_dbg(1, debug, sd, "g_ctrl called\n");
314 switch (ctrl->id) {
315 case V4L2_CID_GAIN:
316 ctrl->value = core->global_gain;
317 return 0;
318 case V4L2_CID_RED_BALANCE:
319 ctrl->value = core->red_bal;
320 return 0;
321 case V4L2_CID_BLUE_BALANCE:
322 ctrl->value = core->blue_bal;
323 return 0;
324 case V4L2_CID_HFLIP:
325 ctrl->value = core->hflip ? 1 : 0;
326 return 0;
327 case V4L2_CID_VFLIP:
328 ctrl->value = core->vflip ? 1 : 0;
329 return 0;
331 return -EINVAL;
334 static int mt9v011_queryctrl(struct v4l2_subdev *sd, struct v4l2_queryctrl *qc)
336 int i;
338 v4l2_dbg(1, debug, sd, "queryctrl called\n");
340 for (i = 0; i < ARRAY_SIZE(mt9v011_qctrl); i++)
341 if (qc->id && qc->id == mt9v011_qctrl[i].id) {
342 memcpy(qc, &(mt9v011_qctrl[i]),
343 sizeof(*qc));
344 return 0;
347 return -EINVAL;
351 static int mt9v011_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
353 struct mt9v011 *core = to_mt9v011(sd);
354 u8 i, n;
355 n = ARRAY_SIZE(mt9v011_qctrl);
357 for (i = 0; i < n; i++) {
358 if (ctrl->id != mt9v011_qctrl[i].id)
359 continue;
360 if (ctrl->value < mt9v011_qctrl[i].minimum ||
361 ctrl->value > mt9v011_qctrl[i].maximum)
362 return -ERANGE;
363 v4l2_dbg(1, debug, sd, "s_ctrl: id=%d, value=%d\n",
364 ctrl->id, ctrl->value);
365 break;
368 switch (ctrl->id) {
369 case V4L2_CID_GAIN:
370 core->global_gain = ctrl->value;
371 break;
372 case V4L2_CID_RED_BALANCE:
373 core->red_bal = ctrl->value;
374 break;
375 case V4L2_CID_BLUE_BALANCE:
376 core->blue_bal = ctrl->value;
377 break;
378 case V4L2_CID_HFLIP:
379 core->hflip = ctrl->value;
380 set_read_mode(sd);
381 return 0;
382 case V4L2_CID_VFLIP:
383 core->vflip = ctrl->value;
384 set_read_mode(sd);
385 return 0;
386 default:
387 return -EINVAL;
390 set_balance(sd);
392 return 0;
395 static int mt9v011_enum_mbus_fmt(struct v4l2_subdev *sd, unsigned index,
396 enum v4l2_mbus_pixelcode *code)
398 if (index > 0)
399 return -EINVAL;
401 *code = V4L2_MBUS_FMT_SGRBG8_1X8;
402 return 0;
405 static int mt9v011_try_mbus_fmt(struct v4l2_subdev *sd, struct v4l2_mbus_framefmt *fmt)
407 if (fmt->code != V4L2_MBUS_FMT_SGRBG8_1X8)
408 return -EINVAL;
410 v4l_bound_align_image(&fmt->width, 48, 639, 1,
411 &fmt->height, 32, 480, 1, 0);
412 fmt->field = V4L2_FIELD_NONE;
413 fmt->colorspace = V4L2_COLORSPACE_SRGB;
415 return 0;
418 static int mt9v011_g_parm(struct v4l2_subdev *sd, struct v4l2_streamparm *parms)
420 struct v4l2_captureparm *cp = &parms->parm.capture;
422 if (parms->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
423 return -EINVAL;
425 memset(cp, 0, sizeof(struct v4l2_captureparm));
426 cp->capability = V4L2_CAP_TIMEPERFRAME;
427 calc_fps(sd,
428 &cp->timeperframe.numerator,
429 &cp->timeperframe.denominator);
431 return 0;
434 static int mt9v011_s_parm(struct v4l2_subdev *sd, struct v4l2_streamparm *parms)
436 struct v4l2_captureparm *cp = &parms->parm.capture;
437 struct v4l2_fract *tpf = &cp->timeperframe;
438 u16 speed;
440 if (parms->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
441 return -EINVAL;
442 if (cp->extendedmode != 0)
443 return -EINVAL;
445 speed = calc_speed(sd, tpf->numerator, tpf->denominator);
447 mt9v011_write(sd, R0A_MT9V011_CLK_SPEED, speed);
448 v4l2_dbg(1, debug, sd, "Setting speed to %d\n", speed);
450 /* Recalculate and update fps info */
451 calc_fps(sd, &tpf->numerator, &tpf->denominator);
453 return 0;
456 static int mt9v011_s_mbus_fmt(struct v4l2_subdev *sd, struct v4l2_mbus_framefmt *fmt)
458 struct mt9v011 *core = to_mt9v011(sd);
459 int rc;
461 rc = mt9v011_try_mbus_fmt(sd, fmt);
462 if (rc < 0)
463 return -EINVAL;
465 core->width = fmt->width;
466 core->height = fmt->height;
468 set_res(sd);
470 return 0;
473 static int mt9v011_s_config(struct v4l2_subdev *sd, int dumb, void *data)
475 struct mt9v011 *core = to_mt9v011(sd);
476 unsigned *xtal = data;
478 v4l2_dbg(1, debug, sd, "s_config called\n");
480 if (xtal) {
481 core->xtal = *xtal;
482 v4l2_dbg(1, debug, sd, "xtal set to %d.%03d MHz\n",
483 *xtal / 1000000, (*xtal / 1000) % 1000);
486 return 0;
490 #ifdef CONFIG_VIDEO_ADV_DEBUG
491 static int mt9v011_g_register(struct v4l2_subdev *sd,
492 struct v4l2_dbg_register *reg)
494 struct i2c_client *client = v4l2_get_subdevdata(sd);
496 if (!v4l2_chip_match_i2c_client(client, &reg->match))
497 return -EINVAL;
498 if (!capable(CAP_SYS_ADMIN))
499 return -EPERM;
501 reg->val = mt9v011_read(sd, reg->reg & 0xff);
502 reg->size = 2;
504 return 0;
507 static int mt9v011_s_register(struct v4l2_subdev *sd,
508 struct v4l2_dbg_register *reg)
510 struct i2c_client *client = v4l2_get_subdevdata(sd);
512 if (!v4l2_chip_match_i2c_client(client, &reg->match))
513 return -EINVAL;
514 if (!capable(CAP_SYS_ADMIN))
515 return -EPERM;
517 mt9v011_write(sd, reg->reg & 0xff, reg->val & 0xffff);
519 return 0;
521 #endif
523 static int mt9v011_g_chip_ident(struct v4l2_subdev *sd,
524 struct v4l2_dbg_chip_ident *chip)
526 u16 version;
527 struct i2c_client *client = v4l2_get_subdevdata(sd);
529 version = mt9v011_read(sd, R00_MT9V011_CHIP_VERSION);
531 return v4l2_chip_ident_i2c_client(client, chip, V4L2_IDENT_MT9V011,
532 version);
535 static const struct v4l2_subdev_core_ops mt9v011_core_ops = {
536 .queryctrl = mt9v011_queryctrl,
537 .g_ctrl = mt9v011_g_ctrl,
538 .s_ctrl = mt9v011_s_ctrl,
539 .reset = mt9v011_reset,
540 .s_config = mt9v011_s_config,
541 .g_chip_ident = mt9v011_g_chip_ident,
542 #ifdef CONFIG_VIDEO_ADV_DEBUG
543 .g_register = mt9v011_g_register,
544 .s_register = mt9v011_s_register,
545 #endif
548 static const struct v4l2_subdev_video_ops mt9v011_video_ops = {
549 .enum_mbus_fmt = mt9v011_enum_mbus_fmt,
550 .try_mbus_fmt = mt9v011_try_mbus_fmt,
551 .s_mbus_fmt = mt9v011_s_mbus_fmt,
552 .g_parm = mt9v011_g_parm,
553 .s_parm = mt9v011_s_parm,
556 static const struct v4l2_subdev_ops mt9v011_ops = {
557 .core = &mt9v011_core_ops,
558 .video = &mt9v011_video_ops,
562 /****************************************************************************
563 I2C Client & Driver
564 ****************************************************************************/
566 static int mt9v011_probe(struct i2c_client *c,
567 const struct i2c_device_id *id)
569 u16 version;
570 struct mt9v011 *core;
571 struct v4l2_subdev *sd;
573 /* Check if the adapter supports the needed features */
574 if (!i2c_check_functionality(c->adapter,
575 I2C_FUNC_SMBUS_READ_BYTE | I2C_FUNC_SMBUS_WRITE_BYTE_DATA))
576 return -EIO;
578 core = kzalloc(sizeof(struct mt9v011), GFP_KERNEL);
579 if (!core)
580 return -ENOMEM;
582 sd = &core->sd;
583 v4l2_i2c_subdev_init(sd, c, &mt9v011_ops);
585 /* Check if the sensor is really a MT9V011 */
586 version = mt9v011_read(sd, R00_MT9V011_CHIP_VERSION);
587 if ((version != MT9V011_VERSION) &&
588 (version != MT9V011_REV_B_VERSION)) {
589 v4l2_info(sd, "*** unknown micron chip detected (0x%04x).\n",
590 version);
591 kfree(core);
592 return -EINVAL;
595 core->global_gain = 0x0024;
596 core->width = 640;
597 core->height = 480;
598 core->xtal = 27000000; /* Hz */
600 v4l_info(c, "chip found @ 0x%02x (%s - chip version 0x%04x)\n",
601 c->addr << 1, c->adapter->name, version);
603 return 0;
606 static int mt9v011_remove(struct i2c_client *c)
608 struct v4l2_subdev *sd = i2c_get_clientdata(c);
610 v4l2_dbg(1, debug, sd,
611 "mt9v011.c: removing mt9v011 adapter on address 0x%x\n",
612 c->addr << 1);
614 v4l2_device_unregister_subdev(sd);
615 kfree(to_mt9v011(sd));
616 return 0;
619 /* ----------------------------------------------------------------------- */
621 static const struct i2c_device_id mt9v011_id[] = {
622 { "mt9v011", 0 },
625 MODULE_DEVICE_TABLE(i2c, mt9v011_id);
627 static struct v4l2_i2c_driver_data v4l2_i2c_data = {
628 .name = "mt9v011",
629 .probe = mt9v011_probe,
630 .remove = mt9v011_remove,
631 .id_table = mt9v011_id,