release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/gpu/drm/nouveau/nouveau_drv.c

   1 /*
   2  * Copyright 2005 Stephane Marchesin.
   3  * All Rights Reserved.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
  20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  22  * OTHER DEALINGS IN THE SOFTWARE.
  23  */
  24
  25 #include <linux/console.h>
  26
  27 #include "drmP.h"
  28 #include "drm.h"
  29 #include "drm_crtc_helper.h"
  30 #include "nouveau_drv.h"
  31 #include "nouveau_hw.h"
  32 #include "nouveau_fb.h"
  33 #include "nouveau_fbcon.h"
  34 #include "nv50_display.h"
  35
  36 #include "drm_pciids.h"
  37
  38 MODULE_PARM_DESC(noagp, "Disable AGP");
  39 int nouveau_noagp;
  40 module_param_named(noagp, nouveau_noagp, int, 0400);
  41
  42 MODULE_PARM_DESC(modeset, "Enable kernel modesetting");
  43 static int nouveau_modeset = -1; /* kms */
  44 module_param_named(modeset, nouveau_modeset, int, 0400);
  45
  46 MODULE_PARM_DESC(vbios, "Override default VBIOS location");
  47 char *nouveau_vbios;
  48 module_param_named(vbios, nouveau_vbios, charp, 0400);
  49
  50 MODULE_PARM_DESC(vram_pushbuf, "Force DMA push buffers to be in VRAM");
  51 int nouveau_vram_pushbuf;
  52 module_param_named(vram_pushbuf, nouveau_vram_pushbuf, int, 0400);
  53
  54 MODULE_PARM_DESC(vram_notify, "Force DMA notifiers to be in VRAM");
  55 int nouveau_vram_notify = 0;
  56 module_param_named(vram_notify, nouveau_vram_notify, int, 0400);
  57
  58 MODULE_PARM_DESC(duallink, "Allow dual-link TMDS (>=GeForce 8)");
  59 int nouveau_duallink = 1;
  60 module_param_named(duallink, nouveau_duallink, int, 0400);
  61
  62 MODULE_PARM_DESC(uscript_lvds, "LVDS output script table ID (>=GeForce 8)");
  63 int nouveau_uscript_lvds = -1;
  64 module_param_named(uscript_lvds, nouveau_uscript_lvds, int, 0400);
  65
  66 MODULE_PARM_DESC(uscript_tmds, "TMDS output script table ID (>=GeForce 8)");
  67 int nouveau_uscript_tmds = -1;
  68 module_param_named(uscript_tmds, nouveau_uscript_tmds, int, 0400);
  69
  70 MODULE_PARM_DESC(ignorelid, "Ignore ACPI lid status");
  71 int nouveau_ignorelid = 0;
  72 module_param_named(ignorelid, nouveau_ignorelid, int, 0400);
  73
  74 MODULE_PARM_DESC(noaccel, "Disable all acceleration");
  75 int nouveau_noaccel = 0;
  76 module_param_named(noaccel, nouveau_noaccel, int, 0400);
  77
  78 MODULE_PARM_DESC(nofbaccel, "Disable fbcon acceleration");
  79 int nouveau_nofbaccel = 0;
  80 module_param_named(nofbaccel, nouveau_nofbaccel, int, 0400);
  81
  82 MODULE_PARM_DESC(override_conntype, "Ignore DCB connector type");
  83 int nouveau_override_conntype = 0;
  84 module_param_named(override_conntype, nouveau_override_conntype, int, 0400);
  85
  86 MODULE_PARM_DESC(tv_disable, "Disable TV-out detection\n");
  87 int nouveau_tv_disable = 0;
  88 module_param_named(tv_disable, nouveau_tv_disable, int, 0400);
  89
  90 MODULE_PARM_DESC(tv_norm, "Default TV norm.\n"
  91                  "\t\tSupported: PAL, PAL-M, PAL-N, PAL-Nc, NTSC-M, NTSC-J,\n"
  92                  "\t\t\thd480i, hd480p, hd576i, hd576p, hd720p, hd1080i.\n"
  93                  "\t\tDefault: PAL\n"
  94                  "\t\t*NOTE* Ignored for cards with external TV encoders.");
  95 char *nouveau_tv_norm;
  96 module_param_named(tv_norm, nouveau_tv_norm, charp, 0400);
  97
  98 MODULE_PARM_DESC(reg_debug, "Register access debug bitmask:\n"
  99                 "\t\t0x1 mc, 0x2 video, 0x4 fb, 0x8 extdev,\n"
 100                 "\t\t0x10 crtc, 0x20 ramdac, 0x40 vgacrtc, 0x80 rmvio,\n"
 101                 "\t\t0x100 vgaattr, 0x200 EVO (G80+). ");
 102 int nouveau_reg_debug;
 103 module_param_named(reg_debug, nouveau_reg_debug, int, 0600);
 104
 105 int nouveau_fbpercrtc;
 106
 107 static struct pci_device_id pciidlist[] = {
 108         {
 109                 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
 110                 .class = PCI_BASE_CLASS_DISPLAY << 16,
 111                 .class_mask  = 0xff << 16,
 112         },
 113         {
 114                 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID),
 115                 .class = PCI_BASE_CLASS_DISPLAY << 16,
 116                 .class_mask  = 0xff << 16,
 117         },
 118         {}
 119 };
 120
 121 MODULE_DEVICE_TABLE(pci, pciidlist);
 122
 123 static struct drm_driver driver;
 124
 125 static int __devinit
 126 nouveau_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
 127 {
 128         return drm_get_pci_dev(pdev, ent, &driver);
 129 }
 130
 131 static void
 132 nouveau_pci_remove(struct pci_dev *pdev)
 133 {
 134         struct drm_device *dev = pci_get_drvdata(pdev);
 135
 136         drm_put_dev(dev);
 137 }
 138
 139 int
 140 nouveau_pci_suspend(struct pci_dev *pdev, pm_message_t pm_state)
 141 {
 142         struct drm_device *dev = pci_get_drvdata(pdev);
 143         struct drm_nouveau_private *dev_priv = dev->dev_private;
 144         struct nouveau_instmem_engine *pinstmem = &dev_priv->engine.instmem;
 145         struct nouveau_pgraph_engine *pgraph = &dev_priv->engine.graph;
 146         struct nouveau_fifo_engine *pfifo = &dev_priv->engine.fifo;
 147         struct nouveau_channel *chan;
 148         struct drm_crtc *crtc;
 149         int ret, i;
 150
 151         if (pm_state.event == PM_EVENT_PRETHAW)
 152                 return 0;
 153
 154         NV_INFO(dev, "Disabling fbcon acceleration...\n");
 155         nouveau_fbcon_save_disable_accel(dev);
 156
 157         NV_INFO(dev, "Unpinning framebuffer(s)...\n");
 158         list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
 159                 struct nouveau_framebuffer *nouveau_fb;
 160
 161                 nouveau_fb = nouveau_framebuffer(crtc->fb);
 162                 if (!nouveau_fb || !nouveau_fb->nvbo)
 163                         continue;
 164
 165                 nouveau_bo_unpin(nouveau_fb->nvbo);
 166         }
 167
 168         list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
 169                 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
 170
 171                 nouveau_bo_unmap(nv_crtc->cursor.nvbo);
 172                 nouveau_bo_unpin(nv_crtc->cursor.nvbo);
 173         }
 174
 175         NV_INFO(dev, "Evicting buffers...\n");
 176         ttm_bo_evict_mm(&dev_priv->ttm.bdev, TTM_PL_VRAM);
 177
 178         NV_INFO(dev, "Idling channels...\n");
 179         for (i = 0; i < pfifo->channels; i++) {
 180                 struct nouveau_fence *fence = NULL;
 181
 182                 chan = dev_priv->fifos[i];
 183                 if (!chan || (dev_priv->card_type >= NV_50 &&
 184                               chan == dev_priv->fifos[0]))
 185                         continue;
 186
 187                 ret = nouveau_fence_new(chan, &fence, true);
 188                 if (ret == 0) {
 189                         ret = nouveau_fence_wait(fence, NULL, false, false);
 190                         nouveau_fence_unref((void *)&fence);
 191                 }
 192
 193                 if (ret) {
 194                         NV_ERROR(dev, "Failed to idle channel %d for suspend\n",
 195                                  chan->id);
 196                 }
 197         }
 198
 199         pgraph->fifo_access(dev, false);
 200         nouveau_wait_for_idle(dev);
 201         pfifo->reassign(dev, false);
 202         pfifo->disable(dev);
 203         pfifo->unload_context(dev);
 204         pgraph->unload_context(dev);
 205
 206         NV_INFO(dev, "Suspending GPU objects...\n");
 207         ret = nouveau_gpuobj_suspend(dev);
 208         if (ret) {
 209                 NV_ERROR(dev, "... failed: %d\n", ret);
 210                 goto out_abort;
 211         }
 212
 213         ret = pinstmem->suspend(dev);
 214         if (ret) {
 215                 NV_ERROR(dev, "... failed: %d\n", ret);
 216                 nouveau_gpuobj_suspend_cleanup(dev);
 217                 goto out_abort;
 218         }
 219
 220         NV_INFO(dev, "And we're gone!\n");
 221         pci_save_state(pdev);
 222         if (pm_state.event == PM_EVENT_SUSPEND) {
 223                 pci_disable_device(pdev);
 224                 pci_set_power_state(pdev, PCI_D3hot);
 225         }
 226
 227         acquire_console_sem();
 228         nouveau_fbcon_set_suspend(dev, 1);
 229         release_console_sem();
 230         nouveau_fbcon_restore_accel(dev);
 231         return 0;
 232
 233 out_abort:
 234         NV_INFO(dev, "Re-enabling acceleration..\n");
 235         pfifo->enable(dev);
 236         pfifo->reassign(dev, true);
 237         pgraph->fifo_access(dev, true);
 238         return ret;
 239 }
 240
 241 int
 242 nouveau_pci_resume(struct pci_dev *pdev)
 243 {
 244         struct drm_device *dev = pci_get_drvdata(pdev);
 245         struct drm_nouveau_private *dev_priv = dev->dev_private;
 246         struct nouveau_engine *engine = &dev_priv->engine;
 247         struct drm_crtc *crtc;
 248         int ret, i;
 249
 250         nouveau_fbcon_save_disable_accel(dev);
 251
 252         NV_INFO(dev, "We're back, enabling device...\n");
 253         pci_set_power_state(pdev, PCI_D0);
 254         pci_restore_state(pdev);
 255         if (pci_enable_device(pdev))
 256                 return -1;
 257         pci_set_master(dev->pdev);
 258
 259         /* Make sure the AGP controller is in a consistent state */
 260         if (dev_priv->gart_info.type == NOUVEAU_GART_AGP)
 261                 nouveau_mem_reset_agp(dev);
 262
 263         /* Make the CRTCs accessible */
 264         engine->display.early_init(dev);
 265
 266         NV_INFO(dev, "POSTing device...\n");
 267         ret = nouveau_run_vbios_init(dev);
 268         if (ret)
 269                 return ret;
 270
 271         if (dev_priv->gart_info.type == NOUVEAU_GART_AGP) {
 272                 ret = nouveau_mem_init_agp(dev);
 273                 if (ret) {
 274                         NV_ERROR(dev, "error reinitialising AGP: %d\n", ret);
 275                         return ret;
 276                 }
 277         }
 278
 279         NV_INFO(dev, "Reinitialising engines...\n");
 280         engine->instmem.resume(dev);
 281         engine->mc.init(dev);
 282         engine->timer.init(dev);
 283         engine->fb.init(dev);
 284         engine->graph.init(dev);
 285         engine->fifo.init(dev);
 286
 287         NV_INFO(dev, "Restoring GPU objects...\n");
 288         nouveau_gpuobj_resume(dev);
 289
 290         nouveau_irq_postinstall(dev);
 291
 292         /* Re-write SKIPS, they'll have been lost over the suspend */
 293         if (nouveau_vram_pushbuf) {
 294                 struct nouveau_channel *chan;
 295                 int j;
 296
 297                 for (i = 0; i < dev_priv->engine.fifo.channels; i++) {
 298                         chan = dev_priv->fifos[i];
 299                         if (!chan || !chan->pushbuf_bo)
 300                                 continue;
 301
 302                         for (j = 0; j < NOUVEAU_DMA_SKIPS; j++)
 303                                 nouveau_bo_wr32(chan->pushbuf_bo, i, 0);
 304                 }
 305         }
 306
 307         NV_INFO(dev, "Restoring mode...\n");
 308         list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
 309                 struct nouveau_framebuffer *nouveau_fb;
 310
 311                 nouveau_fb = nouveau_framebuffer(crtc->fb);
 312                 if (!nouveau_fb || !nouveau_fb->nvbo)
 313                         continue;
 314
 315                 nouveau_bo_pin(nouveau_fb->nvbo, TTM_PL_FLAG_VRAM);
 316         }
 317
 318         list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
 319                 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
 320
 321                 ret = nouveau_bo_pin(nv_crtc->cursor.nvbo, TTM_PL_FLAG_VRAM);
 322                 if (!ret)
 323                         ret = nouveau_bo_map(nv_crtc->cursor.nvbo);
 324                 if (ret)
 325                         NV_ERROR(dev, "Could not pin/map cursor.\n");
 326         }
 327
 328         engine->display.init(dev);
 329
 330         list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
 331                 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
 332
 333                 nv_crtc->cursor.set_offset(nv_crtc,
 334                                         nv_crtc->cursor.nvbo->bo.offset -
 335                                         dev_priv->vm_vram_base);
 336
 337                 nv_crtc->cursor.set_pos(nv_crtc, nv_crtc->cursor_saved_x,
 338                         nv_crtc->cursor_saved_y);
 339         }
 340
 341         /* Force CLUT to get re-loaded during modeset */
 342         list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
 343                 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
 344
 345                 nv_crtc->lut.depth = 0;
 346         }
 347
 348         acquire_console_sem();
 349         nouveau_fbcon_set_suspend(dev, 0);
 350         release_console_sem();
 351
 352         nouveau_fbcon_zfill_all(dev);
 353
 354         drm_helper_resume_force_mode(dev);
 355
 356         nouveau_fbcon_restore_accel(dev);
 357         return 0;
 358 }
 359
 360 static struct drm_driver driver = {
 361         .driver_features =
 362                 DRIVER_USE_AGP | DRIVER_PCI_DMA | DRIVER_SG |
 363                 DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM |
 364                 DRIVER_MODESET,
 365         .load = nouveau_load,
 366         .firstopen = nouveau_firstopen,
 367         .lastclose = nouveau_lastclose,
 368         .unload = nouveau_unload,
 369         .preclose = nouveau_preclose,
 370 #if defined(CONFIG_DRM_NOUVEAU_DEBUG)
 371         .debugfs_init = nouveau_debugfs_init,
 372         .debugfs_cleanup = nouveau_debugfs_takedown,
 373 #endif
 374         .irq_preinstall = nouveau_irq_preinstall,
 375         .irq_postinstall = nouveau_irq_postinstall,
 376         .irq_uninstall = nouveau_irq_uninstall,
 377         .irq_handler = nouveau_irq_handler,
 378         .reclaim_buffers = drm_core_reclaim_buffers,
 379         .get_map_ofs = drm_core_get_map_ofs,
 380         .get_reg_ofs = drm_core_get_reg_ofs,
 381         .ioctls = nouveau_ioctls,
 382         .fops = {
 383                 .owner = THIS_MODULE,
 384                 .open = drm_open,
 385                 .release = drm_release,
 386                 .unlocked_ioctl = drm_ioctl,
 387                 .mmap = nouveau_ttm_mmap,
 388                 .poll = drm_poll,
 389                 .fasync = drm_fasync,
 390 #if defined(CONFIG_COMPAT)
 391                 .compat_ioctl = nouveau_compat_ioctl,
 392 #endif
 393         },
 394         .pci_driver = {
 395                 .name = DRIVER_NAME,
 396                 .id_table = pciidlist,
 397                 .probe = nouveau_pci_probe,
 398                 .remove = nouveau_pci_remove,
 399                 .suspend = nouveau_pci_suspend,
 400                 .resume = nouveau_pci_resume
 401         },
 402
 403         .gem_init_object = nouveau_gem_object_new,
 404         .gem_free_object = nouveau_gem_object_del,
 405
 406         .name = DRIVER_NAME,
 407         .desc = DRIVER_DESC,
 408 #ifdef GIT_REVISION
 409         .date = GIT_REVISION,
 410 #else
 411         .date = DRIVER_DATE,
 412 #endif
 413         .major = DRIVER_MAJOR,
 414         .minor = DRIVER_MINOR,
 415         .patchlevel = DRIVER_PATCHLEVEL,
 416 };
 417
 418 static int __init nouveau_init(void)
 419 {
 420         driver.num_ioctls = nouveau_max_ioctl;
 421
 422         if (nouveau_modeset == -1) {
 423 #ifdef CONFIG_VGA_CONSOLE
 424                 if (vgacon_text_force())
 425                         nouveau_modeset = 0;
 426                 else
 427 #endif
 428                         nouveau_modeset = 1;
 429         }
 430
 431         if (!nouveau_modeset)
 432                 return 0;
 433
 434         nouveau_register_dsm_handler();
 435         return drm_init(&driver);
 436 }
 437
 438 static void __exit nouveau_exit(void)
 439 {
 440         if (!nouveau_modeset)
 441                 return;
 442
 443         drm_exit(&driver);
 444         nouveau_unregister_dsm_handler();
 445 }
 446
 447 module_init(nouveau_init);
 448 module_exit(nouveau_exit);
 449
 450 MODULE_AUTHOR(DRIVER_AUTHOR);
 451 MODULE_DESCRIPTION(DRIVER_DESC);
 452 MODULE_LICENSE("GPL and additional rights");