?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
RT-AC56 3.0.0.4.374.37 core
[tomato.git] / release / src-rt-6.x.4708 / linux / linux-2.6.36 / drivers / block / swim3.c
blob12014920dfe51e138d4a6d8cf154218b27349a8b
1 /*
2 * Driver for the SWIM3 (Super Woz Integrated Machine 3)
3 * floppy controller found on Power Macintoshes.
4 *
5 * Copyright (C) 1996 Paul Mackerras.
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13 /*
14 * TODO:
15 * handle 2 drives
16 * handle GCR disks
17 */
18
19 #include <linux/stddef.h>
20 #include <linux/kernel.h>
21 #include <linux/sched.h>
22 #include <linux/timer.h>
23 #include <linux/delay.h>
24 #include <linux/fd.h>
25 #include <linux/ioctl.h>
26 #include <linux/blkdev.h>
27 #include <linux/interrupt.h>
28 #include <linux/smp_lock.h>
29 #include <linux/module.h>
30 #include <linux/spinlock.h>
31 #include <asm/io.h>
32 #include <asm/dbdma.h>
33 #include <asm/prom.h>
34 #include <asm/uaccess.h>
35 #include <asm/mediabay.h>
36 #include <asm/machdep.h>
37 #include <asm/pmac_feature.h>
38
39 static struct request_queue *swim3_queue;
40 static struct gendisk *disks[2];
41 static struct request *fd_req;
42
43 #define MAX_FLOPPIES 2
44
45 enum swim_state {
46 idle,
47 locating,
48 seeking,
49 settling,
50 do_transfer,
51 jogging,
52 available,
53 revalidating,
54 ejecting
55 };
56
57 #define REG(x) unsigned char x; char x ## _pad[15];
58
59 /*
60 * The names for these registers mostly represent speculation on my part.
61 * It will be interesting to see how close they are to the names Apple uses.
62 */
63 struct swim3 {
64 REG(data);
65 REG(timer); /* counts down at 1MHz */
66 REG(error);
67 REG(mode);
68 REG(select); /* controls CA0, CA1, CA2 and LSTRB signals */
69 REG(setup);
70 REG(control); /* writing bits clears them */
71 REG(status); /* writing bits sets them in control */
72 REG(intr);
73 REG(nseek); /* # tracks to seek */
74 REG(ctrack); /* current track number */
75 REG(csect); /* current sector number */
76 REG(gap3); /* size of gap 3 in track format */
77 REG(sector); /* sector # to read or write */
78 REG(nsect); /* # sectors to read or write */
79 REG(intr_enable);
80 };
81
82 #define control_bic control
83 #define control_bis status
84
85 /* Bits in select register */
86 #define CA_MASK 7
87 #define LSTRB 8
88
89 /* Bits in control register */
90 #define DO_SEEK 0x80
91 #define FORMAT 0x40
92 #define SELECT 0x20
93 #define WRITE_SECTORS 0x10
94 #define DO_ACTION 0x08
95 #define DRIVE2_ENABLE 0x04
96 #define DRIVE_ENABLE 0x02
97 #define INTR_ENABLE 0x01
98
99 /* Bits in status register */
100 #define FIFO_1BYTE 0x80
101 #define FIFO_2BYTE 0x40
102 #define ERROR 0x20
103 #define DATA 0x08
104 #define RDDATA 0x04
105 #define INTR_PENDING 0x02
106 #define MARK_BYTE 0x01
107
108 /* Bits in intr and intr_enable registers */
109 #define ERROR_INTR 0x20
110 #define DATA_CHANGED 0x10
111 #define TRANSFER_DONE 0x08
112 #define SEEN_SECTOR 0x04
113 #define SEEK_DONE 0x02
114 #define TIMER_DONE 0x01
115
116 /* Bits in error register */
117 #define ERR_DATA_CRC 0x80
118 #define ERR_ADDR_CRC 0x40
119 #define ERR_OVERRUN 0x04
120 #define ERR_UNDERRUN 0x01
121
122 /* Bits in setup register */
123 #define S_SW_RESET 0x80
124 #define S_GCR_WRITE 0x40
125 #define S_IBM_DRIVE 0x20
126 #define S_TEST_MODE 0x10
127 #define S_FCLK_DIV2 0x08
128 #define S_GCR 0x04
129 #define S_COPY_PROT 0x02
130 #define S_INV_WDATA 0x01
131
132 /* Select values for swim3_action */
133 #define SEEK_POSITIVE 0
134 #define SEEK_NEGATIVE 4
135 #define STEP 1
136 #define MOTOR_ON 2
137 #define MOTOR_OFF 6
138 #define INDEX 3
139 #define EJECT 7
140 #define SETMFM 9
141 #define SETGCR 13
142
143 /* Select values for swim3_select and swim3_readbit */
144 #define STEP_DIR 0
145 #define STEPPING 1
146 #define MOTOR_ON 2
147 #define RELAX 3 /* also eject in progress */
148 #define READ_DATA_0 4
149 #define TWOMEG_DRIVE 5
150 #define SINGLE_SIDED 6 /* drive or diskette is 4MB type? */
151 #define DRIVE_PRESENT 7
152 #define DISK_IN 8
153 #define WRITE_PROT 9
154 #define TRACK_ZERO 10
155 #define TACHO 11
156 #define READ_DATA_1 12
157 #define MFM_MODE 13
158 #define SEEK_COMPLETE 14
159 #define ONEMEG_MEDIA 15
160
161 /* Definitions of values used in writing and formatting */
162 #define DATA_ESCAPE 0x99
163 #define GCR_SYNC_EXC 0x3f
164 #define GCR_SYNC_CONV 0x80
165 #define GCR_FIRST_MARK 0xd5
166 #define GCR_SECOND_MARK 0xaa
167 #define GCR_ADDR_MARK "\xd5\xaa\x00"
168 #define GCR_DATA_MARK "\xd5\xaa\x0b"
169 #define GCR_SLIP_BYTE "\x27\xaa"
170 #define GCR_SELF_SYNC "\x3f\xbf\x1e\x34\x3c\x3f"
171
172 #define DATA_99 "\x99\x99"
173 #define MFM_ADDR_MARK "\x99\xa1\x99\xa1\x99\xa1\x99\xfe"
174 #define MFM_INDEX_MARK "\x99\xc2\x99\xc2\x99\xc2\x99\xfc"
175 #define MFM_GAP_LEN 12
176
177 struct floppy_state {
178 enum swim_state state;
179 spinlock_t lock;
180 struct swim3 __iomem *swim3; /* hardware registers */
181 struct dbdma_regs __iomem *dma; /* DMA controller registers */
182 int swim3_intr; /* interrupt number for SWIM3 */
183 int dma_intr; /* interrupt number for DMA channel */
184 int cur_cyl; /* cylinder head is on, or -1 */
185 int cur_sector; /* last sector we saw go past */
186 int req_cyl; /* the cylinder for the current r/w request */
187 int head; /* head number ditto */
188 int req_sector; /* sector number ditto */
189 int scount; /* # sectors we're transferring at present */
190 int retries;
191 int settle_time;
192 int secpercyl; /* disk geometry information */
193 int secpertrack;
194 int total_secs;
195 int write_prot; /* 1 if write-protected, 0 if not, -1 dunno */
196 struct dbdma_cmd *dma_cmd;
197 int ref_count;
198 int expect_cyl;
199 struct timer_list timeout;
200 int timeout_pending;
201 int ejected;
202 wait_queue_head_t wait;
203 int wanted;
204 struct macio_dev *mdev;
205 char dbdma_cmd_space[5 * sizeof(struct dbdma_cmd)];
206 };
207
208 static struct floppy_state floppy_states[MAX_FLOPPIES];
209 static int floppy_count = 0;
210 static DEFINE_SPINLOCK(swim3_lock);
211
212 static unsigned short write_preamble[] = {
213 0x4e4e, 0x4e4e, 0x4e4e, 0x4e4e, 0x4e4e, /* gap field */
214 0, 0, 0, 0, 0, 0, /* sync field */
215 0x99a1, 0x99a1, 0x99a1, 0x99fb, /* data address mark */
216 0x990f /* no escape for 512 bytes */
217 };
218
219 static unsigned short write_postamble[] = {
220 0x9904, /* insert CRC */
221 0x4e4e, 0x4e4e,
222 0x9908, /* stop writing */
223 0, 0, 0, 0, 0, 0
224 };
225
226 static void swim3_select(struct floppy_state *fs, int sel);
227 static void swim3_action(struct floppy_state *fs, int action);
228 static int swim3_readbit(struct floppy_state *fs, int bit);
229 static void do_fd_request(struct request_queue * q);
230 static void start_request(struct floppy_state *fs);
231 static void set_timeout(struct floppy_state *fs, int nticks,
232 void (*proc)(unsigned long));
233 static void scan_track(struct floppy_state *fs);
234 static void seek_track(struct floppy_state *fs, int n);
235 static void init_dma(struct dbdma_cmd *cp, int cmd, void *buf, int count);
236 static void setup_transfer(struct floppy_state *fs);
237 static void act(struct floppy_state *fs);
238 static void scan_timeout(unsigned long data);
239 static void seek_timeout(unsigned long data);
240 static void settle_timeout(unsigned long data);
241 static void xfer_timeout(unsigned long data);
242 static irqreturn_t swim3_interrupt(int irq, void *dev_id);
243 /*static void fd_dma_interrupt(int irq, void *dev_id);*/
244 static int grab_drive(struct floppy_state *fs, enum swim_state state,
245 int interruptible);
246 static void release_drive(struct floppy_state *fs);
247 static int fd_eject(struct floppy_state *fs);
248 static int floppy_ioctl(struct block_device *bdev, fmode_t mode,
249 unsigned int cmd, unsigned long param);
250 static int floppy_open(struct block_device *bdev, fmode_t mode);
251 static int floppy_release(struct gendisk *disk, fmode_t mode);
252 static int floppy_check_change(struct gendisk *disk);
253 static int floppy_revalidate(struct gendisk *disk);
254
255 static bool swim3_end_request(int err, unsigned int nr_bytes)
256 {
257 if (__blk_end_request(fd_req, err, nr_bytes))
258 return true;
259
260 fd_req = NULL;
261 return false;
262 }
263
264 static bool swim3_end_request_cur(int err)
265 {
266 return swim3_end_request(err, blk_rq_cur_bytes(fd_req));
267 }
268
269 static void swim3_select(struct floppy_state *fs, int sel)
270 {
271 struct swim3 __iomem *sw = fs->swim3;
272
273 out_8(&sw->select, RELAX);
274 if (sel & 8)
275 out_8(&sw->control_bis, SELECT);
276 else
277 out_8(&sw->control_bic, SELECT);
278 out_8(&sw->select, sel & CA_MASK);
279 }
280
281 static void swim3_action(struct floppy_state *fs, int action)
282 {
283 struct swim3 __iomem *sw = fs->swim3;
284
285 swim3_select(fs, action);
286 udelay(1);
287 out_8(&sw->select, sw->select | LSTRB);
288 udelay(2);
289 out_8(&sw->select, sw->select & ~LSTRB);
290 udelay(1);
291 }
292
293 static int swim3_readbit(struct floppy_state *fs, int bit)
294 {
295 struct swim3 __iomem *sw = fs->swim3;
296 int stat;
297
298 swim3_select(fs, bit);
299 udelay(1);
300 stat = in_8(&sw->status);
301 return (stat & DATA) == 0;
302 }
303
304 static void do_fd_request(struct request_queue * q)
305 {
306 int i;
307
308 for(i=0; i<floppy_count; i++) {
309 struct floppy_state *fs = &floppy_states[i];
310 if (fs->mdev->media_bay &&
311 check_media_bay(fs->mdev->media_bay) != MB_FD)
312 continue;
313 start_request(fs);
314 }
315 }
316
317 static void start_request(struct floppy_state *fs)
318 {
319 struct request *req;
320 unsigned long x;
321
322 if (fs->state == idle && fs->wanted) {
323 fs->state = available;
324 wake_up(&fs->wait);
325 return;
326 }
327 while (fs->state == idle) {
328 if (!fd_req) {
329 fd_req = blk_fetch_request(swim3_queue);
330 if (!fd_req)
331 break;
332 }
333 req = fd_req;
334
335 if (blk_rq_pos(req) >= fs->total_secs) {
336 swim3_end_request_cur(-EIO);
337 continue;
338 }
339 if (fs->ejected) {
340 swim3_end_request_cur(-EIO);
341 continue;
342 }
343
344 if (rq_data_dir(req) == WRITE) {
345 if (fs->write_prot < 0)
346 fs->write_prot = swim3_readbit(fs, WRITE_PROT);
347 if (fs->write_prot) {
348 swim3_end_request_cur(-EIO);
349 continue;
350 }
351 }
352
353 /* Do not remove the cast. blk_rq_pos(req) is now a
354 * sector_t and can be 64 bits, but it will never go
355 * past 32 bits for this driver anyway, so we can
356 * safely cast it down and not have to do a 64/32
357 * division
358 */
359 fs->req_cyl = ((long)blk_rq_pos(req)) / fs->secpercyl;
360 x = ((long)blk_rq_pos(req)) % fs->secpercyl;
361 fs->head = x / fs->secpertrack;
362 fs->req_sector = x % fs->secpertrack + 1;
363 fd_req = req;
364 fs->state = do_transfer;
365 fs->retries = 0;
366
367 act(fs);
368 }
369 }
370
371 static void set_timeout(struct floppy_state *fs, int nticks,
372 void (*proc)(unsigned long))
373 {
374 unsigned long flags;
375
376 spin_lock_irqsave(&fs->lock, flags);
377 if (fs->timeout_pending)
378 del_timer(&fs->timeout);
379 fs->timeout.expires = jiffies + nticks;
380 fs->timeout.function = proc;
381 fs->timeout.data = (unsigned long) fs;
382 add_timer(&fs->timeout);
383 fs->timeout_pending = 1;
384 spin_unlock_irqrestore(&fs->lock, flags);
385 }
386
387 static inline void scan_track(struct floppy_state *fs)
388 {
389 struct swim3 __iomem *sw = fs->swim3;
390
391 swim3_select(fs, READ_DATA_0);
392 in_8(&sw->intr); /* clear SEEN_SECTOR bit */
393 in_8(&sw->error);
394 out_8(&sw->intr_enable, SEEN_SECTOR);
395 out_8(&sw->control_bis, DO_ACTION);
396 /* enable intr when track found */
397 set_timeout(fs, HZ, scan_timeout); /* enable timeout */
398 }
399
400 static inline void seek_track(struct floppy_state *fs, int n)
401 {
402 struct swim3 __iomem *sw = fs->swim3;
403
404 if (n >= 0) {
405 swim3_action(fs, SEEK_POSITIVE);
406 sw->nseek = n;
407 } else {
408 swim3_action(fs, SEEK_NEGATIVE);
409 sw->nseek = -n;
410 }
411 fs->expect_cyl = (fs->cur_cyl >= 0)? fs->cur_cyl + n: -1;
412 swim3_select(fs, STEP);
413 in_8(&sw->error);
414 /* enable intr when seek finished */
415 out_8(&sw->intr_enable, SEEK_DONE);
416 out_8(&sw->control_bis, DO_SEEK);
417 set_timeout(fs, 3*HZ, seek_timeout); /* enable timeout */
418 fs->settle_time = 0;
419 }
420
421 static inline void init_dma(struct dbdma_cmd *cp, int cmd,
422 void *buf, int count)
423 {
424 st_le16(&cp->req_count, count);
425 st_le16(&cp->command, cmd);
426 st_le32(&cp->phy_addr, virt_to_bus(buf));
427 cp->xfer_status = 0;
428 }
429
430 static inline void setup_transfer(struct floppy_state *fs)
431 {
432 int n;
433 struct swim3 __iomem *sw = fs->swim3;
434 struct dbdma_cmd *cp = fs->dma_cmd;
435 struct dbdma_regs __iomem *dr = fs->dma;
436
437 if (blk_rq_cur_sectors(fd_req) <= 0) {
438 printk(KERN_ERR "swim3: transfer 0 sectors?\n");
439 return;
440 }
441 if (rq_data_dir(fd_req) == WRITE)
442 n = 1;
443 else {
444 n = fs->secpertrack - fs->req_sector + 1;
445 if (n > blk_rq_cur_sectors(fd_req))
446 n = blk_rq_cur_sectors(fd_req);
447 }
448 fs->scount = n;
449 swim3_select(fs, fs->head? READ_DATA_1: READ_DATA_0);
450 out_8(&sw->sector, fs->req_sector);
451 out_8(&sw->nsect, n);
452 out_8(&sw->gap3, 0);
453 out_le32(&dr->cmdptr, virt_to_bus(cp));
454 if (rq_data_dir(fd_req) == WRITE) {
455 /* Set up 3 dma commands: write preamble, data, postamble */
456 init_dma(cp, OUTPUT_MORE, write_preamble, sizeof(write_preamble));
457 ++cp;
458 init_dma(cp, OUTPUT_MORE, fd_req->buffer, 512);
459 ++cp;
460 init_dma(cp, OUTPUT_LAST, write_postamble, sizeof(write_postamble));
461 } else {
462 init_dma(cp, INPUT_LAST, fd_req->buffer, n * 512);
463 }
464 ++cp;
465 out_le16(&cp->command, DBDMA_STOP);
466 out_8(&sw->control_bic, DO_ACTION | WRITE_SECTORS);
467 in_8(&sw->error);
468 out_8(&sw->control_bic, DO_ACTION | WRITE_SECTORS);
469 if (rq_data_dir(fd_req) == WRITE)
470 out_8(&sw->control_bis, WRITE_SECTORS);
471 in_8(&sw->intr);
472 out_le32(&dr->control, (RUN << 16) | RUN);
473 /* enable intr when transfer complete */
474 out_8(&sw->intr_enable, TRANSFER_DONE);
475 out_8(&sw->control_bis, DO_ACTION);
476 set_timeout(fs, 2*HZ, xfer_timeout); /* enable timeout */
477 }
478
479 static void act(struct floppy_state *fs)
480 {
481 for (;;) {
482 switch (fs->state) {
483 case idle:
484 return;
485
486 case locating:
487 if (swim3_readbit(fs, TRACK_ZERO)) {
488 fs->cur_cyl = 0;
489 if (fs->req_cyl == 0)
490 fs->state = do_transfer;
491 else
492 fs->state = seeking;
493 break;
494 }
495 scan_track(fs);
496 return;
497
498 case seeking:
499 if (fs->cur_cyl < 0) {
500 fs->expect_cyl = -1;
501 fs->state = locating;
502 break;
503 }
504 if (fs->req_cyl == fs->cur_cyl) {
505 printk("whoops, seeking 0\n");
506 fs->state = do_transfer;
507 break;
508 }
509 seek_track(fs, fs->req_cyl - fs->cur_cyl);
510 return;
511
512 case settling:
513 /* check for SEEK_COMPLETE after 30ms */
514 fs->settle_time = (HZ + 32) / 33;
515 set_timeout(fs, fs->settle_time, settle_timeout);
516 return;
517
518 case do_transfer:
519 if (fs->cur_cyl != fs->req_cyl) {
520 if (fs->retries > 5) {
521 swim3_end_request_cur(-EIO);
522 fs->state = idle;
523 return;
524 }
525 fs->state = seeking;
526 break;
527 }
528 setup_transfer(fs);
529 return;
530
531 case jogging:
532 seek_track(fs, -5);
533 return;
534
535 default:
536 printk(KERN_ERR"swim3: unknown state %d\n", fs->state);
537 return;
538 }
539 }
540 }
541
542 static void scan_timeout(unsigned long data)
543 {
544 struct floppy_state *fs = (struct floppy_state *) data;
545 struct swim3 __iomem *sw = fs->swim3;
546
547 fs->timeout_pending = 0;
548 out_8(&sw->control_bic, DO_ACTION | WRITE_SECTORS);
549 out_8(&sw->select, RELAX);
550 out_8(&sw->intr_enable, 0);
551 fs->cur_cyl = -1;
552 if (fs->retries > 5) {
553 swim3_end_request_cur(-EIO);
554 fs->state = idle;
555 start_request(fs);
556 } else {
557 fs->state = jogging;
558 act(fs);
559 }
560 }
561
562 static void seek_timeout(unsigned long data)
563 {
564 struct floppy_state *fs = (struct floppy_state *) data;
565 struct swim3 __iomem *sw = fs->swim3;
566
567 fs->timeout_pending = 0;
568 out_8(&sw->control_bic, DO_SEEK);
569 out_8(&sw->select, RELAX);
570 out_8(&sw->intr_enable, 0);
571 printk(KERN_ERR "swim3: seek timeout\n");
572 swim3_end_request_cur(-EIO);
573 fs->state = idle;
574 start_request(fs);
575 }
576
577 static void settle_timeout(unsigned long data)
578 {
579 struct floppy_state *fs = (struct floppy_state *) data;
580 struct swim3 __iomem *sw = fs->swim3;
581
582 fs->timeout_pending = 0;
583 if (swim3_readbit(fs, SEEK_COMPLETE)) {
584 out_8(&sw->select, RELAX);
585 fs->state = locating;
586 act(fs);
587 return;
588 }
589 out_8(&sw->select, RELAX);
590 if (fs->settle_time < 2*HZ) {
591 ++fs->settle_time;
592 set_timeout(fs, 1, settle_timeout);
593 return;
594 }
595 printk(KERN_ERR "swim3: seek settle timeout\n");
596 swim3_end_request_cur(-EIO);
597 fs->state = idle;
598 start_request(fs);
599 }
600
601 static void xfer_timeout(unsigned long data)
602 {
603 struct floppy_state *fs = (struct floppy_state *) data;
604 struct swim3 __iomem *sw = fs->swim3;
605 struct dbdma_regs __iomem *dr = fs->dma;
606 int n;
607
608 fs->timeout_pending = 0;
609 out_le32(&dr->control, RUN << 16);
610 /* We must wait a bit for dbdma to stop */
611 for (n = 0; (in_le32(&dr->status) & ACTIVE) && n < 1000; n++)
612 udelay(1);
613 out_8(&sw->intr_enable, 0);
614 out_8(&sw->control_bic, WRITE_SECTORS | DO_ACTION);
615 out_8(&sw->select, RELAX);
616 printk(KERN_ERR "swim3: timeout %sing sector %ld\n",
617 (rq_data_dir(fd_req)==WRITE? "writ": "read"),
618 (long)blk_rq_pos(fd_req));
619 swim3_end_request_cur(-EIO);
620 fs->state = idle;
621 start_request(fs);
622 }
623
624 static irqreturn_t swim3_interrupt(int irq, void *dev_id)
625 {
626 struct floppy_state *fs = (struct floppy_state *) dev_id;
627 struct swim3 __iomem *sw = fs->swim3;
628 int intr, err, n;
629 int stat, resid;
630 struct dbdma_regs __iomem *dr;
631 struct dbdma_cmd *cp;
632
633 intr = in_8(&sw->intr);
634 err = (intr & ERROR_INTR)? in_8(&sw->error): 0;
635 if ((intr & ERROR_INTR) && fs->state != do_transfer)
636 printk(KERN_ERR "swim3_interrupt, state=%d, dir=%x, intr=%x, err=%x\n",
637 fs->state, rq_data_dir(fd_req), intr, err);
638 switch (fs->state) {
639 case locating:
640 if (intr & SEEN_SECTOR) {
641 out_8(&sw->control_bic, DO_ACTION | WRITE_SECTORS);
642 out_8(&sw->select, RELAX);
643 out_8(&sw->intr_enable, 0);
644 del_timer(&fs->timeout);
645 fs->timeout_pending = 0;
646 if (sw->ctrack == 0xff) {
647 printk(KERN_ERR "swim3: seen sector but cyl=ff?\n");
648 fs->cur_cyl = -1;
649 if (fs->retries > 5) {
650 swim3_end_request_cur(-EIO);
651 fs->state = idle;
652 start_request(fs);
653 } else {
654 fs->state = jogging;
655 act(fs);
656 }
657 break;
658 }
659 fs->cur_cyl = sw->ctrack;
660 fs->cur_sector = sw->csect;
661 if (fs->expect_cyl != -1 && fs->expect_cyl != fs->cur_cyl)
662 printk(KERN_ERR "swim3: expected cyl %d, got %d\n",
663 fs->expect_cyl, fs->cur_cyl);
664 fs->state = do_transfer;
665 act(fs);
666 }
667 break;
668 case seeking:
669 case jogging:
670 if (sw->nseek == 0) {
671 out_8(&sw->control_bic, DO_SEEK);
672 out_8(&sw->select, RELAX);
673 out_8(&sw->intr_enable, 0);
674 del_timer(&fs->timeout);
675 fs->timeout_pending = 0;
676 if (fs->state == seeking)
677 ++fs->retries;
678 fs->state = settling;
679 act(fs);
680 }
681 break;
682 case settling:
683 out_8(&sw->intr_enable, 0);
684 del_timer(&fs->timeout);
685 fs->timeout_pending = 0;
686 act(fs);
687 break;
688 case do_transfer:
689 if ((intr & (ERROR_INTR | TRANSFER_DONE)) == 0)
690 break;
691 out_8(&sw->intr_enable, 0);
692 out_8(&sw->control_bic, WRITE_SECTORS | DO_ACTION);
693 out_8(&sw->select, RELAX);
694 del_timer(&fs->timeout);
695 fs->timeout_pending = 0;
696 dr = fs->dma;
697 cp = fs->dma_cmd;
698 if (rq_data_dir(fd_req) == WRITE)
699 ++cp;
700 /*
701 * Check that the main data transfer has finished.
702 * On writing, the swim3 sometimes doesn't use
703 * up all the bytes of the postamble, so we can still
704 * see DMA active here. That doesn't matter as long
705 * as all the sector data has been transferred.
706 */
707 if ((intr & ERROR_INTR) == 0 && cp->xfer_status == 0) {
708 /* wait a little while for DMA to complete */
709 for (n = 0; n < 100; ++n) {
710 if (cp->xfer_status != 0)
711 break;
712 udelay(1);
713 barrier();
714 }
715 }
716 /* turn off DMA */
717 out_le32(&dr->control, (RUN | PAUSE) << 16);
718 stat = ld_le16(&cp->xfer_status);
719 resid = ld_le16(&cp->res_count);
720 if (intr & ERROR_INTR) {
721 n = fs->scount - 1 - resid / 512;
722 if (n > 0) {
723 blk_update_request(fd_req, 0, n << 9);
724 fs->req_sector += n;
725 }
726 if (fs->retries < 5) {
727 ++fs->retries;
728 act(fs);
729 } else {
730 printk("swim3: error %sing block %ld (err=%x)\n",
731 rq_data_dir(fd_req) == WRITE? "writ": "read",
732 (long)blk_rq_pos(fd_req), err);
733 swim3_end_request_cur(-EIO);
734 fs->state = idle;
735 }
736 } else {
737 if ((stat & ACTIVE) == 0 || resid != 0) {
738 /* musta been an error */
739 printk(KERN_ERR "swim3: fd dma: stat=%x resid=%d\n", stat, resid);
740 printk(KERN_ERR " state=%d, dir=%x, intr=%x, err=%x\n",
741 fs->state, rq_data_dir(fd_req), intr, err);
742 swim3_end_request_cur(-EIO);
743 fs->state = idle;
744 start_request(fs);
745 break;
746 }
747 if (swim3_end_request(0, fs->scount << 9)) {
748 fs->req_sector += fs->scount;
749 if (fs->req_sector > fs->secpertrack) {
750 fs->req_sector -= fs->secpertrack;
751 if (++fs->head > 1) {
752 fs->head = 0;
753 ++fs->req_cyl;
754 }
755 }
756 act(fs);
757 } else
758 fs->state = idle;
759 }
760 if (fs->state == idle)
761 start_request(fs);
762 break;
763 default:
764 printk(KERN_ERR "swim3: don't know what to do in state %d\n", fs->state);
765 }
766 return IRQ_HANDLED;
767 }
768
769 /*
770 static void fd_dma_interrupt(int irq, void *dev_id)
771 {
772 }
773 */
774
775 static int grab_drive(struct floppy_state *fs, enum swim_state state,
776 int interruptible)
777 {
778 unsigned long flags;
779
780 spin_lock_irqsave(&fs->lock, flags);
781 if (fs->state != idle) {
782 ++fs->wanted;
783 while (fs->state != available) {
784 if (interruptible && signal_pending(current)) {
785 --fs->wanted;
786 spin_unlock_irqrestore(&fs->lock, flags);
787 return -EINTR;
788 }
789 interruptible_sleep_on(&fs->wait);
790 }
791 --fs->wanted;
792 }
793 fs->state = state;
794 spin_unlock_irqrestore(&fs->lock, flags);
795 return 0;
796 }
797
798 static void release_drive(struct floppy_state *fs)
799 {
800 unsigned long flags;
801
802 spin_lock_irqsave(&fs->lock, flags);
803 fs->state = idle;
804 start_request(fs);
805 spin_unlock_irqrestore(&fs->lock, flags);
806 }
807
808 static int fd_eject(struct floppy_state *fs)
809 {
810 int err, n;
811
812 err = grab_drive(fs, ejecting, 1);
813 if (err)
814 return err;
815 swim3_action(fs, EJECT);
816 for (n = 20; n > 0; --n) {
817 if (signal_pending(current)) {
818 err = -EINTR;
819 break;
820 }
821 swim3_select(fs, RELAX);
822 schedule_timeout_interruptible(1);
823 if (swim3_readbit(fs, DISK_IN) == 0)
824 break;
825 }
826 swim3_select(fs, RELAX);
827 udelay(150);
828 fs->ejected = 1;
829 release_drive(fs);
830 return err;
831 }
832
833 static struct floppy_struct floppy_type =
834 { 2880,18,2,80,0,0x1B,0x00,0xCF,0x6C,NULL }; /* 7 1.44MB 3.5" */
835
836 static int floppy_locked_ioctl(struct block_device *bdev, fmode_t mode,
837 unsigned int cmd, unsigned long param)
838 {
839 struct floppy_state *fs = bdev->bd_disk->private_data;
840 int err;
841
842 if ((cmd & 0x80) && !capable(CAP_SYS_ADMIN))
843 return -EPERM;
844
845 if (fs->mdev->media_bay &&
846 check_media_bay(fs->mdev->media_bay) != MB_FD)
847 return -ENXIO;
848
849 switch (cmd) {
850 case FDEJECT:
851 if (fs->ref_count != 1)
852 return -EBUSY;
853 err = fd_eject(fs);
854 return err;
855 case FDGETPRM:
856 if (copy_to_user((void __user *) param, &floppy_type,
857 sizeof(struct floppy_struct)))
858 return -EFAULT;
859 return 0;
860 }
861 return -ENOTTY;
862 }
863
864 static int floppy_ioctl(struct block_device *bdev, fmode_t mode,
865 unsigned int cmd, unsigned long param)
866 {
867 int ret;
868
869 lock_kernel();
870 ret = floppy_locked_ioctl(bdev, mode, cmd, param);
871 unlock_kernel();
872
873 return ret;
874 }
875
876 static int floppy_open(struct block_device *bdev, fmode_t mode)
877 {
878 struct floppy_state *fs = bdev->bd_disk->private_data;
879 struct swim3 __iomem *sw = fs->swim3;
880 int n, err = 0;
881
882 if (fs->ref_count == 0) {
883 if (fs->mdev->media_bay &&
884 check_media_bay(fs->mdev->media_bay) != MB_FD)
885 return -ENXIO;
886 out_8(&sw->setup, S_IBM_DRIVE | S_FCLK_DIV2);
887 out_8(&sw->control_bic, 0xff);
888 out_8(&sw->mode, 0x95);
889 udelay(10);
890 out_8(&sw->intr_enable, 0);
891 out_8(&sw->control_bis, DRIVE_ENABLE | INTR_ENABLE);
892 swim3_action(fs, MOTOR_ON);
893 fs->write_prot = -1;
894 fs->cur_cyl = -1;
895 for (n = 0; n < 2 * HZ; ++n) {
896 if (n >= HZ/30 && swim3_readbit(fs, SEEK_COMPLETE))
897 break;
898 if (signal_pending(current)) {
899 err = -EINTR;
900 break;
901 }
902 swim3_select(fs, RELAX);
903 schedule_timeout_interruptible(1);
904 }
905 if (err == 0 && (swim3_readbit(fs, SEEK_COMPLETE) == 0
906 || swim3_readbit(fs, DISK_IN) == 0))
907 err = -ENXIO;
908 swim3_action(fs, SETMFM);
909 swim3_select(fs, RELAX);
910
911 } else if (fs->ref_count == -1 || mode & FMODE_EXCL)
912 return -EBUSY;
913
914 if (err == 0 && (mode & FMODE_NDELAY) == 0
915 && (mode & (FMODE_READ|FMODE_WRITE))) {
916 check_disk_change(bdev);
917 if (fs->ejected)
918 err = -ENXIO;
919 }
920
921 if (err == 0 && (mode & FMODE_WRITE)) {
922 if (fs->write_prot < 0)
923 fs->write_prot = swim3_readbit(fs, WRITE_PROT);
924 if (fs->write_prot)
925 err = -EROFS;
926 }
927
928 if (err) {
929 if (fs->ref_count == 0) {
930 swim3_action(fs, MOTOR_OFF);
931 out_8(&sw->control_bic, DRIVE_ENABLE | INTR_ENABLE);
932 swim3_select(fs, RELAX);
933 }
934 return err;
935 }
936
937 if (mode & FMODE_EXCL)
938 fs->ref_count = -1;
939 else
940 ++fs->ref_count;
941
942 return 0;
943 }
944
945 static int floppy_unlocked_open(struct block_device *bdev, fmode_t mode)
946 {
947 int ret;
948
949 lock_kernel();
950 ret = floppy_open(bdev, mode);
951 unlock_kernel();
952
953 return ret;
954 }
955
956 static int floppy_release(struct gendisk *disk, fmode_t mode)
957 {
958 struct floppy_state *fs = disk->private_data;
959 struct swim3 __iomem *sw = fs->swim3;
960 lock_kernel();
961 if (fs->ref_count > 0 && --fs->ref_count == 0) {
962 swim3_action(fs, MOTOR_OFF);
963 out_8(&sw->control_bic, 0xff);
964 swim3_select(fs, RELAX);
965 }
966 unlock_kernel();
967 return 0;
968 }
969
970 static int floppy_check_change(struct gendisk *disk)
971 {
972 struct floppy_state *fs = disk->private_data;
973 return fs->ejected;
974 }
975
976 static int floppy_revalidate(struct gendisk *disk)
977 {
978 struct floppy_state *fs = disk->private_data;
979 struct swim3 __iomem *sw;
980 int ret, n;
981
982 if (fs->mdev->media_bay &&
983 check_media_bay(fs->mdev->media_bay) != MB_FD)
984 return -ENXIO;
985
986 sw = fs->swim3;
987 grab_drive(fs, revalidating, 0);
988 out_8(&sw->intr_enable, 0);
989 out_8(&sw->control_bis, DRIVE_ENABLE);
990 swim3_action(fs, MOTOR_ON); /* necessary? */
991 fs->write_prot = -1;
992 fs->cur_cyl = -1;
993 mdelay(1);
994 for (n = HZ; n > 0; --n) {
995 if (swim3_readbit(fs, SEEK_COMPLETE))
996 break;
997 if (signal_pending(current))
998 break;
999 swim3_select(fs, RELAX);
1000 schedule_timeout_interruptible(1);
1001 }
1002 ret = swim3_readbit(fs, SEEK_COMPLETE) == 0
1003 || swim3_readbit(fs, DISK_IN) == 0;
1004 if (ret)
1005 swim3_action(fs, MOTOR_OFF);
1006 else {
1007 fs->ejected = 0;
1008 swim3_action(fs, SETMFM);
1009 }
1010 swim3_select(fs, RELAX);
1011
1012 release_drive(fs);
1013 return ret;
1014 }
1015
1016 static const struct block_device_operations floppy_fops = {
1017 .open = floppy_unlocked_open,
1018 .release = floppy_release,
1019 .ioctl = floppy_ioctl,
1020 .media_changed = floppy_check_change,
1021 .revalidate_disk= floppy_revalidate,
1022 };
1023
1024 static int swim3_add_device(struct macio_dev *mdev, int index)
1025 {
1026 struct device_node *swim = mdev->ofdev.dev.of_node;
1027 struct floppy_state *fs = &floppy_states[index];
1028 int rc = -EBUSY;
1029
1030 /* Check & Request resources */
1031 if (macio_resource_count(mdev) < 2) {
1032 printk(KERN_WARNING "ifd%d: no address for %s\n",
1033 index, swim->full_name);
1034 return -ENXIO;
1035 }
1036 if (macio_irq_count(mdev) < 2) {
1037 printk(KERN_WARNING "fd%d: no intrs for device %s\n",
1038 index, swim->full_name);
1039 }
1040 if (macio_request_resource(mdev, 0, "swim3 (mmio)")) {
1041 printk(KERN_ERR "fd%d: can't request mmio resource for %s\n",
1042 index, swim->full_name);
1043 return -EBUSY;
1044 }
1045 if (macio_request_resource(mdev, 1, "swim3 (dma)")) {
1046 printk(KERN_ERR "fd%d: can't request dma resource for %s\n",
1047 index, swim->full_name);
1048 macio_release_resource(mdev, 0);
1049 return -EBUSY;
1050 }
1051 dev_set_drvdata(&mdev->ofdev.dev, fs);
1052
1053 if (mdev->media_bay == NULL)
1054 pmac_call_feature(PMAC_FTR_SWIM3_ENABLE, swim, 0, 1);
1055
1056 memset(fs, 0, sizeof(*fs));
1057 spin_lock_init(&fs->lock);
1058 fs->state = idle;
1059 fs->swim3 = (struct swim3 __iomem *)
1060 ioremap(macio_resource_start(mdev, 0), 0x200);
1061 if (fs->swim3 == NULL) {
1062 printk("fd%d: couldn't map registers for %s\n",
1063 index, swim->full_name);
1064 rc = -ENOMEM;
1065 goto out_release;
1066 }
1067 fs->dma = (struct dbdma_regs __iomem *)
1068 ioremap(macio_resource_start(mdev, 1), 0x200);
1069 if (fs->dma == NULL) {
1070 printk("fd%d: couldn't map DMA for %s\n",
1071 index, swim->full_name);
1072 iounmap(fs->swim3);
1073 rc = -ENOMEM;
1074 goto out_release;
1075 }
1076 fs->swim3_intr = macio_irq(mdev, 0);
1077 fs->dma_intr = macio_irq(mdev, 1);
1078 fs->cur_cyl = -1;
1079 fs->cur_sector = -1;
1080 fs->secpercyl = 36;
1081 fs->secpertrack = 18;
1082 fs->total_secs = 2880;
1083 fs->mdev = mdev;
1084 init_waitqueue_head(&fs->wait);
1085
1086 fs->dma_cmd = (struct dbdma_cmd *) DBDMA_ALIGN(fs->dbdma_cmd_space);
1087 memset(fs->dma_cmd, 0, 2 * sizeof(struct dbdma_cmd));
1088 st_le16(&fs->dma_cmd[1].command, DBDMA_STOP);
1089
1090 if (request_irq(fs->swim3_intr, swim3_interrupt, 0, "SWIM3", fs)) {
1091 printk(KERN_ERR "fd%d: couldn't request irq %d for %s\n",
1092 index, fs->swim3_intr, swim->full_name);
1093 pmac_call_feature(PMAC_FTR_SWIM3_ENABLE, swim, 0, 0);
1094 goto out_unmap;
1095 return -EBUSY;
1096 }
1097 /*
1098 if (request_irq(fs->dma_intr, fd_dma_interrupt, 0, "SWIM3-dma", fs)) {
1099 printk(KERN_ERR "Couldn't get irq %d for SWIM3 DMA",
1100 fs->dma_intr);
1101 return -EBUSY;
1102 }
1103 */
1104
1105 init_timer(&fs->timeout);
1106
1107 printk(KERN_INFO "fd%d: SWIM3 floppy controller %s\n", floppy_count,
1108 mdev->media_bay ? "in media bay" : "");
1109
1110 return 0;
1111
1112 out_unmap:
1113 iounmap(fs->dma);
1114 iounmap(fs->swim3);
1115
1116 out_release:
1117 macio_release_resource(mdev, 0);
1118 macio_release_resource(mdev, 1);
1119
1120 return rc;
1121 }
1122
1123 static int __devinit swim3_attach(struct macio_dev *mdev, const struct of_device_id *match)
1124 {
1125 int i, rc;
1126 struct gendisk *disk;
1127
1128 /* Add the drive */
1129 rc = swim3_add_device(mdev, floppy_count);
1130 if (rc)
1131 return rc;
1132
1133 /* Now create the queue if not there yet */
1134 if (swim3_queue == NULL) {
1135 /* If we failed, there isn't much we can do as the driver is still
1136 * too dumb to remove the device, just bail out
1137 */
1138 if (register_blkdev(FLOPPY_MAJOR, "fd"))
1139 return 0;
1140 swim3_queue = blk_init_queue(do_fd_request, &swim3_lock);
1141 if (swim3_queue == NULL) {
1142 unregister_blkdev(FLOPPY_MAJOR, "fd");
1143 return 0;
1144 }
1145 }
1146
1147 /* Now register that disk. Same comment about failure handling */
1148 i = floppy_count++;
1149 disk = disks[i] = alloc_disk(1);
1150 if (disk == NULL)
1151 return 0;
1152
1153 disk->major = FLOPPY_MAJOR;
1154 disk->first_minor = i;
1155 disk->fops = &floppy_fops;
1156 disk->private_data = &floppy_states[i];
1157 disk->queue = swim3_queue;
1158 disk->flags |= GENHD_FL_REMOVABLE;
1159 sprintf(disk->disk_name, "fd%d", i);
1160 set_capacity(disk, 2880);
1161 add_disk(disk);
1162
1163 return 0;
1164 }
1165
1166 static struct of_device_id swim3_match[] =
1167 {
1168 {
1169 .name = "swim3",
1170 },
1171 {
1172 .compatible = "ohare-swim3"
1173 },
1174 {
1175 .compatible = "swim3"
1176 },
1177 };
1178
1179 static struct macio_driver swim3_driver =
1180 {
1181 .driver = {
1182 .name = "swim3",
1183 .of_match_table = swim3_match,
1184 },
1185 .probe = swim3_attach,
1186 };
1187
1188
1189 int swim3_init(void)
1190 {
1191 macio_register_driver(&swim3_driver);
1192 return 0;
1193 }
1194
1195 module_init(swim3_init)
1196
1197 MODULE_LICENSE("GPL");
1198 MODULE_AUTHOR("Paul Mackerras");
1199 MODULE_ALIAS_BLOCKDEV_MAJOR(FLOPPY_MAJOR);
Tomato firmware and modifications.