| blob | 534520d26fa42cd8ad3b20b9f4d0af19a4bd7308 |
1 /*
2 *
3 * Copyright (C) 1991, 1992 Linus Torvalds
4 *
5 * Enhanced CPU detection and feature setting code by Mike Jagdis
6 * and Martin Mares, November 1997.
7 */
9 .text
10 #include <linux/threads.h>
11 #include <linux/init.h>
12 #include <linux/linkage.h>
13 #include <asm/segment.h>
14 #include <asm/page_types.h>
15 #include <asm/pgtable_types.h>
16 #include <asm/cache.h>
17 #include <asm/thread_info.h>
18 #include <asm/asm-offsets.h>
19 #include <asm/setup.h>
20 #include <asm/processor-flags.h>
21 #include <asm/msr-index.h>
22 #include <asm/cpufeature.h>
23 #include <asm/percpu.h>
25 /* Physical address */
26 #define pa(X) ((X) - __PAGE_OFFSET)
28 /*
29 * References to members of the new_cpu_data structure.
30 */
32 #define X86 new_cpu_data+CPUINFO_x86
33 #define X86_VENDOR new_cpu_data+CPUINFO_x86_vendor
34 #define X86_MODEL new_cpu_data+CPUINFO_x86_model
35 #define X86_MASK new_cpu_data+CPUINFO_x86_mask
36 #define X86_HARD_MATH new_cpu_data+CPUINFO_hard_math
37 #define X86_CPUID new_cpu_data+CPUINFO_cpuid_level
38 #define X86_CAPABILITY new_cpu_data+CPUINFO_x86_capability
39 #define X86_VENDOR_ID new_cpu_data+CPUINFO_x86_vendor_id
41 /*
42 * This is how much memory in addition to the memory covered up to
43 * and including _end we need mapped initially.
44 * We need:
45 * (KERNEL_IMAGE_SIZE/4096) / 1024 pages (worst case, non PAE)
46 * (KERNEL_IMAGE_SIZE/4096) / 512 + 4 pages (worst case for PAE)
47 *
48 * Modulo rounding, each megabyte assigned here requires a kilobyte of
49 * memory, which is currently unreclaimed.
50 *
51 * This should be a multiple of a page.
52 *
53 * KERNEL_IMAGE_SIZE should be greater than pa(_end)
54 * and small than max_low_pfn, otherwise will waste some page table entries
55 */
57 #if PTRS_PER_PMD > 1
58 #define PAGE_TABLE_SIZE(pages) (((pages) / PTRS_PER_PMD) + PTRS_PER_PGD)
59 #else
60 #define PAGE_TABLE_SIZE(pages) ((pages) / PTRS_PER_PGD)
61 #endif
63 /* Enough space to fit pagetables for the low memory linear map */
64 MAPPING_BEYOND_END = \
65 PAGE_TABLE_SIZE(((1<<32) - __PAGE_OFFSET) >> PAGE_SHIFT) << PAGE_SHIFT
67 /*
68 * Worst-case size of the kernel mapping we need to make:
69 * the worst-case size of the kernel itself, plus the extra we need
70 * to map for the linear map.
71 */
72 KERNEL_PAGES = (KERNEL_IMAGE_SIZE + MAPPING_BEYOND_END)>>PAGE_SHIFT
74 INIT_MAP_SIZE = PAGE_TABLE_SIZE(KERNEL_PAGES) * PAGE_SIZE_asm
75 RESERVE_BRK(pagetables, INIT_MAP_SIZE)
77 /*
78 * 32-bit kernel entrypoint; only used by the boot CPU. On entry,
79 * %esi points to the real-mode code as a 32-bit pointer.
80 * CS and DS must be 4 GB flat segments, but we don't depend on
81 * any particular GDT layout, because we load our own as soon as we
82 * can.
83 */
84 __HEAD
85 ENTRY(startup_32)
86 /* test KEEP_SEGMENTS flag to see if the bootloader is asking
87 us to not reload segments */
88 testb $(1<<6), BP_loadflags(%esi)
89 jnz 2f
91 /*
92 * Set segments to known values.
93 */
94 lgdt pa(boot_gdt_descr)
95 movl $(__BOOT_DS),%eax
96 movl %eax,%ds
97 movl %eax,%es
98 movl %eax,%fs
99 movl %eax,%gs
100 2:
102 /*
103 * Clear BSS first so that there are no surprises...
104 */
105 cld
106 xorl %eax,%eax
107 movl $pa(__bss_start),%edi
108 movl $pa(__bss_stop),%ecx
109 subl %edi,%ecx
110 shrl $2,%ecx
111 rep ; stosl
112 /*
113 * Copy bootup parameters out of the way.
114 * Note: %esi still has the pointer to the real-mode data.
115 * With the kexec as boot loader, parameter segment might be loaded beyond
116 * kernel image and might not even be addressable by early boot page tables.
117 * (kexec on panic case). Hence copy out the parameters before initializing
118 * page tables.
119 */
120 movl $pa(boot_params),%edi
121 movl $(PARAM_SIZE/4),%ecx
122 cld
123 rep
124 movsl
125 movl pa(boot_params) + NEW_CL_POINTER,%esi
126 andl %esi,%esi
127 jz 1f # No comand line
128 movl $pa(boot_command_line),%edi
129 movl $(COMMAND_LINE_SIZE/4),%ecx
130 rep
131 movsl
132 1:
134 #ifdef CONFIG_OLPC_OPENFIRMWARE
135 /* save OFW's pgdir table for later use when calling into OFW */
136 movl %cr3, %eax
137 movl %eax, pa(olpc_ofw_pgd)
138 #endif
140 #ifdef CONFIG_PARAVIRT
141 /* This is can only trip for a broken bootloader... */
142 cmpw $0x207, pa(boot_params + BP_version)
143 jb default_entry
145 /* Paravirt-compatible boot parameters. Look to see what architecture
146 we're booting under. */
147 movl pa(boot_params + BP_hardware_subarch), %eax
148 cmpl $num_subarch_entries, %eax
149 jae bad_subarch
151 movl pa(subarch_entries)(,%eax,4), %eax
152 subl $__PAGE_OFFSET, %eax
153 jmp *%eax
155 bad_subarch:
156 WEAK(lguest_entry)
157 WEAK(xen_entry)
158 /* Unknown implementation; there's really
159 nothing we can do at this point. */
160 ud2a
162 __INITDATA
164 subarch_entries:
165 .long default_entry /* normal x86/PC */
166 .long lguest_entry /* lguest hypervisor */
167 .long xen_entry /* Xen hypervisor */
168 .long default_entry /* Moorestown MID */
169 num_subarch_entries = (. - subarch_entries) / 4
170 .previous
171 #endif /* CONFIG_PARAVIRT */
173 /*
174 * Initialize page tables. This creates a PDE and a set of page
175 * tables, which are located immediately beyond __brk_base. The variable
176 * _brk_end is set up to point to the first "safe" location.
177 * Mappings are created both at virtual address 0 (identity mapping)
178 * and PAGE_OFFSET for up to _end.
179 *
180 * Note that the stack is not yet set up!
181 */
182 default_entry:
183 #ifdef CONFIG_X86_PAE
185 /*
186 * In PAE mode swapper_pg_dir is statically defined to contain enough
187 * entries to cover the VMSPLIT option (that is the top 1, 2 or 3
188 * entries). The identity mapping is handled by pointing two PGD
189 * entries to the first kernel PMD.
190 *
191 * Note the upper half of each PMD or PTE are always zero at
192 * this stage.
193 */
195 #define KPMDS (((-__PAGE_OFFSET) >> 30) & 3) /* Number of kernel PMDs */
197 xorl %ebx,%ebx /* %ebx is kept at zero */
199 movl $pa(__brk_base), %edi
200 movl $pa(swapper_pg_pmd), %edx
201 movl $PTE_IDENT_ATTR, %eax
202 10:
203 leal PDE_IDENT_ATTR(%edi),%ecx /* Create PMD entry */
204 movl %ecx,(%edx) /* Store PMD entry */
205 /* Upper half already zero */
206 addl $8,%edx
207 movl $512,%ecx
208 11:
209 stosl
210 xchgl %eax,%ebx
211 stosl
212 xchgl %eax,%ebx
213 addl $0x1000,%eax
214 loop 11b
216 /*
217 * End condition: we must map up to the end + MAPPING_BEYOND_END.
218 */
219 movl $pa(_end) + MAPPING_BEYOND_END + PTE_IDENT_ATTR, %ebp
220 cmpl %ebp,%eax
221 jb 10b
222 1:
223 addl $__PAGE_OFFSET, %edi
224 movl %edi, pa(_brk_end)
225 shrl $12, %eax
226 movl %eax, pa(max_pfn_mapped)
228 /* Do early initialization of the fixmap area */
229 movl $pa(swapper_pg_fixmap)+PDE_IDENT_ATTR,%eax
230 movl %eax,pa(swapper_pg_pmd+0x1000*KPMDS-8)
231 #else /* Not PAE */
233 page_pde_offset = (__PAGE_OFFSET >> 20);
235 movl $pa(__brk_base), %edi
236 movl $pa(swapper_pg_dir), %edx
237 movl $PTE_IDENT_ATTR, %eax
238 10:
239 leal PDE_IDENT_ATTR(%edi),%ecx /* Create PDE entry */
240 movl %ecx,(%edx) /* Store identity PDE entry */
241 movl %ecx,page_pde_offset(%edx) /* Store kernel PDE entry */
242 addl $4,%edx
243 movl $1024, %ecx
244 11:
245 stosl
246 addl $0x1000,%eax
247 loop 11b
248 /*
249 * End condition: we must map up to the end + MAPPING_BEYOND_END.
250 */
251 movl $pa(_end) + MAPPING_BEYOND_END + PTE_IDENT_ATTR, %ebp
252 cmpl %ebp,%eax
253 jb 10b
254 addl $__PAGE_OFFSET, %edi
255 movl %edi, pa(_brk_end)
256 shrl $12, %eax
257 movl %eax, pa(max_pfn_mapped)
259 /* Do early initialization of the fixmap area */
260 movl $pa(swapper_pg_fixmap)+PDE_IDENT_ATTR,%eax
261 movl %eax,pa(swapper_pg_dir+0xffc)
262 #endif
263 jmp 3f
264 /*
265 * Non-boot CPU entry point; entered from trampoline.S
266 * We can't lgdt here, because lgdt itself uses a data segment, but
267 * we know the trampoline has already loaded the boot_gdt for us.
268 *
269 * If cpu hotplug is not supported then this code can go in init section
270 * which will be freed later
271 */
273 __CPUINIT
275 #ifdef CONFIG_SMP
276 ENTRY(startup_32_smp)
277 cld
278 movl $(__BOOT_DS),%eax
279 movl %eax,%ds
280 movl %eax,%es
281 movl %eax,%fs
282 movl %eax,%gs
283 #endif /* CONFIG_SMP */
284 3:
286 /*
287 * New page tables may be in 4Mbyte page mode and may
288 * be using the global pages.
289 *
290 * NOTE! If we are on a 486 we may have no cr4 at all!
291 * So we do not try to touch it unless we really have
292 * some bits in it to set. This won't work if the BSP
293 * implements cr4 but this AP does not -- very unlikely
294 * but be warned! The same applies to the pse feature
295 * if not equally supported. --macro
296 *
297 * NOTE! We have to correct for the fact that we're
298 * not yet offset PAGE_OFFSET..
299 */
300 #define cr4_bits pa(mmu_cr4_features)
301 movl cr4_bits,%edx
302 andl %edx,%edx
303 jz 6f
304 movl %cr4,%eax # Turn on paging options (PSE,PAE,..)
305 orl %edx,%eax
306 movl %eax,%cr4
308 testb $X86_CR4_PAE, %al # check if PAE is enabled
309 jz 6f
311 /* Check if extended functions are implemented */
312 movl $0x80000000, %eax
313 cpuid
314 /* Value must be in the range 0x80000001 to 0x8000ffff */
315 subl $0x80000001, %eax
316 cmpl $(0x8000ffff-0x80000001), %eax
317 ja 6f
318 mov $0x80000001, %eax
319 cpuid
320 /* Execute Disable bit supported? */
321 btl $(X86_FEATURE_NX & 31), %edx
322 jnc 6f
324 /* Setup EFER (Extended Feature Enable Register) */
325 movl $MSR_EFER, %ecx
326 rdmsr
328 btsl $_EFER_NX, %eax
329 /* Make changes effective */
330 wrmsr
332 6:
334 /*
335 * Enable paging
336 */
337 movl pa(initial_page_table), %eax
338 movl %eax,%cr3 /* set the page table pointer.. */
339 movl %cr0,%eax
340 orl $X86_CR0_PG,%eax
341 movl %eax,%cr0 /* ..and set paging (PG) bit */
342 ljmp $__BOOT_CS,$1f /* Clear prefetch and normalize %eip */
343 1:
344 /* Set up the stack pointer */
345 lss stack_start,%esp
347 pushl $0
348 popfl
350 #ifdef CONFIG_SMP
351 cmpb $0, ready
352 jz 1f /* Initial CPU cleans BSS */
353 jmp checkCPUtype
354 1:
355 #endif /* CONFIG_SMP */
357 /*
358 * start system 32-bit setup. We need to re-do some of the things done
359 * in 16-bit mode for the "real" operations.
360 */
361 call setup_idt
363 checkCPUtype:
365 movl $-1,X86_CPUID # -1 for no CPUID initially
367 /* check if it is 486 or 386. */
369 movb $3,X86 # at least 386
370 pushfl # push EFLAGS
371 popl %eax # get EFLAGS
372 movl %eax,%ecx # save original EFLAGS
373 xorl $0x240000,%eax # flip AC and ID bits in EFLAGS
374 pushl %eax # copy to EFLAGS
375 popfl # set EFLAGS
376 pushfl # get new EFLAGS
377 popl %eax # put it in eax
378 xorl %ecx,%eax # change in flags
379 pushl %ecx # restore original EFLAGS
380 popfl
381 testl $0x40000,%eax # check if AC bit changed
382 je is386
384 movb $4,X86 # at least 486
385 testl $0x200000,%eax # check if ID bit changed
386 je is486
388 /* get vendor info */
389 xorl %eax,%eax # call CPUID with 0 -> return vendor ID
390 cpuid
391 movl %eax,X86_CPUID # save CPUID level
392 movl %ebx,X86_VENDOR_ID # lo 4 chars
393 movl %edx,X86_VENDOR_ID+4 # next 4 chars
394 movl %ecx,X86_VENDOR_ID+8 # last 4 chars
396 orl %eax,%eax # do we have processor info as well?
397 je is486
399 movl $1,%eax # Use the CPUID instruction to get CPU type
400 cpuid
401 movb %al,%cl # save reg for future use
402 andb $0x0f,%ah # mask processor family
403 movb %ah,X86
404 andb $0xf0,%al # mask model
405 shrb $4,%al
406 movb %al,X86_MODEL
407 andb $0x0f,%cl # mask mask revision
408 movb %cl,X86_MASK
409 movl %edx,X86_CAPABILITY
411 is486: movl $0x50022,%ecx # set AM, WP, NE and MP
412 jmp 2f
414 is386: movl $2,%ecx # set MP
415 2: movl %cr0,%eax
416 andl $0x80000011,%eax # Save PG,PE,ET
417 orl %ecx,%eax
418 movl %eax,%cr0
420 call check_x87
421 lgdt early_gdt_descr
422 lidt idt_descr
423 ljmp $(__KERNEL_CS),$1f
424 1: movl $(__KERNEL_DS),%eax # reload all the segment registers
425 movl %eax,%ss # after changing gdt.
427 movl $(__USER_DS),%eax # DS/ES contains default USER segment
428 movl %eax,%ds
429 movl %eax,%es
431 movl $(__KERNEL_PERCPU), %eax
432 movl %eax,%fs # set this cpu's percpu
434 #ifdef CONFIG_CC_STACKPROTECTOR
435 /*
436 * The linker can't handle this by relocation. Manually set
437 * base address in stack canary segment descriptor.
438 */
439 cmpb $0,ready
440 jne 1f
441 movl $gdt_page,%eax
442 movl $stack_canary,%ecx
443 movw %cx, 8 * GDT_ENTRY_STACK_CANARY + 2(%eax)
444 shrl $16, %ecx
445 movb %cl, 8 * GDT_ENTRY_STACK_CANARY + 4(%eax)
446 movb %ch, 8 * GDT_ENTRY_STACK_CANARY + 7(%eax)
447 1:
448 #endif
449 movl $(__KERNEL_STACK_CANARY),%eax
450 movl %eax,%gs
452 xorl %eax,%eax # Clear LDT
453 lldt %ax
455 cld # gcc2 wants the direction flag cleared at all times
456 pushl $0 # fake return address for unwinder
457 #ifdef CONFIG_SMP
458 movb ready, %cl
459 movb $1, ready
460 cmpb $0,%cl # the first CPU calls start_kernel
461 je 1f
462 movl (stack_start), %esp
463 1:
464 #endif /* CONFIG_SMP */
465 jmp *(initial_code)
467 /*
468 * We depend on ET to be correct. This checks for 287/387.
469 */
470 check_x87:
471 movb $0,X86_HARD_MATH
472 clts
473 fninit
474 fstsw %ax
475 cmpb $0,%al
476 je 1f
477 movl %cr0,%eax /* no coprocessor: have to set bits */
478 xorl $4,%eax /* set EM */
479 movl %eax,%cr0
480 ret
481 ALIGN
482 1: movb $1,X86_HARD_MATH
483 .byte 0xDB,0xE4 /* fsetpm for 287, ignored by 387 */
484 ret
486 /*
487 * setup_idt
488 *
489 * sets up a idt with 256 entries pointing to
490 * ignore_int, interrupt gates. It doesn't actually load
491 * idt - that can be done only after paging has been enabled
492 * and the kernel moved to PAGE_OFFSET. Interrupts
493 * are enabled elsewhere, when we can be relatively
494 * sure everything is ok.
495 *
496 * Warning: %esi is live across this function.
497 */
498 setup_idt:
499 lea ignore_int,%edx
500 movl $(__KERNEL_CS << 16),%eax
501 movw %dx,%ax /* selector = 0x0010 = cs */
502 movw $0x8E00,%dx /* interrupt gate - dpl=0, present */
504 lea idt_table,%edi
505 mov $256,%ecx
506 rp_sidt:
507 movl %eax,(%edi)
508 movl %edx,4(%edi)
509 addl $8,%edi
510 dec %ecx
511 jne rp_sidt
513 .macro set_early_handler handler,trapno
514 lea \handler,%edx
515 movl $(__KERNEL_CS << 16),%eax
516 movw %dx,%ax
517 movw $0x8E00,%dx /* interrupt gate - dpl=0, present */
518 lea idt_table,%edi
519 movl %eax,8*\trapno(%edi)
520 movl %edx,8*\trapno+4(%edi)
521 .endm
523 set_early_handler handler=early_divide_err,trapno=0
524 set_early_handler handler=early_illegal_opcode,trapno=6
525 set_early_handler handler=early_protection_fault,trapno=13
526 set_early_handler handler=early_page_fault,trapno=14
528 ret
530 early_divide_err:
531 xor %edx,%edx
532 pushl $0 /* fake errcode */
533 jmp early_fault
535 early_illegal_opcode:
536 movl $6,%edx
537 pushl $0 /* fake errcode */
538 jmp early_fault
540 early_protection_fault:
541 movl $13,%edx
542 jmp early_fault
544 early_page_fault:
545 movl $14,%edx
546 jmp early_fault
548 early_fault:
549 cld
550 #ifdef CONFIG_PRINTK
551 pusha
552 movl $(__KERNEL_DS),%eax
553 movl %eax,%ds
554 movl %eax,%es
555 cmpl $2,early_recursion_flag
556 je hlt_loop
557 incl early_recursion_flag
558 movl %cr2,%eax
559 pushl %eax
560 pushl %edx /* trapno */
561 pushl $fault_msg
562 call printk
563 #endif
564 call dump_stack
565 hlt_loop:
566 hlt
567 jmp hlt_loop
569 /* This is the default interrupt "handler" :-) */
570 ALIGN
571 ignore_int:
572 cld
573 #ifdef CONFIG_PRINTK
574 pushl %eax
575 pushl %ecx
576 pushl %edx
577 pushl %es
578 pushl %ds
579 movl $(__KERNEL_DS),%eax
580 movl %eax,%ds
581 movl %eax,%es
582 cmpl $2,early_recursion_flag
583 je hlt_loop
584 incl early_recursion_flag
585 pushl 16(%esp)
586 pushl 24(%esp)
587 pushl 32(%esp)
588 pushl 40(%esp)
589 pushl $int_msg
590 call printk
592 call dump_stack
594 addl $(5*4),%esp
595 popl %ds
596 popl %es
597 popl %edx
598 popl %ecx
599 popl %eax
600 #endif
601 iret
603 __REFDATA
604 .align 4
605 ENTRY(initial_code)
606 .long i386_start_kernel
607 ENTRY(initial_page_table)
608 .long pa(swapper_pg_dir)
610 /*
611 * BSS section
612 */
613 __PAGE_ALIGNED_BSS
614 .align PAGE_SIZE_asm
615 #ifdef CONFIG_X86_PAE
616 swapper_pg_pmd:
617 .fill 1024*KPMDS,4,0
618 #else
619 ENTRY(swapper_pg_dir)
620 .fill 1024,4,0
621 #endif
622 swapper_pg_fixmap:
623 .fill 1024,4,0
624 #ifdef CONFIG_X86_TRAMPOLINE
625 ENTRY(trampoline_pg_dir)
626 .fill 1024,4,0
627 #endif
628 ENTRY(empty_zero_page)
629 .fill 4096,1,0
631 /*
632 * This starts the data section.
633 */
634 #ifdef CONFIG_X86_PAE
635 __PAGE_ALIGNED_DATA
636 /* Page-aligned for the benefit of paravirt? */
637 .align PAGE_SIZE_asm
638 ENTRY(swapper_pg_dir)
639 .long pa(swapper_pg_pmd+PGD_IDENT_ATTR),0 /* low identity map */
640 # if KPMDS == 3
641 .long pa(swapper_pg_pmd+PGD_IDENT_ATTR),0
642 .long pa(swapper_pg_pmd+PGD_IDENT_ATTR+0x1000),0
643 .long pa(swapper_pg_pmd+PGD_IDENT_ATTR+0x2000),0
644 # elif KPMDS == 2
645 .long 0,0
646 .long pa(swapper_pg_pmd+PGD_IDENT_ATTR),0
647 .long pa(swapper_pg_pmd+PGD_IDENT_ATTR+0x1000),0
648 # elif KPMDS == 1
649 .long 0,0
650 .long 0,0
651 .long pa(swapper_pg_pmd+PGD_IDENT_ATTR),0
652 # else
653 # error "Kernel PMDs should be 1, 2 or 3"
654 # endif
655 .align PAGE_SIZE_asm /* needs to be page-sized too */
656 #endif
658 .data
659 ENTRY(stack_start)
660 .long init_thread_union+THREAD_SIZE
661 .long __BOOT_DS
663 ready: .byte 0
665 early_recursion_flag:
666 .long 0
668 int_msg:
669 .asciz "Unknown interrupt or fault at: %p %p %p\n"
671 fault_msg:
672 /* fault info: */
673 .ascii "BUG: Int %d: CR2 %p\n"
674 /* pusha regs: */
675 .ascii " EDI %p ESI %p EBP %p ESP %p\n"
676 .ascii " EBX %p EDX %p ECX %p EAX %p\n"
677 /* fault frame: */
678 .ascii " err %p EIP %p CS %p flg %p\n"
679 .ascii "Stack: %p %p %p %p %p %p %p %p\n"
680 .ascii " %p %p %p %p %p %p %p %p\n"
681 .asciz " %p %p %p %p %p %p %p %p\n"
683 #include "../../x86/xen/xen-head.S"
685 /*
686 * The IDT and GDT 'descriptors' are a strange 48-bit object
687 * only used by the lidt and lgdt instructions. They are not
688 * like usual segment descriptors - they consist of a 16-bit
689 * segment size, and 32-bit linear address value:
690 */
692 .globl boot_gdt_descr
693 .globl idt_descr
695 ALIGN
696 # early boot GDT descriptor (must use 1:1 address mapping)
697 .word 0 # 32 bit align gdt_desc.address
698 boot_gdt_descr:
699 .word __BOOT_DS+7
700 .long boot_gdt - __PAGE_OFFSET
702 .word 0 # 32-bit align idt_desc.address
703 idt_descr:
704 .word IDT_ENTRIES*8-1 # idt contains 256 entries
705 .long idt_table
707 # boot GDT descriptor (later on used by CPU#0):
708 .word 0 # 32 bit align gdt_desc.address
709 ENTRY(early_gdt_descr)
710 .word GDT_ENTRIES*8-1
711 .long gdt_page /* Overwritten for secondary CPUs */
713 /*
714 * The boot_gdt must mirror the equivalent in setup.S and is
715 * used only for booting.
716 */
717 .align L1_CACHE_BYTES
718 ENTRY(boot_gdt)
719 .fill GDT_ENTRY_BOOT_CS,8,0
720 .quad 0x00cf9a000000ffff /* kernel 4GB code at 0x00000000 */
721 .quad 0x00cf92000000ffff /* kernel 4GB data at 0x00000000 */