3 * Copyright IBM Corporation 2001, 2005, 2006
4 * Copyright Dave Engebretsen & Todd Inglett 2001
5 * Copyright Linas Vepstas 2005, 2006
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 * Please address comments and feedback to Linas Vepstas <linas@austin.ibm.com>
26 #include <linux/delay.h>
27 #include <linux/init.h>
28 #include <linux/list.h>
29 #include <linux/pci.h>
30 #include <linux/proc_fs.h>
31 #include <linux/rbtree.h>
32 #include <linux/seq_file.h>
33 #include <linux/spinlock.h>
36 #include <asm/atomic.h>
38 #include <asm/eeh_event.h>
40 #include <asm/machdep.h>
41 #include <asm/ppc-pci.h>
46 * EEH, or "Extended Error Handling" is a PCI bridge technology for
47 * dealing with PCI bus errors that can't be dealt with within the
48 * usual PCI framework, except by check-stopping the CPU. Systems
49 * that are designed for high-availability/reliability cannot afford
50 * to crash due to a "mere" PCI error, thus the need for EEH.
51 * An EEH-capable bridge operates by converting a detected error
52 * into a "slot freeze", taking the PCI adapter off-line, making
53 * the slot behave, from the OS'es point of view, as if the slot
54 * were "empty": all reads return 0xff's and all writes are silently
55 * ignored. EEH slot isolation events can be triggered by parity
56 * errors on the address or data busses (e.g. during posted writes),
57 * which in turn might be caused by low voltage on the bus, dust,
58 * vibration, humidity, radioactivity or plain-old failed hardware.
60 * Note, however, that one of the leading causes of EEH slot
61 * freeze events are buggy device drivers, buggy device microcode,
62 * or buggy device hardware. This is because any attempt by the
63 * device to bus-master data to a memory address that is not
64 * assigned to the device will trigger a slot freeze. (The idea
65 * is to prevent devices-gone-wild from corrupting system memory).
66 * Buggy hardware/drivers will have a miserable time co-existing
69 * Ideally, a PCI device driver, when suspecting that an isolation
70 * event has occured (e.g. by reading 0xff's), will then ask EEH
71 * whether this is the case, and then take appropriate steps to
72 * reset the PCI slot, the PCI device, and then resume operations.
73 * However, until that day, the checking is done here, with the
74 * eeh_check_failure() routine embedded in the MMIO macros. If
75 * the slot is found to be isolated, an "EEH Event" is synthesized
76 * and sent out for processing.
79 /* If a device driver keeps reading an MMIO register in an interrupt
80 * handler after a slot isolation event, it might be broken.
81 * This sets the threshold for how many read attempts we allow
82 * before printing an error message.
84 #define EEH_MAX_FAILS 2100000
86 /* Time to wait for a PCI slot to report status, in milliseconds */
87 #define PCI_BUS_RESET_WAIT_MSEC (60*1000)
90 static int ibm_set_eeh_option
;
91 static int ibm_set_slot_reset
;
92 static int ibm_read_slot_reset_state
;
93 static int ibm_read_slot_reset_state2
;
94 static int ibm_slot_error_detail
;
95 static int ibm_get_config_addr_info
;
96 static int ibm_get_config_addr_info2
;
97 static int ibm_configure_bridge
;
99 int eeh_subsystem_enabled
;
100 EXPORT_SYMBOL(eeh_subsystem_enabled
);
102 /* Lock to avoid races due to multiple reports of an error */
103 static DEFINE_RAW_SPINLOCK(confirm_error_lock
);
105 /* Buffer for reporting slot-error-detail rtas calls. Its here
106 * in BSS, and not dynamically alloced, so that it ends up in
107 * RMO where RTAS can access it.
109 static unsigned char slot_errbuf
[RTAS_ERROR_LOG_MAX
];
110 static DEFINE_SPINLOCK(slot_errbuf_lock
);
111 static int eeh_error_buf_size
;
113 /* Buffer for reporting pci register dumps. Its here in BSS, and
114 * not dynamically alloced, so that it ends up in RMO where RTAS
117 #define EEH_PCI_REGS_LOG_LEN 4096
118 static unsigned char pci_regs_buf
[EEH_PCI_REGS_LOG_LEN
];
120 /* System monitoring statistics */
121 static unsigned long no_device
;
122 static unsigned long no_dn
;
123 static unsigned long no_cfg_addr
;
124 static unsigned long ignored_check
;
125 static unsigned long total_mmio_ffs
;
126 static unsigned long false_positives
;
127 static unsigned long slot_resets
;
129 #define IS_BRIDGE(class_code) (((class_code)<<16) == PCI_BASE_CLASS_BRIDGE)
131 /* --------------------------------------------------------------- */
132 /* Below lies the EEH event infrastructure */
134 static void rtas_slot_error_detail(struct pci_dn
*pdn
, int severity
,
135 char *driver_log
, size_t loglen
)
141 /* Log the error with the rtas logger */
142 spin_lock_irqsave(&slot_errbuf_lock
, flags
);
143 memset(slot_errbuf
, 0, eeh_error_buf_size
);
145 /* Use PE configuration address, if present */
146 config_addr
= pdn
->eeh_config_addr
;
147 if (pdn
->eeh_pe_config_addr
)
148 config_addr
= pdn
->eeh_pe_config_addr
;
150 rc
= rtas_call(ibm_slot_error_detail
,
151 8, 1, NULL
, config_addr
,
152 BUID_HI(pdn
->phb
->buid
),
153 BUID_LO(pdn
->phb
->buid
),
154 virt_to_phys(driver_log
), loglen
,
155 virt_to_phys(slot_errbuf
),
160 log_error(slot_errbuf
, ERR_TYPE_RTAS_LOG
, 0);
161 spin_unlock_irqrestore(&slot_errbuf_lock
, flags
);
165 * gather_pci_data - copy assorted PCI config space registers to buff
166 * @pdn: device to report data for
167 * @buf: point to buffer in which to log
168 * @len: amount of room in buffer
170 * This routine captures assorted PCI configuration space data,
171 * and puts them into a buffer for RTAS error logging.
173 static size_t gather_pci_data(struct pci_dn
*pdn
, char * buf
, size_t len
)
175 struct pci_dev
*dev
= pdn
->pcidev
;
180 n
+= scnprintf(buf
+n
, len
-n
, "%s\n", pdn
->node
->full_name
);
181 printk(KERN_WARNING
"EEH: of node=%s\n", pdn
->node
->full_name
);
183 rtas_read_config(pdn
, PCI_VENDOR_ID
, 4, &cfg
);
184 n
+= scnprintf(buf
+n
, len
-n
, "dev/vend:%08x\n", cfg
);
185 printk(KERN_WARNING
"EEH: PCI device/vendor: %08x\n", cfg
);
187 rtas_read_config(pdn
, PCI_COMMAND
, 4, &cfg
);
188 n
+= scnprintf(buf
+n
, len
-n
, "cmd/stat:%x\n", cfg
);
189 printk(KERN_WARNING
"EEH: PCI cmd/status register: %08x\n", cfg
);
192 printk(KERN_WARNING
"EEH: no PCI device for this of node\n");
196 /* Gather bridge-specific registers */
197 if (dev
->class >> 16 == PCI_BASE_CLASS_BRIDGE
) {
198 rtas_read_config(pdn
, PCI_SEC_STATUS
, 2, &cfg
);
199 n
+= scnprintf(buf
+n
, len
-n
, "sec stat:%x\n", cfg
);
200 printk(KERN_WARNING
"EEH: Bridge secondary status: %04x\n", cfg
);
202 rtas_read_config(pdn
, PCI_BRIDGE_CONTROL
, 2, &cfg
);
203 n
+= scnprintf(buf
+n
, len
-n
, "brdg ctl:%x\n", cfg
);
204 printk(KERN_WARNING
"EEH: Bridge control: %04x\n", cfg
);
207 /* Dump out the PCI-X command and status regs */
208 cap
= pci_find_capability(dev
, PCI_CAP_ID_PCIX
);
210 rtas_read_config(pdn
, cap
, 4, &cfg
);
211 n
+= scnprintf(buf
+n
, len
-n
, "pcix-cmd:%x\n", cfg
);
212 printk(KERN_WARNING
"EEH: PCI-X cmd: %08x\n", cfg
);
214 rtas_read_config(pdn
, cap
+4, 4, &cfg
);
215 n
+= scnprintf(buf
+n
, len
-n
, "pcix-stat:%x\n", cfg
);
216 printk(KERN_WARNING
"EEH: PCI-X status: %08x\n", cfg
);
219 /* If PCI-E capable, dump PCI-E cap 10, and the AER */
220 cap
= pci_find_capability(dev
, PCI_CAP_ID_EXP
);
222 n
+= scnprintf(buf
+n
, len
-n
, "pci-e cap10:\n");
224 "EEH: PCI-E capabilities and status follow:\n");
226 for (i
=0; i
<=8; i
++) {
227 rtas_read_config(pdn
, cap
+4*i
, 4, &cfg
);
228 n
+= scnprintf(buf
+n
, len
-n
, "%02x:%x\n", 4*i
, cfg
);
229 printk(KERN_WARNING
"EEH: PCI-E %02x: %08x\n", i
, cfg
);
232 cap
= pci_find_ext_capability(dev
, PCI_EXT_CAP_ID_ERR
);
234 n
+= scnprintf(buf
+n
, len
-n
, "pci-e AER:\n");
236 "EEH: PCI-E AER capability register set follows:\n");
238 for (i
=0; i
<14; i
++) {
239 rtas_read_config(pdn
, cap
+4*i
, 4, &cfg
);
240 n
+= scnprintf(buf
+n
, len
-n
, "%02x:%x\n", 4*i
, cfg
);
241 printk(KERN_WARNING
"EEH: PCI-E AER %02x: %08x\n", i
, cfg
);
246 /* Gather status on devices under the bridge */
247 if (dev
->class >> 16 == PCI_BASE_CLASS_BRIDGE
) {
248 struct device_node
*dn
;
250 for_each_child_of_node(pdn
->node
, dn
) {
253 n
+= gather_pci_data(pdn
, buf
+n
, len
-n
);
260 void eeh_slot_error_detail(struct pci_dn
*pdn
, int severity
)
265 rtas_pci_enable(pdn
, EEH_THAW_MMIO
);
266 loglen
= gather_pci_data(pdn
, pci_regs_buf
, EEH_PCI_REGS_LOG_LEN
);
268 rtas_slot_error_detail(pdn
, severity
, pci_regs_buf
, loglen
);
272 * read_slot_reset_state - Read the reset state of a device node's slot
273 * @dn: device node to read
274 * @rets: array to return results in
276 static int read_slot_reset_state(struct pci_dn
*pdn
, int rets
[])
281 if (ibm_read_slot_reset_state2
!= RTAS_UNKNOWN_SERVICE
) {
282 token
= ibm_read_slot_reset_state2
;
285 token
= ibm_read_slot_reset_state
;
286 rets
[2] = 0; /* fake PE Unavailable info */
290 /* Use PE configuration address, if present */
291 config_addr
= pdn
->eeh_config_addr
;
292 if (pdn
->eeh_pe_config_addr
)
293 config_addr
= pdn
->eeh_pe_config_addr
;
295 return rtas_call(token
, 3, outputs
, rets
, config_addr
,
296 BUID_HI(pdn
->phb
->buid
), BUID_LO(pdn
->phb
->buid
));
300 * eeh_wait_for_slot_status - returns error status of slot
301 * @pdn pci device node
302 * @max_wait_msecs maximum number to millisecs to wait
304 * Return negative value if a permanent error, else return
305 * Partition Endpoint (PE) status value.
307 * If @max_wait_msecs is positive, then this routine will
308 * sleep until a valid status can be obtained, or until
309 * the max allowed wait time is exceeded, in which case
313 eeh_wait_for_slot_status(struct pci_dn
*pdn
, int max_wait_msecs
)
320 rc
= read_slot_reset_state(pdn
, rets
);
322 if (rets
[1] == 0) return -1; /* EEH is not supported */
324 if (rets
[0] != 5) return rets
[0]; /* return actual status */
326 if (rets
[2] == 0) return -1; /* permanently unavailable */
328 if (max_wait_msecs
<= 0) break;
333 "EEH: Firmware returned bad wait value=%d\n", mwait
);
335 } else if (mwait
> 300*1000) {
337 "EEH: Firmware is taking too long, time=%d\n", mwait
);
340 max_wait_msecs
-= mwait
;
344 printk(KERN_WARNING
"EEH: Timed out waiting for slot status\n");
349 * eeh_token_to_phys - convert EEH address token to phys address
350 * @token i/o token, should be address in the form 0xA....
352 static inline unsigned long eeh_token_to_phys(unsigned long token
)
357 ptep
= find_linux_pte(init_mm
.pgd
, token
);
360 pa
= pte_pfn(*ptep
) << PAGE_SHIFT
;
362 return pa
| (token
& (PAGE_SIZE
-1));
366 * Return the "partitionable endpoint" (pe) under which this device lies
368 struct device_node
* find_device_pe(struct device_node
*dn
)
370 while ((dn
->parent
) && PCI_DN(dn
->parent
) &&
371 (PCI_DN(dn
->parent
)->eeh_mode
& EEH_MODE_SUPPORTED
)) {
377 /** Mark all devices that are children of this device as failed.
378 * Mark the device driver too, so that it can see the failure
379 * immediately; this is critical, since some drivers poll
380 * status registers in interrupts ... If a driver is polling,
381 * and the slot is frozen, then the driver can deadlock in
382 * an interrupt context, which is bad.
385 static void __eeh_mark_slot(struct device_node
*parent
, int mode_flag
)
387 struct device_node
*dn
;
389 for_each_child_of_node(parent
, dn
) {
391 /* Mark the pci device driver too */
392 struct pci_dev
*dev
= PCI_DN(dn
)->pcidev
;
394 PCI_DN(dn
)->eeh_mode
|= mode_flag
;
396 if (dev
&& dev
->driver
)
397 dev
->error_state
= pci_channel_io_frozen
;
399 __eeh_mark_slot(dn
, mode_flag
);
404 void eeh_mark_slot (struct device_node
*dn
, int mode_flag
)
407 dn
= find_device_pe (dn
);
409 /* Back up one, since config addrs might be shared */
410 if (!pcibios_find_pci_bus(dn
) && PCI_DN(dn
->parent
))
413 PCI_DN(dn
)->eeh_mode
|= mode_flag
;
415 /* Mark the pci device too */
416 dev
= PCI_DN(dn
)->pcidev
;
418 dev
->error_state
= pci_channel_io_frozen
;
420 __eeh_mark_slot(dn
, mode_flag
);
423 static void __eeh_clear_slot(struct device_node
*parent
, int mode_flag
)
425 struct device_node
*dn
;
427 for_each_child_of_node(parent
, dn
) {
429 PCI_DN(dn
)->eeh_mode
&= ~mode_flag
;
430 PCI_DN(dn
)->eeh_check_count
= 0;
431 __eeh_clear_slot(dn
, mode_flag
);
436 void eeh_clear_slot (struct device_node
*dn
, int mode_flag
)
439 raw_spin_lock_irqsave(&confirm_error_lock
, flags
);
441 dn
= find_device_pe (dn
);
443 /* Back up one, since config addrs might be shared */
444 if (!pcibios_find_pci_bus(dn
) && PCI_DN(dn
->parent
))
447 PCI_DN(dn
)->eeh_mode
&= ~mode_flag
;
448 PCI_DN(dn
)->eeh_check_count
= 0;
449 __eeh_clear_slot(dn
, mode_flag
);
450 raw_spin_unlock_irqrestore(&confirm_error_lock
, flags
);
454 * eeh_dn_check_failure - check if all 1's data is due to EEH slot freeze
456 * @dev pci device, if known
458 * Check for an EEH failure for the given device node. Call this
459 * routine if the result of a read was all 0xff's and you want to
460 * find out if this is due to an EEH slot freeze. This routine
461 * will query firmware for the EEH status.
463 * Returns 0 if there has not been an EEH error; otherwise returns
464 * a non-zero value and queues up a slot isolation event notification.
466 * It is safe to call this routine in an interrupt context.
468 int eeh_dn_check_failure(struct device_node
*dn
, struct pci_dev
*dev
)
475 const char *location
;
479 if (!eeh_subsystem_enabled
)
486 dn
= find_device_pe(dn
);
489 /* Access to IO BARs might get this far and still not want checking. */
490 if (!(pdn
->eeh_mode
& EEH_MODE_SUPPORTED
) ||
491 pdn
->eeh_mode
& EEH_MODE_NOCHECK
) {
493 pr_debug("EEH: Ignored check (%x) for %s %s\n",
494 pdn
->eeh_mode
, eeh_pci_name(dev
), dn
->full_name
);
498 if (!pdn
->eeh_config_addr
&& !pdn
->eeh_pe_config_addr
) {
503 /* If we already have a pending isolation event for this
504 * slot, we know it's bad already, we don't need to check.
505 * Do this checking under a lock; as multiple PCI devices
506 * in one slot might report errors simultaneously, and we
507 * only want one error recovery routine running.
509 raw_spin_lock_irqsave(&confirm_error_lock
, flags
);
511 if (pdn
->eeh_mode
& EEH_MODE_ISOLATED
) {
512 pdn
->eeh_check_count
++;
513 if (pdn
->eeh_check_count
% EEH_MAX_FAILS
== 0) {
514 location
= of_get_property(dn
, "ibm,loc-code", NULL
);
515 printk (KERN_ERR
"EEH: %d reads ignored for recovering device at "
516 "location=%s driver=%s pci addr=%s\n",
517 pdn
->eeh_check_count
, location
,
518 dev
->driver
->name
, eeh_pci_name(dev
));
519 printk (KERN_ERR
"EEH: Might be infinite loop in %s driver\n",
527 * Now test for an EEH failure. This is VERY expensive.
528 * Note that the eeh_config_addr may be a parent device
529 * in the case of a device behind a bridge, or it may be
530 * function zero of a multi-function device.
531 * In any case they must share a common PHB.
533 ret
= read_slot_reset_state(pdn
, rets
);
535 /* If the call to firmware failed, punt */
537 printk(KERN_WARNING
"EEH: read_slot_reset_state() failed; rc=%d dn=%s\n",
540 pdn
->eeh_false_positives
++;
545 /* Note that config-io to empty slots may fail;
546 * they are empty when they don't have children. */
547 if ((rets
[0] == 5) && (rets
[2] == 0) && (dn
->child
== NULL
)) {
549 pdn
->eeh_false_positives
++;
554 /* If EEH is not supported on this device, punt. */
556 printk(KERN_WARNING
"EEH: event on unsupported device, rc=%d dn=%s\n",
559 pdn
->eeh_false_positives
++;
564 /* If not the kind of error we know about, punt. */
565 if (rets
[0] != 1 && rets
[0] != 2 && rets
[0] != 4 && rets
[0] != 5) {
567 pdn
->eeh_false_positives
++;
574 /* Avoid repeated reports of this failure, including problems
575 * with other functions on this device, and functions under
577 eeh_mark_slot (dn
, EEH_MODE_ISOLATED
);
578 raw_spin_unlock_irqrestore(&confirm_error_lock
, flags
);
580 eeh_send_failure_event (dn
, dev
);
582 /* Most EEH events are due to device driver bugs. Having
583 * a stack trace will help the device-driver authors figure
584 * out what happened. So print that out. */
589 raw_spin_unlock_irqrestore(&confirm_error_lock
, flags
);
593 EXPORT_SYMBOL_GPL(eeh_dn_check_failure
);
595 unsigned long eeh_check_failure(const volatile void __iomem
*token
, unsigned long val
)
599 struct device_node
*dn
;
601 /* Finding the phys addr + pci device; this is pretty quick. */
602 addr
= eeh_token_to_phys((unsigned long __force
) token
);
603 dev
= pci_get_device_by_addr(addr
);
609 dn
= pci_device_to_OF_node(dev
);
610 eeh_dn_check_failure (dn
, dev
);
616 EXPORT_SYMBOL(eeh_check_failure
);
618 /* ------------------------------------------------------------- */
619 /* The code below deals with error recovery */
622 * rtas_pci_enable - enable MMIO or DMA transfers for this slot
623 * @pdn pci device node
627 rtas_pci_enable(struct pci_dn
*pdn
, int function
)
632 /* Use PE configuration address, if present */
633 config_addr
= pdn
->eeh_config_addr
;
634 if (pdn
->eeh_pe_config_addr
)
635 config_addr
= pdn
->eeh_pe_config_addr
;
637 rc
= rtas_call(ibm_set_eeh_option
, 4, 1, NULL
,
639 BUID_HI(pdn
->phb
->buid
),
640 BUID_LO(pdn
->phb
->buid
),
644 printk(KERN_WARNING
"EEH: Unexpected state change %d, err=%d dn=%s\n",
645 function
, rc
, pdn
->node
->full_name
);
647 rc
= eeh_wait_for_slot_status (pdn
, PCI_BUS_RESET_WAIT_MSEC
);
648 if ((rc
== 4) && (function
== EEH_THAW_MMIO
))
655 * rtas_pci_slot_reset - raises/lowers the pci #RST line
656 * @pdn pci device node
657 * @state: 1/0 to raise/lower the #RST
659 * Clear the EEH-frozen condition on a slot. This routine
660 * asserts the PCI #RST line if the 'state' argument is '1',
661 * and drops the #RST line if 'state is '0'. This routine is
662 * safe to call in an interrupt context.
667 rtas_pci_slot_reset(struct pci_dn
*pdn
, int state
)
675 printk (KERN_WARNING
"EEH: in slot reset, device node %s has no phb\n",
676 pdn
->node
->full_name
);
680 /* Use PE configuration address, if present */
681 config_addr
= pdn
->eeh_config_addr
;
682 if (pdn
->eeh_pe_config_addr
)
683 config_addr
= pdn
->eeh_pe_config_addr
;
685 rc
= rtas_call(ibm_set_slot_reset
,4,1, NULL
,
687 BUID_HI(pdn
->phb
->buid
),
688 BUID_LO(pdn
->phb
->buid
),
691 printk (KERN_WARNING
"EEH: Unable to reset the failed slot,"
692 " (%d) #RST=%d dn=%s\n",
693 rc
, state
, pdn
->node
->full_name
);
697 * pcibios_set_pcie_slot_reset - Set PCI-E reset state
698 * @dev: pci device struct
699 * @state: reset state to enter
704 int pcibios_set_pcie_reset_state(struct pci_dev
*dev
, enum pcie_reset_state state
)
706 struct device_node
*dn
= pci_device_to_OF_node(dev
);
707 struct pci_dn
*pdn
= PCI_DN(dn
);
710 case pcie_deassert_reset
:
711 rtas_pci_slot_reset(pdn
, 0);
714 rtas_pci_slot_reset(pdn
, 1);
716 case pcie_warm_reset
:
717 rtas_pci_slot_reset(pdn
, 3);
727 * rtas_set_slot_reset -- assert the pci #RST line for 1/4 second
728 * @pdn: pci device node to be reset.
730 * Return 0 if success, else a non-zero value.
733 static void __rtas_set_slot_reset(struct pci_dn
*pdn
)
735 struct pci_dev
*dev
= pdn
->pcidev
;
737 /* Determine type of EEH reset required by device,
738 * default hot reset or fundamental reset
740 if (dev
&& dev
->needs_freset
)
741 rtas_pci_slot_reset(pdn
, 3);
743 rtas_pci_slot_reset(pdn
, 1);
745 /* The PCI bus requires that the reset be held high for at least
746 * a 100 milliseconds. We wait a bit longer 'just in case'. */
748 #define PCI_BUS_RST_HOLD_TIME_MSEC 250
749 msleep (PCI_BUS_RST_HOLD_TIME_MSEC
);
751 /* We might get hit with another EEH freeze as soon as the
752 * pci slot reset line is dropped. Make sure we don't miss
753 * these, and clear the flag now. */
754 eeh_clear_slot (pdn
->node
, EEH_MODE_ISOLATED
);
756 rtas_pci_slot_reset (pdn
, 0);
758 /* After a PCI slot has been reset, the PCI Express spec requires
759 * a 1.5 second idle time for the bus to stabilize, before starting
761 #define PCI_BUS_SETTLE_TIME_MSEC 1800
762 msleep (PCI_BUS_SETTLE_TIME_MSEC
);
765 int rtas_set_slot_reset(struct pci_dn
*pdn
)
769 /* Take three shots at resetting the bus */
770 for (i
=0; i
<3; i
++) {
771 __rtas_set_slot_reset(pdn
);
773 rc
= eeh_wait_for_slot_status(pdn
, PCI_BUS_RESET_WAIT_MSEC
);
778 printk(KERN_ERR
"EEH: unrecoverable slot failure %s\n",
779 pdn
->node
->full_name
);
782 printk(KERN_ERR
"EEH: bus reset %d failed on slot %s, rc=%d\n",
783 i
+1, pdn
->node
->full_name
, rc
);
789 /* ------------------------------------------------------- */
790 /** Save and restore of PCI BARs
792 * Although firmware will set up BARs during boot, it doesn't
793 * set up device BAR's after a device reset, although it will,
794 * if requested, set up bridge configuration. Thus, we need to
795 * configure the PCI devices ourselves.
799 * __restore_bars - Restore the Base Address Registers
800 * @pdn: pci device node
802 * Loads the PCI configuration space base address registers,
803 * the expansion ROM base address, the latency timer, and etc.
804 * from the saved values in the device node.
806 static inline void __restore_bars (struct pci_dn
*pdn
)
811 if (NULL
==pdn
->phb
) return;
812 for (i
=4; i
<10; i
++) {
813 rtas_write_config(pdn
, i
*4, 4, pdn
->config_space
[i
]);
816 /* 12 == Expansion ROM Address */
817 rtas_write_config(pdn
, 12*4, 4, pdn
->config_space
[12]);
819 #define BYTE_SWAP(OFF) (8*((OFF)/4)+3-(OFF))
820 #define SAVED_BYTE(OFF) (((u8 *)(pdn->config_space))[BYTE_SWAP(OFF)])
822 rtas_write_config (pdn
, PCI_CACHE_LINE_SIZE
, 1,
823 SAVED_BYTE(PCI_CACHE_LINE_SIZE
));
825 rtas_write_config (pdn
, PCI_LATENCY_TIMER
, 1,
826 SAVED_BYTE(PCI_LATENCY_TIMER
));
828 /* max latency, min grant, interrupt pin and line */
829 rtas_write_config(pdn
, 15*4, 4, pdn
->config_space
[15]);
831 /* Restore PERR & SERR bits, some devices require it,
832 don't touch the other command bits */
833 rtas_read_config(pdn
, PCI_COMMAND
, 4, &cmd
);
834 if (pdn
->config_space
[1] & PCI_COMMAND_PARITY
)
835 cmd
|= PCI_COMMAND_PARITY
;
837 cmd
&= ~PCI_COMMAND_PARITY
;
838 if (pdn
->config_space
[1] & PCI_COMMAND_SERR
)
839 cmd
|= PCI_COMMAND_SERR
;
841 cmd
&= ~PCI_COMMAND_SERR
;
842 rtas_write_config(pdn
, PCI_COMMAND
, 4, cmd
);
846 * eeh_restore_bars - restore the PCI config space info
848 * This routine performs a recursive walk to the children
849 * of this device as well.
851 void eeh_restore_bars(struct pci_dn
*pdn
)
853 struct device_node
*dn
;
857 if ((pdn
->eeh_mode
& EEH_MODE_SUPPORTED
) && !IS_BRIDGE(pdn
->class_code
))
858 __restore_bars (pdn
);
860 for_each_child_of_node(pdn
->node
, dn
)
861 eeh_restore_bars (PCI_DN(dn
));
865 * eeh_save_bars - save device bars
867 * Save the values of the device bars. Unlike the restore
868 * routine, this routine is *not* recursive. This is because
869 * PCI devices are added individuallly; but, for the restore,
870 * an entire slot is reset at a time.
872 static void eeh_save_bars(struct pci_dn
*pdn
)
879 for (i
= 0; i
< 16; i
++)
880 rtas_read_config(pdn
, i
* 4, 4, &pdn
->config_space
[i
]);
884 rtas_configure_bridge(struct pci_dn
*pdn
)
889 /* Use PE configuration address, if present */
890 config_addr
= pdn
->eeh_config_addr
;
891 if (pdn
->eeh_pe_config_addr
)
892 config_addr
= pdn
->eeh_pe_config_addr
;
894 rc
= rtas_call(ibm_configure_bridge
,3,1, NULL
,
896 BUID_HI(pdn
->phb
->buid
),
897 BUID_LO(pdn
->phb
->buid
));
899 printk (KERN_WARNING
"EEH: Unable to configure device bridge (%d) for %s\n",
900 rc
, pdn
->node
->full_name
);
904 /* ------------------------------------------------------------- */
905 /* The code below deals with enabling EEH for devices during the
906 * early boot sequence. EEH must be enabled before any PCI probing
912 struct eeh_early_enable_info
{
913 unsigned int buid_hi
;
914 unsigned int buid_lo
;
917 static int get_pe_addr (int config_addr
,
918 struct eeh_early_enable_info
*info
)
920 unsigned int rets
[3];
923 /* Use latest config-addr token on power6 */
924 if (ibm_get_config_addr_info2
!= RTAS_UNKNOWN_SERVICE
) {
925 /* Make sure we have a PE in hand */
926 ret
= rtas_call (ibm_get_config_addr_info2
, 4, 2, rets
,
927 config_addr
, info
->buid_hi
, info
->buid_lo
, 1);
928 if (ret
|| (rets
[0]==0))
931 ret
= rtas_call (ibm_get_config_addr_info2
, 4, 2, rets
,
932 config_addr
, info
->buid_hi
, info
->buid_lo
, 0);
938 /* Use older config-addr token on power5 */
939 if (ibm_get_config_addr_info
!= RTAS_UNKNOWN_SERVICE
) {
940 ret
= rtas_call (ibm_get_config_addr_info
, 4, 2, rets
,
941 config_addr
, info
->buid_hi
, info
->buid_lo
, 0);
949 /* Enable eeh for the given device node. */
950 static void *early_enable_eeh(struct device_node
*dn
, void *data
)
952 unsigned int rets
[3];
953 struct eeh_early_enable_info
*info
= data
;
955 const u32
*class_code
= of_get_property(dn
, "class-code", NULL
);
956 const u32
*vendor_id
= of_get_property(dn
, "vendor-id", NULL
);
957 const u32
*device_id
= of_get_property(dn
, "device-id", NULL
);
960 struct pci_dn
*pdn
= PCI_DN(dn
);
964 pdn
->eeh_check_count
= 0;
965 pdn
->eeh_freeze_count
= 0;
966 pdn
->eeh_false_positives
= 0;
968 if (!of_device_is_available(dn
))
971 /* Ignore bad nodes. */
972 if (!class_code
|| !vendor_id
|| !device_id
)
975 /* There is nothing to check on PCI to ISA bridges */
976 if (dn
->type
&& !strcmp(dn
->type
, "isa")) {
977 pdn
->eeh_mode
|= EEH_MODE_NOCHECK
;
980 pdn
->class_code
= *class_code
;
982 /* Ok... see if this device supports EEH. Some do, some don't,
983 * and the only way to find out is to check each and every one. */
984 regs
= of_get_property(dn
, "reg", NULL
);
986 /* First register entry is addr (00BBSS00) */
987 /* Try to enable eeh */
988 ret
= rtas_call(ibm_set_eeh_option
, 4, 1, NULL
,
989 regs
[0], info
->buid_hi
, info
->buid_lo
,
994 pdn
->eeh_config_addr
= regs
[0];
996 /* If the newer, better, ibm,get-config-addr-info is supported,
997 * then use that instead. */
998 pdn
->eeh_pe_config_addr
= get_pe_addr(pdn
->eeh_config_addr
, info
);
1000 /* Some older systems (Power4) allow the
1001 * ibm,set-eeh-option call to succeed even on nodes
1002 * where EEH is not supported. Verify support
1004 ret
= read_slot_reset_state(pdn
, rets
);
1005 if ((ret
== 0) && (rets
[1] == 1))
1010 eeh_subsystem_enabled
= 1;
1011 pdn
->eeh_mode
|= EEH_MODE_SUPPORTED
;
1013 pr_debug("EEH: %s: eeh enabled, config=%x pe_config=%x\n",
1014 dn
->full_name
, pdn
->eeh_config_addr
,
1015 pdn
->eeh_pe_config_addr
);
1018 /* This device doesn't support EEH, but it may have an
1019 * EEH parent, in which case we mark it as supported. */
1020 if (dn
->parent
&& PCI_DN(dn
->parent
)
1021 && (PCI_DN(dn
->parent
)->eeh_mode
& EEH_MODE_SUPPORTED
)) {
1022 /* Parent supports EEH. */
1023 pdn
->eeh_mode
|= EEH_MODE_SUPPORTED
;
1024 pdn
->eeh_config_addr
= PCI_DN(dn
->parent
)->eeh_config_addr
;
1029 printk(KERN_WARNING
"EEH: %s: unable to get reg property.\n",
1038 * Initialize EEH by trying to enable it for all of the adapters in the system.
1039 * As a side effect we can determine here if eeh is supported at all.
1040 * Note that we leave EEH on so failed config cycles won't cause a machine
1041 * check. If a user turns off EEH for a particular adapter they are really
1042 * telling Linux to ignore errors. Some hardware (e.g. POWER5) won't
1043 * grant access to a slot if EEH isn't enabled, and so we always enable
1044 * EEH for all slots/all devices.
1046 * The eeh-force-off option disables EEH checking globally, for all slots.
1047 * Even if force-off is set, the EEH hardware is still enabled, so that
1048 * newer systems can boot.
1050 void __init
eeh_init(void)
1052 struct device_node
*phb
, *np
;
1053 struct eeh_early_enable_info info
;
1055 raw_spin_lock_init(&confirm_error_lock
);
1056 spin_lock_init(&slot_errbuf_lock
);
1058 np
= of_find_node_by_path("/rtas");
1062 ibm_set_eeh_option
= rtas_token("ibm,set-eeh-option");
1063 ibm_set_slot_reset
= rtas_token("ibm,set-slot-reset");
1064 ibm_read_slot_reset_state2
= rtas_token("ibm,read-slot-reset-state2");
1065 ibm_read_slot_reset_state
= rtas_token("ibm,read-slot-reset-state");
1066 ibm_slot_error_detail
= rtas_token("ibm,slot-error-detail");
1067 ibm_get_config_addr_info
= rtas_token("ibm,get-config-addr-info");
1068 ibm_get_config_addr_info2
= rtas_token("ibm,get-config-addr-info2");
1069 ibm_configure_bridge
= rtas_token ("ibm,configure-bridge");
1071 if (ibm_set_eeh_option
== RTAS_UNKNOWN_SERVICE
)
1074 eeh_error_buf_size
= rtas_token("rtas-error-log-max");
1075 if (eeh_error_buf_size
== RTAS_UNKNOWN_SERVICE
) {
1076 eeh_error_buf_size
= 1024;
1078 if (eeh_error_buf_size
> RTAS_ERROR_LOG_MAX
) {
1079 printk(KERN_WARNING
"EEH: rtas-error-log-max is bigger than allocated "
1080 "buffer ! (%d vs %d)", eeh_error_buf_size
, RTAS_ERROR_LOG_MAX
);
1081 eeh_error_buf_size
= RTAS_ERROR_LOG_MAX
;
1084 /* Enable EEH for all adapters. Note that eeh requires buid's */
1085 for (phb
= of_find_node_by_name(NULL
, "pci"); phb
;
1086 phb
= of_find_node_by_name(phb
, "pci")) {
1089 buid
= get_phb_buid(phb
);
1090 if (buid
== 0 || PCI_DN(phb
) == NULL
)
1093 info
.buid_lo
= BUID_LO(buid
);
1094 info
.buid_hi
= BUID_HI(buid
);
1095 traverse_pci_devices(phb
, early_enable_eeh
, &info
);
1098 if (eeh_subsystem_enabled
)
1099 printk(KERN_INFO
"EEH: PCI Enhanced I/O Error Handling Enabled\n");
1101 printk(KERN_WARNING
"EEH: No capable adapters found\n");
1105 * eeh_add_device_early - enable EEH for the indicated device_node
1106 * @dn: device node for which to set up EEH
1108 * This routine must be used to perform EEH initialization for PCI
1109 * devices that were added after system boot (e.g. hotplug, dlpar).
1110 * This routine must be called before any i/o is performed to the
1111 * adapter (inluding any config-space i/o).
1112 * Whether this actually enables EEH or not for this device depends
1113 * on the CEC architecture, type of the device, on earlier boot
1114 * command-line arguments & etc.
1116 static void eeh_add_device_early(struct device_node
*dn
)
1118 struct pci_controller
*phb
;
1119 struct eeh_early_enable_info info
;
1121 if (!dn
|| !PCI_DN(dn
))
1123 phb
= PCI_DN(dn
)->phb
;
1125 /* USB Bus children of PCI devices will not have BUID's */
1126 if (NULL
== phb
|| 0 == phb
->buid
)
1129 info
.buid_hi
= BUID_HI(phb
->buid
);
1130 info
.buid_lo
= BUID_LO(phb
->buid
);
1131 early_enable_eeh(dn
, &info
);
1134 void eeh_add_device_tree_early(struct device_node
*dn
)
1136 struct device_node
*sib
;
1138 for_each_child_of_node(dn
, sib
)
1139 eeh_add_device_tree_early(sib
);
1140 eeh_add_device_early(dn
);
1142 EXPORT_SYMBOL_GPL(eeh_add_device_tree_early
);
1145 * eeh_add_device_late - perform EEH initialization for the indicated pci device
1146 * @dev: pci device for which to set up EEH
1148 * This routine must be used to complete EEH initialization for PCI
1149 * devices that were added after system boot (e.g. hotplug, dlpar).
1151 static void eeh_add_device_late(struct pci_dev
*dev
)
1153 struct device_node
*dn
;
1156 if (!dev
|| !eeh_subsystem_enabled
)
1159 pr_debug("EEH: Adding device %s\n", pci_name(dev
));
1161 dn
= pci_device_to_OF_node(dev
);
1163 if (pdn
->pcidev
== dev
) {
1164 pr_debug("EEH: Already referenced !\n");
1167 WARN_ON(pdn
->pcidev
);
1172 pci_addr_cache_insert_device(dev
);
1173 eeh_sysfs_add_device(dev
);
1176 void eeh_add_device_tree_late(struct pci_bus
*bus
)
1178 struct pci_dev
*dev
;
1180 list_for_each_entry(dev
, &bus
->devices
, bus_list
) {
1181 eeh_add_device_late(dev
);
1182 if (dev
->hdr_type
== PCI_HEADER_TYPE_BRIDGE
) {
1183 struct pci_bus
*subbus
= dev
->subordinate
;
1185 eeh_add_device_tree_late(subbus
);
1189 EXPORT_SYMBOL_GPL(eeh_add_device_tree_late
);
1192 * eeh_remove_device - undo EEH setup for the indicated pci device
1193 * @dev: pci device to be removed
1195 * This routine should be called when a device is removed from
1196 * a running system (e.g. by hotplug or dlpar). It unregisters
1197 * the PCI device from the EEH subsystem. I/O errors affecting
1198 * this device will no longer be detected after this call; thus,
1199 * i/o errors affecting this slot may leave this device unusable.
1201 static void eeh_remove_device(struct pci_dev
*dev
)
1203 struct device_node
*dn
;
1204 if (!dev
|| !eeh_subsystem_enabled
)
1207 /* Unregister the device with the EEH/PCI address search system */
1208 pr_debug("EEH: Removing device %s\n", pci_name(dev
));
1210 dn
= pci_device_to_OF_node(dev
);
1211 if (PCI_DN(dn
)->pcidev
== NULL
) {
1212 pr_debug("EEH: Not referenced !\n");
1215 PCI_DN(dn
)->pcidev
= NULL
;
1218 pci_addr_cache_remove_device(dev
);
1219 eeh_sysfs_remove_device(dev
);
1222 void eeh_remove_bus_device(struct pci_dev
*dev
)
1224 struct pci_bus
*bus
= dev
->subordinate
;
1225 struct pci_dev
*child
, *tmp
;
1227 eeh_remove_device(dev
);
1229 if (bus
&& dev
->hdr_type
== PCI_HEADER_TYPE_BRIDGE
) {
1230 list_for_each_entry_safe(child
, tmp
, &bus
->devices
, bus_list
)
1231 eeh_remove_bus_device(child
);
1234 EXPORT_SYMBOL_GPL(eeh_remove_bus_device
);
1236 static int proc_eeh_show(struct seq_file
*m
, void *v
)
1238 if (0 == eeh_subsystem_enabled
) {
1239 seq_printf(m
, "EEH Subsystem is globally disabled\n");
1240 seq_printf(m
, "eeh_total_mmio_ffs=%ld\n", total_mmio_ffs
);
1242 seq_printf(m
, "EEH Subsystem is enabled\n");
1245 "no device node=%ld\n"
1246 "no config address=%ld\n"
1247 "check not wanted=%ld\n"
1248 "eeh_total_mmio_ffs=%ld\n"
1249 "eeh_false_positives=%ld\n"
1250 "eeh_slot_resets=%ld\n",
1251 no_device
, no_dn
, no_cfg_addr
,
1252 ignored_check
, total_mmio_ffs
,
1260 static int proc_eeh_open(struct inode
*inode
, struct file
*file
)
1262 return single_open(file
, proc_eeh_show
, NULL
);
1265 static const struct file_operations proc_eeh_operations
= {
1266 .open
= proc_eeh_open
,
1268 .llseek
= seq_lseek
,
1269 .release
= single_release
,
1272 static int __init
eeh_init_proc(void)
1274 if (machine_is(pseries
))
1275 proc_create("ppc64/eeh", 0, NULL
, &proc_eeh_operations
);
1278 __initcall(eeh_init_proc
);