2 * Common prep/pmac/chrp boot and setup code.
5 #include <linux/module.h>
6 #include <linux/string.h>
7 #include <linux/sched.h>
8 #include <linux/init.h>
9 #include <linux/kernel.h>
10 #include <linux/reboot.h>
11 #include <linux/delay.h>
12 #include <linux/initrd.h>
13 #include <linux/tty.h>
14 #include <linux/bootmem.h>
15 #include <linux/seq_file.h>
16 #include <linux/root_dev.h>
17 #include <linux/cpu.h>
18 #include <linux/console.h>
19 #include <linux/memblock.h>
23 #include <asm/processor.h>
24 #include <asm/pgtable.h>
25 #include <asm/setup.h>
28 #include <asm/cputable.h>
29 #include <asm/bootx.h>
30 #include <asm/btext.h>
31 #include <asm/machdep.h>
32 #include <asm/uaccess.h>
33 #include <asm/system.h>
34 #include <asm/pmac_feature.h>
35 #include <asm/sections.h>
36 #include <asm/nvram.h>
39 #include <asm/serial.h>
41 #include <asm/mmu_context.h>
47 extern void bootx_init(unsigned long r4
, unsigned long phys
);
50 EXPORT_SYMBOL_GPL(boot_cpuid
);
53 int smp_hw_index
[NR_CPUS
];
55 unsigned long ISA_DMA_THRESHOLD
;
56 unsigned int DMA_MODE_READ
;
57 unsigned int DMA_MODE_WRITE
;
59 #ifdef CONFIG_VGA_CONSOLE
60 unsigned long vgacon_remap_base
;
61 EXPORT_SYMBOL(vgacon_remap_base
);
65 * These are used in binfmt_elf.c to put aux entries on the stack
66 * for each elf executable being started.
73 * We're called here very early in the boot. We determine the machine
74 * type and call the appropriate low-level setup functions.
75 * -- Cort <cort@fsmlabs.com>
77 * Note that the kernel may be running at an address which is different
78 * from the address that it was linked at, so we must use RELOC/PTRRELOC
79 * to access static data (including strings). -- paulus
81 notrace
unsigned long __init
early_init(unsigned long dt_ptr
)
83 unsigned long offset
= reloc_offset();
84 struct cpu_spec
*spec
;
86 /* First zero the BSS -- use memset_io, some platforms don't have
88 memset_io((void __iomem
*)PTRRELOC(&__bss_start
), 0,
89 __bss_stop
- __bss_start
);
92 * Identify the CPU type and fix up code sections
93 * that depend on which cpu we have.
95 spec
= identify_cpu(offset
, mfspr(SPRN_PVR
));
97 do_feature_fixups(spec
->cpu_features
,
98 PTRRELOC(&__start___ftr_fixup
),
99 PTRRELOC(&__stop___ftr_fixup
));
101 do_feature_fixups(spec
->mmu_features
,
102 PTRRELOC(&__start___mmu_ftr_fixup
),
103 PTRRELOC(&__stop___mmu_ftr_fixup
));
105 do_lwsync_fixups(spec
->cpu_features
,
106 PTRRELOC(&__start___lwsync_fixup
),
107 PTRRELOC(&__stop___lwsync_fixup
));
109 return KERNELBASE
+ offset
;
114 * Find out what kind of machine we're on and save any data we need
115 * from the early boot process (devtree is copied on pmac by prom_init()).
116 * This is called very early on the boot process, after a minimal
117 * MMU environment has been set up but before MMU_init is called.
119 notrace
void __init
machine_init(unsigned long dt_ptr
)
123 /* Enable early debugging if any specified (see udbg.h) */
126 /* Do some early initialization based on the flat device tree */
127 early_init_devtree(__va(dt_ptr
));
131 setup_kdump_trampoline();
134 if (cpu_has_feature(CPU_FTR_CAN_DOZE
) ||
135 cpu_has_feature(CPU_FTR_CAN_NAP
))
136 ppc_md
.power_save
= ppc6xx_idle
;
140 if (cpu_has_feature(CPU_FTR_CAN_DOZE
) ||
141 cpu_has_feature(CPU_FTR_CAN_NAP
))
142 ppc_md
.power_save
= e500_idle
;
145 ppc_md
.progress("id mach(): done", 0x200);
148 #ifdef CONFIG_BOOKE_WDT
149 /* Checks wdt=x and wdt_period=xx command-line option */
150 notrace
int __init
early_parse_wdt(char *p
)
152 if (p
&& strncmp(p
, "0", 1) != 0)
153 booke_wdt_enabled
= 1;
157 early_param("wdt", early_parse_wdt
);
159 int __init
early_parse_wdt_period (char *p
)
162 booke_wdt_period
= simple_strtoul(p
, NULL
, 0);
166 early_param("wdt_period", early_parse_wdt_period
);
167 #endif /* CONFIG_BOOKE_WDT */
169 int __init
ppc_setup_l2cr(char *str
)
171 if (cpu_has_feature(CPU_FTR_L2CR
)) {
172 unsigned long val
= simple_strtoul(str
, NULL
, 0);
173 printk(KERN_INFO
"l2cr set to %lx\n", val
);
174 _set_L2CR(0); /* force invalidate by disable cache */
175 _set_L2CR(val
); /* and enable it */
179 __setup("l2cr=", ppc_setup_l2cr
);
181 int __init
ppc_setup_l3cr(char *str
)
183 if (cpu_has_feature(CPU_FTR_L3CR
)) {
184 unsigned long val
= simple_strtoul(str
, NULL
, 0);
185 printk(KERN_INFO
"l3cr set to %lx\n", val
);
186 _set_L3CR(val
); /* and enable it */
190 __setup("l3cr=", ppc_setup_l3cr
);
192 #ifdef CONFIG_GENERIC_NVRAM
194 /* Generic nvram hooks used by drivers/char/gen_nvram.c */
195 unsigned char nvram_read_byte(int addr
)
197 if (ppc_md
.nvram_read_val
)
198 return ppc_md
.nvram_read_val(addr
);
201 EXPORT_SYMBOL(nvram_read_byte
);
203 void nvram_write_byte(unsigned char val
, int addr
)
205 if (ppc_md
.nvram_write_val
)
206 ppc_md
.nvram_write_val(addr
, val
);
208 EXPORT_SYMBOL(nvram_write_byte
);
210 ssize_t
nvram_get_size(void)
212 if (ppc_md
.nvram_size
)
213 return ppc_md
.nvram_size();
216 EXPORT_SYMBOL(nvram_get_size
);
218 void nvram_sync(void)
220 if (ppc_md
.nvram_sync
)
223 EXPORT_SYMBOL(nvram_sync
);
225 #endif /* CONFIG_NVRAM */
227 int __init
ppc_init(void)
229 /* clear the progress line */
231 ppc_md
.progress(" ", 0xffff);
233 /* call platform init */
234 if (ppc_md
.init
!= NULL
) {
240 arch_initcall(ppc_init
);
242 static void __init
irqstack_early_init(void)
246 /* interrupt stacks must be in lowmem, we get that for free on ppc32
247 * as the memblock is limited to lowmem by MEMBLOCK_REAL_LIMIT */
248 for_each_possible_cpu(i
) {
249 softirq_ctx
[i
] = (struct thread_info
*)
250 __va(memblock_alloc(THREAD_SIZE
, THREAD_SIZE
));
251 hardirq_ctx
[i
] = (struct thread_info
*)
252 __va(memblock_alloc(THREAD_SIZE
, THREAD_SIZE
));
256 #if defined(CONFIG_BOOKE) || defined(CONFIG_40x)
257 static void __init
exc_lvl_early_init(void)
259 unsigned int i
, hw_cpu
;
261 /* interrupt stacks must be in lowmem, we get that for free on ppc32
262 * as the memblock is limited to lowmem by MEMBLOCK_REAL_LIMIT */
263 for_each_possible_cpu(i
) {
264 hw_cpu
= get_hard_smp_processor_id(i
);
265 critirq_ctx
[hw_cpu
] = (struct thread_info
*)
266 __va(memblock_alloc(THREAD_SIZE
, THREAD_SIZE
));
268 dbgirq_ctx
[hw_cpu
] = (struct thread_info
*)
269 __va(memblock_alloc(THREAD_SIZE
, THREAD_SIZE
));
270 mcheckirq_ctx
[hw_cpu
] = (struct thread_info
*)
271 __va(memblock_alloc(THREAD_SIZE
, THREAD_SIZE
));
276 #define exc_lvl_early_init()
279 /* Warning, IO base is not yet inited */
280 void __init
setup_arch(char **cmdline_p
)
282 *cmdline_p
= cmd_line
;
284 /* so udelay does something sensible, assume <= 1000 bogomips */
285 loops_per_jiffy
= 500000000 / HZ
;
287 unflatten_device_tree();
290 if (ppc_md
.init_early
)
293 find_legacy_serial_ports();
295 smp_setup_cpu_maps();
297 /* Register early console */
298 register_early_udbg_console();
303 * Set cache line size based on type of cpu as a default.
304 * Systems with OF can look in the properties on the cpu node(s)
305 * for a possibly more accurate value.
307 dcache_bsize
= cur_cpu_spec
->dcache_bsize
;
308 icache_bsize
= cur_cpu_spec
->icache_bsize
;
310 if (cpu_has_feature(CPU_FTR_UNIFIED_ID_CACHE
))
311 ucache_bsize
= icache_bsize
= dcache_bsize
;
313 /* reboot on panic */
319 init_mm
.start_code
= (unsigned long)_stext
;
320 init_mm
.end_code
= (unsigned long) _etext
;
321 init_mm
.end_data
= (unsigned long) _edata
;
322 init_mm
.brk
= klimit
;
324 exc_lvl_early_init();
326 irqstack_early_init();
328 /* set up the bootmem stuff with available memory */
330 if ( ppc_md
.progress
) ppc_md
.progress("setup_arch: bootmem", 0x3eab);
332 #ifdef CONFIG_DUMMY_CONSOLE
333 conswitchp
= &dummy_con
;
336 if (ppc_md
.setup_arch
)
338 if ( ppc_md
.progress
) ppc_md
.progress("arch: exit", 0x3eab);
342 /* Initialize the MMU context management stuff */