RT-AC56 3.0.0.4.374.37 core
[tomato.git] / release / src-rt-6.x.4708 / linux / linux-2.6.36 / arch / blackfin / mach-bf548 / boards / cm_bf548.c
blobc99c0691cb8012d33842084101afdab11d7b71a6
1 /*
2 * Copyright 2004-2009 Analog Devices Inc.
3 * 2008-2009 Bluetechnix
4 * 2005 National ICT Australia (NICTA)
5 * Aidan Williams <aidan@nicta.com.au>
7 * Licensed under the GPL-2 or later.
8 */
10 #include <linux/device.h>
11 #include <linux/platform_device.h>
12 #include <linux/mtd/mtd.h>
13 #include <linux/mtd/partitions.h>
14 #include <linux/mtd/physmap.h>
15 #include <linux/spi/spi.h>
16 #include <linux/spi/flash.h>
17 #include <linux/irq.h>
18 #include <linux/interrupt.h>
19 #include <linux/usb/musb.h>
20 #include <asm/bfin5xx_spi.h>
21 #include <asm/dma.h>
22 #include <asm/gpio.h>
23 #include <asm/nand.h>
24 #include <asm/portmux.h>
25 #include <asm/bfin_sdh.h>
26 #include <mach/bf54x_keys.h>
27 #include <asm/dpmc.h>
28 #include <linux/input.h>
29 #include <linux/spi/ad7877.h>
32 * Name the Board for the /proc/cpuinfo
34 const char bfin_board_name[] = "Bluetechnix CM-BF548";
37 * Driver needs to know address, irq and flag pin.
40 #if defined(CONFIG_FB_BF54X_LQ043) || defined(CONFIG_FB_BF54X_LQ043_MODULE)
42 #include <mach/bf54x-lq043.h>
44 static struct bfin_bf54xfb_mach_info bf54x_lq043_data = {
45 .width = 480,
46 .height = 272,
47 .xres = {480, 480, 480},
48 .yres = {272, 272, 272},
49 .bpp = {24, 24, 24},
50 .disp = GPIO_PE3,
53 static struct resource bf54x_lq043_resources[] = {
55 .start = IRQ_EPPI0_ERR,
56 .end = IRQ_EPPI0_ERR,
57 .flags = IORESOURCE_IRQ,
61 static struct platform_device bf54x_lq043_device = {
62 .name = "bf54x-lq043",
63 .id = -1,
64 .num_resources = ARRAY_SIZE(bf54x_lq043_resources),
65 .resource = bf54x_lq043_resources,
66 .dev = {
67 .platform_data = &bf54x_lq043_data,
70 #endif
72 #if defined(CONFIG_KEYBOARD_BFIN) || defined(CONFIG_KEYBOARD_BFIN_MODULE)
73 static unsigned int bf548_keymap[] = {
74 KEYVAL(0, 0, KEY_ENTER),
75 KEYVAL(0, 1, KEY_HELP),
76 KEYVAL(0, 2, KEY_0),
77 KEYVAL(0, 3, KEY_BACKSPACE),
78 KEYVAL(1, 0, KEY_TAB),
79 KEYVAL(1, 1, KEY_9),
80 KEYVAL(1, 2, KEY_8),
81 KEYVAL(1, 3, KEY_7),
82 KEYVAL(2, 0, KEY_DOWN),
83 KEYVAL(2, 1, KEY_6),
84 KEYVAL(2, 2, KEY_5),
85 KEYVAL(2, 3, KEY_4),
86 KEYVAL(3, 0, KEY_UP),
87 KEYVAL(3, 1, KEY_3),
88 KEYVAL(3, 2, KEY_2),
89 KEYVAL(3, 3, KEY_1),
92 static struct bfin_kpad_platform_data bf54x_kpad_data = {
93 .rows = 4,
94 .cols = 4,
95 .keymap = bf548_keymap,
96 .keymapsize = ARRAY_SIZE(bf548_keymap),
97 .repeat = 0,
98 .debounce_time = 5000, /* ns (5ms) */
99 .coldrive_time = 1000, /* ns (1ms) */
100 .keyup_test_interval = 50, /* ms (50ms) */
103 static struct resource bf54x_kpad_resources[] = {
105 .start = IRQ_KEY,
106 .end = IRQ_KEY,
107 .flags = IORESOURCE_IRQ,
111 static struct platform_device bf54x_kpad_device = {
112 .name = "bf54x-keys",
113 .id = -1,
114 .num_resources = ARRAY_SIZE(bf54x_kpad_resources),
115 .resource = bf54x_kpad_resources,
116 .dev = {
117 .platform_data = &bf54x_kpad_data,
120 #endif
122 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
123 static struct platform_device rtc_device = {
124 .name = "rtc-bfin",
125 .id = -1,
127 #endif
129 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
130 #ifdef CONFIG_SERIAL_BFIN_UART0
131 static struct resource bfin_uart0_resources[] = {
133 .start = UART0_DLL,
134 .end = UART0_RBR+2,
135 .flags = IORESOURCE_MEM,
138 .start = IRQ_UART0_RX,
139 .end = IRQ_UART0_RX+1,
140 .flags = IORESOURCE_IRQ,
143 .start = IRQ_UART0_ERROR,
144 .end = IRQ_UART0_ERROR,
145 .flags = IORESOURCE_IRQ,
148 .start = CH_UART0_TX,
149 .end = CH_UART0_TX,
150 .flags = IORESOURCE_DMA,
153 .start = CH_UART0_RX,
154 .end = CH_UART0_RX,
155 .flags = IORESOURCE_DMA,
159 unsigned short bfin_uart0_peripherals[] = {
160 P_UART0_TX, P_UART0_RX, 0
163 static struct platform_device bfin_uart0_device = {
164 .name = "bfin-uart",
165 .id = 0,
166 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
167 .resource = bfin_uart0_resources,
168 .dev = {
169 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
172 #endif
173 #ifdef CONFIG_SERIAL_BFIN_UART1
174 static struct resource bfin_uart1_resources[] = {
176 .start = UART1_DLL,
177 .end = UART1_RBR+2,
178 .flags = IORESOURCE_MEM,
181 .start = IRQ_UART1_RX,
182 .end = IRQ_UART1_RX+1,
183 .flags = IORESOURCE_IRQ,
186 .start = IRQ_UART1_ERROR,
187 .end = IRQ_UART1_ERROR,
188 .flags = IORESOURCE_IRQ,
191 .start = CH_UART1_TX,
192 .end = CH_UART1_TX,
193 .flags = IORESOURCE_DMA,
196 .start = CH_UART1_RX,
197 .end = CH_UART1_RX,
198 .flags = IORESOURCE_DMA,
200 #ifdef CONFIG_BFIN_UART1_CTSRTS
201 { /* CTS pin -- 0 means not supported */
202 .start = GPIO_PE10,
203 .end = GPIO_PE10,
204 .flags = IORESOURCE_IO,
206 { /* RTS pin -- 0 means not supported */
207 .start = GPIO_PE9,
208 .end = GPIO_PE9,
209 .flags = IORESOURCE_IO,
211 #endif
214 unsigned short bfin_uart1_peripherals[] = {
215 P_UART1_TX, P_UART1_RX,
216 #ifdef CONFIG_BFIN_UART1_CTSRTS
217 P_UART1_RTS, P_UART1_CTS,
218 #endif
222 static struct platform_device bfin_uart1_device = {
223 .name = "bfin-uart",
224 .id = 1,
225 .num_resources = ARRAY_SIZE(bfin_uart1_resources),
226 .resource = bfin_uart1_resources,
227 .dev = {
228 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
231 #endif
232 #ifdef CONFIG_SERIAL_BFIN_UART2
233 static struct resource bfin_uart2_resources[] = {
235 .start = UART2_DLL,
236 .end = UART2_RBR+2,
237 .flags = IORESOURCE_MEM,
240 .start = IRQ_UART2_RX,
241 .end = IRQ_UART2_RX+1,
242 .flags = IORESOURCE_IRQ,
245 .start = IRQ_UART2_ERROR,
246 .end = IRQ_UART2_ERROR,
247 .flags = IORESOURCE_IRQ,
250 .start = CH_UART2_TX,
251 .end = CH_UART2_TX,
252 .flags = IORESOURCE_DMA,
255 .start = CH_UART2_RX,
256 .end = CH_UART2_RX,
257 .flags = IORESOURCE_DMA,
261 unsigned short bfin_uart2_peripherals[] = {
262 P_UART2_TX, P_UART2_RX, 0
265 static struct platform_device bfin_uart2_device = {
266 .name = "bfin-uart",
267 .id = 2,
268 .num_resources = ARRAY_SIZE(bfin_uart2_resources),
269 .resource = bfin_uart2_resources,
270 .dev = {
271 .platform_data = &bfin_uart2_peripherals, /* Passed to driver */
274 #endif
275 #ifdef CONFIG_SERIAL_BFIN_UART3
276 static struct resource bfin_uart3_resources[] = {
278 .start = UART3_DLL,
279 .end = UART3_RBR+2,
280 .flags = IORESOURCE_MEM,
283 .start = IRQ_UART3_RX,
284 .end = IRQ_UART3_RX+1,
285 .flags = IORESOURCE_IRQ,
288 .start = IRQ_UART3_ERROR,
289 .end = IRQ_UART3_ERROR,
290 .flags = IORESOURCE_IRQ,
293 .start = CH_UART3_TX,
294 .end = CH_UART3_TX,
295 .flags = IORESOURCE_DMA,
298 .start = CH_UART3_RX,
299 .end = CH_UART3_RX,
300 .flags = IORESOURCE_DMA,
302 #ifdef CONFIG_BFIN_UART3_CTSRTS
303 { /* CTS pin -- 0 means not supported */
304 .start = GPIO_PB3,
305 .end = GPIO_PB3,
306 .flags = IORESOURCE_IO,
308 { /* RTS pin -- 0 means not supported */
309 .start = GPIO_PB2,
310 .end = GPIO_PB2,
311 .flags = IORESOURCE_IO,
313 #endif
316 unsigned short bfin_uart3_peripherals[] = {
317 P_UART3_TX, P_UART3_RX,
318 #ifdef CONFIG_BFIN_UART3_CTSRTS
319 P_UART3_RTS, P_UART3_CTS,
320 #endif
324 static struct platform_device bfin_uart3_device = {
325 .name = "bfin-uart",
326 .id = 3,
327 .num_resources = ARRAY_SIZE(bfin_uart3_resources),
328 .resource = bfin_uart3_resources,
329 .dev = {
330 .platform_data = &bfin_uart3_peripherals, /* Passed to driver */
333 #endif
334 #endif
336 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
337 #ifdef CONFIG_BFIN_SIR0
338 static struct resource bfin_sir0_resources[] = {
340 .start = 0xFFC00400,
341 .end = 0xFFC004FF,
342 .flags = IORESOURCE_MEM,
345 .start = IRQ_UART0_RX,
346 .end = IRQ_UART0_RX+1,
347 .flags = IORESOURCE_IRQ,
350 .start = CH_UART0_RX,
351 .end = CH_UART0_RX+1,
352 .flags = IORESOURCE_DMA,
355 static struct platform_device bfin_sir0_device = {
356 .name = "bfin_sir",
357 .id = 0,
358 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
359 .resource = bfin_sir0_resources,
361 #endif
362 #ifdef CONFIG_BFIN_SIR1
363 static struct resource bfin_sir1_resources[] = {
365 .start = 0xFFC02000,
366 .end = 0xFFC020FF,
367 .flags = IORESOURCE_MEM,
370 .start = IRQ_UART1_RX,
371 .end = IRQ_UART1_RX+1,
372 .flags = IORESOURCE_IRQ,
375 .start = CH_UART1_RX,
376 .end = CH_UART1_RX+1,
377 .flags = IORESOURCE_DMA,
380 static struct platform_device bfin_sir1_device = {
381 .name = "bfin_sir",
382 .id = 1,
383 .num_resources = ARRAY_SIZE(bfin_sir1_resources),
384 .resource = bfin_sir1_resources,
386 #endif
387 #ifdef CONFIG_BFIN_SIR2
388 static struct resource bfin_sir2_resources[] = {
390 .start = 0xFFC02100,
391 .end = 0xFFC021FF,
392 .flags = IORESOURCE_MEM,
395 .start = IRQ_UART2_RX,
396 .end = IRQ_UART2_RX+1,
397 .flags = IORESOURCE_IRQ,
400 .start = CH_UART2_RX,
401 .end = CH_UART2_RX+1,
402 .flags = IORESOURCE_DMA,
405 static struct platform_device bfin_sir2_device = {
406 .name = "bfin_sir",
407 .id = 2,
408 .num_resources = ARRAY_SIZE(bfin_sir2_resources),
409 .resource = bfin_sir2_resources,
411 #endif
412 #ifdef CONFIG_BFIN_SIR3
413 static struct resource bfin_sir3_resources[] = {
415 .start = 0xFFC03100,
416 .end = 0xFFC031FF,
417 .flags = IORESOURCE_MEM,
420 .start = IRQ_UART3_RX,
421 .end = IRQ_UART3_RX+1,
422 .flags = IORESOURCE_IRQ,
425 .start = CH_UART3_RX,
426 .end = CH_UART3_RX+1,
427 .flags = IORESOURCE_DMA,
430 static struct platform_device bfin_sir3_device = {
431 .name = "bfin_sir",
432 .id = 3,
433 .num_resources = ARRAY_SIZE(bfin_sir3_resources),
434 .resource = bfin_sir3_resources,
436 #endif
437 #endif
439 #if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
440 #include <linux/smsc911x.h>
442 static struct resource smsc911x_resources[] = {
444 .name = "smsc911x-memory",
445 .start = 0x24000000,
446 .end = 0x24000000 + 0xFF,
447 .flags = IORESOURCE_MEM,
450 .start = IRQ_PE6,
451 .end = IRQ_PE6,
452 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
456 static struct smsc911x_platform_config smsc911x_config = {
457 .flags = SMSC911X_USE_16BIT,
458 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
459 .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
460 .phy_interface = PHY_INTERFACE_MODE_MII,
463 static struct platform_device smsc911x_device = {
464 .name = "smsc911x",
465 .id = 0,
466 .num_resources = ARRAY_SIZE(smsc911x_resources),
467 .resource = smsc911x_resources,
468 .dev = {
469 .platform_data = &smsc911x_config,
472 #endif
474 #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
475 static struct resource musb_resources[] = {
476 [0] = {
477 .start = 0xFFC03C00,
478 .end = 0xFFC040FF,
479 .flags = IORESOURCE_MEM,
481 [1] = { /* general IRQ */
482 .start = IRQ_USB_INT0,
483 .end = IRQ_USB_INT0,
484 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
486 [2] = { /* DMA IRQ */
487 .start = IRQ_USB_DMA,
488 .end = IRQ_USB_DMA,
489 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
493 static struct musb_hdrc_config musb_config = {
494 .multipoint = 0,
495 .dyn_fifo = 0,
496 .soft_con = 1,
497 .dma = 1,
498 .num_eps = 8,
499 .dma_channels = 8,
500 .gpio_vrsel = GPIO_PH6,
501 /* Some custom boards need to be active low, just set it to "0"
502 * if it is the case.
504 .gpio_vrsel_active = 1,
507 static struct musb_hdrc_platform_data musb_plat = {
508 #if defined(CONFIG_USB_MUSB_OTG)
509 .mode = MUSB_OTG,
510 #elif defined(CONFIG_USB_MUSB_HDRC_HCD)
511 .mode = MUSB_HOST,
512 #elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
513 .mode = MUSB_PERIPHERAL,
514 #endif
515 .config = &musb_config,
518 static u64 musb_dmamask = ~(u32)0;
520 static struct platform_device musb_device = {
521 .name = "musb_hdrc",
522 .id = 0,
523 .dev = {
524 .dma_mask = &musb_dmamask,
525 .coherent_dma_mask = 0xffffffff,
526 .platform_data = &musb_plat,
528 .num_resources = ARRAY_SIZE(musb_resources),
529 .resource = musb_resources,
531 #endif
533 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
534 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
535 static struct resource bfin_sport0_uart_resources[] = {
537 .start = SPORT0_TCR1,
538 .end = SPORT0_MRCS3+4,
539 .flags = IORESOURCE_MEM,
542 .start = IRQ_SPORT0_RX,
543 .end = IRQ_SPORT0_RX+1,
544 .flags = IORESOURCE_IRQ,
547 .start = IRQ_SPORT0_ERROR,
548 .end = IRQ_SPORT0_ERROR,
549 .flags = IORESOURCE_IRQ,
553 unsigned short bfin_sport0_peripherals[] = {
554 P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
555 P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
558 static struct platform_device bfin_sport0_uart_device = {
559 .name = "bfin-sport-uart",
560 .id = 0,
561 .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
562 .resource = bfin_sport0_uart_resources,
563 .dev = {
564 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
567 #endif
568 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
569 static struct resource bfin_sport1_uart_resources[] = {
571 .start = SPORT1_TCR1,
572 .end = SPORT1_MRCS3+4,
573 .flags = IORESOURCE_MEM,
576 .start = IRQ_SPORT1_RX,
577 .end = IRQ_SPORT1_RX+1,
578 .flags = IORESOURCE_IRQ,
581 .start = IRQ_SPORT1_ERROR,
582 .end = IRQ_SPORT1_ERROR,
583 .flags = IORESOURCE_IRQ,
587 unsigned short bfin_sport1_peripherals[] = {
588 P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
589 P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0
592 static struct platform_device bfin_sport1_uart_device = {
593 .name = "bfin-sport-uart",
594 .id = 1,
595 .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
596 .resource = bfin_sport1_uart_resources,
597 .dev = {
598 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
601 #endif
602 #ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
603 static struct resource bfin_sport2_uart_resources[] = {
605 .start = SPORT2_TCR1,
606 .end = SPORT2_MRCS3+4,
607 .flags = IORESOURCE_MEM,
610 .start = IRQ_SPORT2_RX,
611 .end = IRQ_SPORT2_RX+1,
612 .flags = IORESOURCE_IRQ,
615 .start = IRQ_SPORT2_ERROR,
616 .end = IRQ_SPORT2_ERROR,
617 .flags = IORESOURCE_IRQ,
621 unsigned short bfin_sport2_peripherals[] = {
622 P_SPORT2_TFS, P_SPORT2_DTPRI, P_SPORT2_TSCLK, P_SPORT2_RFS,
623 P_SPORT2_DRPRI, P_SPORT2_RSCLK, P_SPORT2_DRSEC, P_SPORT2_DTSEC, 0
626 static struct platform_device bfin_sport2_uart_device = {
627 .name = "bfin-sport-uart",
628 .id = 2,
629 .num_resources = ARRAY_SIZE(bfin_sport2_uart_resources),
630 .resource = bfin_sport2_uart_resources,
631 .dev = {
632 .platform_data = &bfin_sport2_peripherals, /* Passed to driver */
635 #endif
636 #ifdef CONFIG_SERIAL_BFIN_SPORT3_UART
637 static struct resource bfin_sport3_uart_resources[] = {
639 .start = SPORT3_TCR1,
640 .end = SPORT3_MRCS3+4,
641 .flags = IORESOURCE_MEM,
644 .start = IRQ_SPORT3_RX,
645 .end = IRQ_SPORT3_RX+1,
646 .flags = IORESOURCE_IRQ,
649 .start = IRQ_SPORT3_ERROR,
650 .end = IRQ_SPORT3_ERROR,
651 .flags = IORESOURCE_IRQ,
655 unsigned short bfin_sport3_peripherals[] = {
656 P_SPORT3_TFS, P_SPORT3_DTPRI, P_SPORT3_TSCLK, P_SPORT3_RFS,
657 P_SPORT3_DRPRI, P_SPORT3_RSCLK, P_SPORT3_DRSEC, P_SPORT3_DTSEC, 0
660 static struct platform_device bfin_sport3_uart_device = {
661 .name = "bfin-sport-uart",
662 .id = 3,
663 .num_resources = ARRAY_SIZE(bfin_sport3_uart_resources),
664 .resource = bfin_sport3_uart_resources,
665 .dev = {
666 .platform_data = &bfin_sport3_peripherals, /* Passed to driver */
669 #endif
670 #endif
672 #if defined(CONFIG_PATA_BF54X) || defined(CONFIG_PATA_BF54X_MODULE)
673 static struct resource bfin_atapi_resources[] = {
675 .start = 0xFFC03800,
676 .end = 0xFFC0386F,
677 .flags = IORESOURCE_MEM,
680 .start = IRQ_ATAPI_ERR,
681 .end = IRQ_ATAPI_ERR,
682 .flags = IORESOURCE_IRQ,
686 static struct platform_device bfin_atapi_device = {
687 .name = "pata-bf54x",
688 .id = -1,
689 .num_resources = ARRAY_SIZE(bfin_atapi_resources),
690 .resource = bfin_atapi_resources,
692 #endif
694 #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
695 static struct mtd_partition partition_info[] = {
697 .name = "linux kernel(nand)",
698 .offset = 0,
699 .size = 4 * 1024 * 1024,
702 .name = "file system(nand)",
703 .offset = 4 * 1024 * 1024,
704 .size = (256 - 4) * 1024 * 1024,
708 static struct bf5xx_nand_platform bf5xx_nand_platform = {
709 .data_width = NFC_NWIDTH_8,
710 .partitions = partition_info,
711 .nr_partitions = ARRAY_SIZE(partition_info),
712 .rd_dly = 3,
713 .wr_dly = 3,
716 static struct resource bf5xx_nand_resources[] = {
718 .start = 0xFFC03B00,
719 .end = 0xFFC03B4F,
720 .flags = IORESOURCE_MEM,
723 .start = CH_NFC,
724 .end = CH_NFC,
725 .flags = IORESOURCE_IRQ,
729 static struct platform_device bf5xx_nand_device = {
730 .name = "bf5xx-nand",
731 .id = 0,
732 .num_resources = ARRAY_SIZE(bf5xx_nand_resources),
733 .resource = bf5xx_nand_resources,
734 .dev = {
735 .platform_data = &bf5xx_nand_platform,
738 #endif
740 #if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
741 static struct bfin_sd_host bfin_sdh_data = {
742 .dma_chan = CH_SDH,
743 .irq_int0 = IRQ_SDH_MASK0,
744 .pin_req = {P_SD_D0, P_SD_D1, P_SD_D2, P_SD_D3, P_SD_CLK, P_SD_CMD, 0},
747 static struct platform_device bf54x_sdh_device = {
748 .name = "bfin-sdh",
749 .id = 0,
750 .dev = {
751 .platform_data = &bfin_sdh_data,
754 #endif
756 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
757 static struct mtd_partition para_partitions[] = {
759 .name = "bootloader(nor)",
760 .size = 0x40000,
761 .offset = 0,
762 }, {
763 .name = "linux kernel(nor)",
764 .size = 0x100000,
765 .offset = MTDPART_OFS_APPEND,
766 }, {
767 .name = "file system(nor)",
768 .size = MTDPART_SIZ_FULL,
769 .offset = MTDPART_OFS_APPEND,
773 static struct physmap_flash_data para_flash_data = {
774 .width = 2,
775 .parts = para_partitions,
776 .nr_parts = ARRAY_SIZE(para_partitions),
779 static struct resource para_flash_resource = {
780 .start = 0x20000000,
781 .end = 0x207fffff,
782 .flags = IORESOURCE_MEM,
785 static struct platform_device para_flash_device = {
786 .name = "physmap-flash",
787 .id = 0,
788 .dev = {
789 .platform_data = &para_flash_data,
791 .num_resources = 1,
792 .resource = &para_flash_resource,
794 #endif
796 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
797 /* all SPI peripherals info goes here */
798 #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
799 /* SPI flash chip (m25p16) */
800 static struct mtd_partition bfin_spi_flash_partitions[] = {
802 .name = "bootloader(spi)",
803 .size = 0x00040000,
804 .offset = 0,
805 .mask_flags = MTD_CAP_ROM
806 }, {
807 .name = "linux kernel(spi)",
808 .size = 0x1c0000,
809 .offset = 0x40000
813 static struct flash_platform_data bfin_spi_flash_data = {
814 .name = "m25p80",
815 .parts = bfin_spi_flash_partitions,
816 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
817 .type = "m25p16",
820 static struct bfin5xx_spi_chip spi_flash_chip_info = {
821 .enable_dma = 0, /* use dma transfer with this chip*/
822 .bits_per_word = 8,
824 #endif
826 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
827 static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
828 .enable_dma = 0,
829 .bits_per_word = 16,
832 static const struct ad7877_platform_data bfin_ad7877_ts_info = {
833 .model = 7877,
834 .vref_delay_usecs = 50, /* internal, no capacitor */
835 .x_plate_ohms = 419,
836 .y_plate_ohms = 486,
837 .pressure_max = 1000,
838 .pressure_min = 0,
839 .stopacq_polarity = 1,
840 .first_conversion_delay = 3,
841 .acquisition_time = 1,
842 .averaging = 1,
843 .pen_down_acc_interval = 1,
845 #endif
847 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
848 static struct bfin5xx_spi_chip spidev_chip_info = {
849 .enable_dma = 0,
850 .bits_per_word = 8,
852 #endif
854 static struct spi_board_info bf54x_spi_board_info[] __initdata = {
855 #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
857 /* the modalias must be the same as spi device driver name */
858 .modalias = "m25p80", /* Name of spi_driver for this device */
859 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
860 .bus_num = 0, /* Framework bus number */
861 .chip_select = 1, /* SPI_SSEL1*/
862 .platform_data = &bfin_spi_flash_data,
863 .controller_data = &spi_flash_chip_info,
864 .mode = SPI_MODE_3,
866 #endif
867 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
869 .modalias = "ad7877",
870 .platform_data = &bfin_ad7877_ts_info,
871 .irq = IRQ_PJ11,
872 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
873 .bus_num = 0,
874 .chip_select = 2,
875 .controller_data = &spi_ad7877_chip_info,
877 #endif
878 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
880 .modalias = "spidev",
881 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
882 .bus_num = 0,
883 .chip_select = 1,
884 .controller_data = &spidev_chip_info,
886 #endif
889 /* SPI (0) */
890 static struct resource bfin_spi0_resource[] = {
891 [0] = {
892 .start = SPI0_REGBASE,
893 .end = SPI0_REGBASE + 0xFF,
894 .flags = IORESOURCE_MEM,
896 [1] = {
897 .start = CH_SPI0,
898 .end = CH_SPI0,
899 .flags = IORESOURCE_DMA,
901 [2] = {
902 .start = IRQ_SPI0,
903 .end = IRQ_SPI0,
904 .flags = IORESOURCE_IRQ,
908 /* SPI (1) */
909 static struct resource bfin_spi1_resource[] = {
910 [0] = {
911 .start = SPI1_REGBASE,
912 .end = SPI1_REGBASE + 0xFF,
913 .flags = IORESOURCE_MEM,
915 [1] = {
916 .start = CH_SPI1,
917 .end = CH_SPI1,
918 .flags = IORESOURCE_DMA,
920 [2] = {
921 .start = IRQ_SPI1,
922 .end = IRQ_SPI1,
923 .flags = IORESOURCE_IRQ,
927 /* SPI controller data */
928 static struct bfin5xx_spi_master bf54x_spi_master_info0 = {
929 .num_chipselect = 3,
930 .enable_dma = 1, /* master has the ability to do dma transfer */
931 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
934 static struct platform_device bf54x_spi_master0 = {
935 .name = "bfin-spi",
936 .id = 0, /* Bus number */
937 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
938 .resource = bfin_spi0_resource,
939 .dev = {
940 .platform_data = &bf54x_spi_master_info0, /* Passed to driver */
944 static struct bfin5xx_spi_master bf54x_spi_master_info1 = {
945 .num_chipselect = 3,
946 .enable_dma = 1, /* master has the ability to do dma transfer */
947 .pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0},
950 static struct platform_device bf54x_spi_master1 = {
951 .name = "bfin-spi",
952 .id = 1, /* Bus number */
953 .num_resources = ARRAY_SIZE(bfin_spi1_resource),
954 .resource = bfin_spi1_resource,
955 .dev = {
956 .platform_data = &bf54x_spi_master_info1, /* Passed to driver */
959 #endif /* spi master and devices */
961 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
962 static struct resource bfin_twi0_resource[] = {
963 [0] = {
964 .start = TWI0_REGBASE,
965 .end = TWI0_REGBASE + 0xFF,
966 .flags = IORESOURCE_MEM,
968 [1] = {
969 .start = IRQ_TWI0,
970 .end = IRQ_TWI0,
971 .flags = IORESOURCE_IRQ,
975 static struct platform_device i2c_bfin_twi0_device = {
976 .name = "i2c-bfin-twi",
977 .id = 0,
978 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
979 .resource = bfin_twi0_resource,
982 #if !defined(CONFIG_BF542) /* The BF542 only has 1 TWI */
983 static struct resource bfin_twi1_resource[] = {
984 [0] = {
985 .start = TWI1_REGBASE,
986 .end = TWI1_REGBASE + 0xFF,
987 .flags = IORESOURCE_MEM,
989 [1] = {
990 .start = IRQ_TWI1,
991 .end = IRQ_TWI1,
992 .flags = IORESOURCE_IRQ,
996 static struct platform_device i2c_bfin_twi1_device = {
997 .name = "i2c-bfin-twi",
998 .id = 1,
999 .num_resources = ARRAY_SIZE(bfin_twi1_resource),
1000 .resource = bfin_twi1_resource,
1002 #endif
1003 #endif
1005 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
1006 #include <linux/gpio_keys.h>
1008 static struct gpio_keys_button bfin_gpio_keys_table[] = {
1009 {BTN_0, GPIO_PH7, 1, "gpio-keys: BTN0"},
1012 static struct gpio_keys_platform_data bfin_gpio_keys_data = {
1013 .buttons = bfin_gpio_keys_table,
1014 .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
1017 static struct platform_device bfin_device_gpiokeys = {
1018 .name = "gpio-keys",
1019 .dev = {
1020 .platform_data = &bfin_gpio_keys_data,
1023 #endif
1025 static const unsigned int cclk_vlev_datasheet[] =
1028 * Internal VLEV BF54XSBBC1533
1029 ****temporarily using these values until data sheet is updated
1031 VRPAIR(VLEV_085, 150000000),
1032 VRPAIR(VLEV_090, 250000000),
1033 VRPAIR(VLEV_110, 276000000),
1034 VRPAIR(VLEV_115, 301000000),
1035 VRPAIR(VLEV_120, 525000000),
1036 VRPAIR(VLEV_125, 550000000),
1037 VRPAIR(VLEV_130, 600000000),
1040 static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
1041 .tuple_tab = cclk_vlev_datasheet,
1042 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
1043 .vr_settling_time = 25 /* us */,
1046 static struct platform_device bfin_dpmc = {
1047 .name = "bfin dpmc",
1048 .dev = {
1049 .platform_data = &bfin_dmpc_vreg_data,
1053 static struct platform_device *cm_bf548_devices[] __initdata = {
1055 &bfin_dpmc,
1057 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
1058 &rtc_device,
1059 #endif
1061 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
1062 #ifdef CONFIG_SERIAL_BFIN_UART0
1063 &bfin_uart0_device,
1064 #endif
1065 #ifdef CONFIG_SERIAL_BFIN_UART1
1066 &bfin_uart1_device,
1067 #endif
1068 #ifdef CONFIG_SERIAL_BFIN_UART2
1069 &bfin_uart2_device,
1070 #endif
1071 #ifdef CONFIG_SERIAL_BFIN_UART3
1072 &bfin_uart3_device,
1073 #endif
1074 #endif
1076 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
1077 #ifdef CONFIG_BFIN_SIR0
1078 &bfin_sir0_device,
1079 #endif
1080 #ifdef CONFIG_BFIN_SIR1
1081 &bfin_sir1_device,
1082 #endif
1083 #ifdef CONFIG_BFIN_SIR2
1084 &bfin_sir2_device,
1085 #endif
1086 #ifdef CONFIG_BFIN_SIR3
1087 &bfin_sir3_device,
1088 #endif
1089 #endif
1091 #if defined(CONFIG_FB_BF54X_LQ043) || defined(CONFIG_FB_BF54X_LQ043_MODULE)
1092 &bf54x_lq043_device,
1093 #endif
1095 #if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
1096 &smsc911x_device,
1097 #endif
1099 #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
1100 &musb_device,
1101 #endif
1103 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
1104 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
1105 &bfin_sport0_uart_device,
1106 #endif
1107 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
1108 &bfin_sport1_uart_device,
1109 #endif
1110 #ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
1111 &bfin_sport2_uart_device,
1112 #endif
1113 #ifdef CONFIG_SERIAL_BFIN_SPORT3_UART
1114 &bfin_sport3_uart_device,
1115 #endif
1116 #endif
1118 #if defined(CONFIG_PATA_BF54X) || defined(CONFIG_PATA_BF54X_MODULE)
1119 &bfin_atapi_device,
1120 #endif
1122 #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
1123 &bf5xx_nand_device,
1124 #endif
1126 #if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
1127 &bf54x_sdh_device,
1128 #endif
1130 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
1131 &bf54x_spi_master0,
1132 &bf54x_spi_master1,
1133 #endif
1135 #if defined(CONFIG_KEYBOARD_BFIN) || defined(CONFIG_KEYBOARD_BFIN_MODULE)
1136 &bf54x_kpad_device,
1137 #endif
1139 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
1140 &i2c_bfin_twi0_device,
1141 #if !defined(CONFIG_BF542)
1142 &i2c_bfin_twi1_device,
1143 #endif
1144 #endif
1146 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
1147 &bfin_device_gpiokeys,
1148 #endif
1150 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
1151 &para_flash_device,
1152 #endif
1155 static int __init cm_bf548_init(void)
1157 printk(KERN_INFO "%s(): registering device resources\n", __func__);
1158 platform_add_devices(cm_bf548_devices, ARRAY_SIZE(cm_bf548_devices));
1160 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
1161 spi_register_board_info(bf54x_spi_board_info,
1162 ARRAY_SIZE(bf54x_spi_board_info));
1163 #endif
1165 return 0;
1168 arch_initcall(cm_bf548_init);
1170 static struct platform_device *cm_bf548_early_devices[] __initdata = {
1171 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
1172 #ifdef CONFIG_SERIAL_BFIN_UART0
1173 &bfin_uart0_device,
1174 #endif
1175 #ifdef CONFIG_SERIAL_BFIN_UART1
1176 &bfin_uart1_device,
1177 #endif
1178 #ifdef CONFIG_SERIAL_BFIN_UART2
1179 &bfin_uart2_device,
1180 #endif
1181 #ifdef CONFIG_SERIAL_BFIN_UART3
1182 &bfin_uart3_device,
1183 #endif
1184 #endif
1186 #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
1187 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
1188 &bfin_sport0_uart_device,
1189 #endif
1190 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
1191 &bfin_sport1_uart_device,
1192 #endif
1193 #ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
1194 &bfin_sport2_uart_device,
1195 #endif
1196 #ifdef CONFIG_SERIAL_BFIN_SPORT3_UART
1197 &bfin_sport3_uart_device,
1198 #endif
1199 #endif
1202 void __init native_machine_early_platform_add_devices(void)
1204 printk(KERN_INFO "register early platform devices\n");
1205 early_platform_add_devices(cm_bf548_early_devices,
1206 ARRAY_SIZE(cm_bf548_early_devices));