release/src-rt-6.x.4708/linux/linux-2.6.36/arch/blackfin/mach-bf518/boards/ezbrd.c

   1 /*
   2  * Copyright 2004-2009 Analog Devices Inc.
   3  *                2005 National ICT Australia (NICTA)
   4  *                      Aidan Williams <aidan@nicta.com.au>
   5  *
   6  * Licensed under the GPL-2 or later.
   7  */
   8
   9 #include <linux/device.h>
  10 #include <linux/platform_device.h>
  11 #include <linux/mtd/mtd.h>
  12 #include <linux/mtd/partitions.h>
  13 #include <linux/mtd/physmap.h>
  14 #include <linux/spi/spi.h>
  15 #include <linux/spi/flash.h>
  16
  17 #include <linux/i2c.h>
  18 #include <linux/irq.h>
  19 #include <linux/interrupt.h>
  20 #include <asm/dma.h>
  21 #include <asm/bfin5xx_spi.h>
  22 #include <asm/reboot.h>
  23 #include <asm/portmux.h>
  24 #include <asm/dpmc.h>
  25 #include <asm/bfin_sdh.h>
  26 #include <linux/spi/ad7877.h>
  27 #include <net/dsa.h>
  28
  29 /*
  30  * Name the Board for the /proc/cpuinfo
  31  */
  32 const char bfin_board_name[] = "ADI BF518F-EZBRD";
  33
  34 /*
  35  *  Driver needs to know address, irq and flag pin.
  36  */
  37
  38 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  39 static struct mtd_partition ezbrd_partitions[] = {
  40         {
  41                 .name       = "bootloader(nor)",
  42                 .size       = 0x40000,
  43                 .offset     = 0,
  44         }, {
  45                 .name       = "linux kernel(nor)",
  46                 .size       = 0x1C0000,
  47                 .offset     = MTDPART_OFS_APPEND,
  48         }, {
  49                 .name       = "file system(nor)",
  50                 .size       = MTDPART_SIZ_FULL,
  51                 .offset     = MTDPART_OFS_APPEND,
  52         }
  53 };
  54
  55 static struct physmap_flash_data ezbrd_flash_data = {
  56         .width      = 2,
  57         .parts      = ezbrd_partitions,
  58         .nr_parts   = ARRAY_SIZE(ezbrd_partitions),
  59 };
  60
  61 static struct resource ezbrd_flash_resource = {
  62         .start = 0x20000000,
  63 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  64         .end   = 0x202fffff,
  65 #else
  66         .end   = 0x203fffff,
  67 #endif
  68         .flags = IORESOURCE_MEM,
  69 };
  70
  71 static struct platform_device ezbrd_flash_device = {
  72         .name          = "physmap-flash",
  73         .id            = 0,
  74         .dev = {
  75                 .platform_data = &ezbrd_flash_data,
  76         },
  77         .num_resources = 1,
  78         .resource      = &ezbrd_flash_resource,
  79 };
  80 #endif
  81
  82 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  83 static struct platform_device rtc_device = {
  84         .name = "rtc-bfin",
  85         .id   = -1,
  86 };
  87 #endif
  88
  89 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  90 static struct platform_device bfin_mii_bus = {
  91         .name = "bfin_mii_bus",
  92 };
  93
  94 static struct platform_device bfin_mac_device = {
  95         .name = "bfin_mac",
  96         .dev.platform_data = &bfin_mii_bus,
  97 };
  98
  99 #if defined(CONFIG_NET_DSA_KSZ8893M) || defined(CONFIG_NET_DSA_KSZ8893M_MODULE)
 100 static struct dsa_chip_data ksz8893m_switch_chip_data = {
 101         .mii_bus = &bfin_mii_bus.dev,
 102         .port_names = {
 103                 NULL,
 104                 "eth%d",
 105                 "eth%d",
 106                 "cpu",
 107         },
 108 };
 109 static struct dsa_platform_data ksz8893m_switch_data = {
 110         .nr_chips = 1,
 111         .netdev = &bfin_mac_device.dev,
 112         .chip = &ksz8893m_switch_chip_data,
 113 };
 114
 115 static struct platform_device ksz8893m_switch_device = {
 116         .name           = "dsa",
 117         .id             = 0,
 118         .num_resources  = 0,
 119         .dev.platform_data = &ksz8893m_switch_data,
 120 };
 121 #endif
 122 #endif
 123
 124 #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
 125 static struct mtd_partition bfin_spi_flash_partitions[] = {
 126         {
 127                 .name = "bootloader(spi)",
 128                 .size = 0x00040000,
 129                 .offset = 0,
 130                 .mask_flags = MTD_CAP_ROM
 131         }, {
 132                 .name = "linux kernel(spi)",
 133                 .size = MTDPART_SIZ_FULL,
 134                 .offset = MTDPART_OFS_APPEND,
 135         }
 136 };
 137
 138 static struct flash_platform_data bfin_spi_flash_data = {
 139         .name = "m25p80",
 140         .parts = bfin_spi_flash_partitions,
 141         .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
 142         .type = "m25p16",
 143 };
 144
 145 /* SPI flash chip (m25p64) */
 146 static struct bfin5xx_spi_chip spi_flash_chip_info = {
 147         .enable_dma = 0,         /* use dma transfer with this chip*/
 148         .bits_per_word = 8,
 149 };
 150 #endif
 151
 152 #if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)
 153 /* SPI ADC chip */
 154 static struct bfin5xx_spi_chip spi_adc_chip_info = {
 155         .enable_dma = 1,         /* use dma transfer with this chip*/
 156         .bits_per_word = 16,
 157 };
 158 #endif
 159
 160 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
 161 #if defined(CONFIG_NET_DSA_KSZ8893M) || defined(CONFIG_NET_DSA_KSZ8893M_MODULE)
 162 /* SPI SWITCH CHIP */
 163 static struct bfin5xx_spi_chip spi_switch_info = {
 164         .enable_dma = 0,
 165         .bits_per_word = 8,
 166 };
 167 #endif
 168 #endif
 169
 170 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
 171 static struct bfin5xx_spi_chip mmc_spi_chip_info = {
 172         .enable_dma = 0,
 173         .bits_per_word = 8,
 174 };
 175 #endif
 176
 177 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
 178 static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
 179         .enable_dma = 0,
 180         .bits_per_word = 16,
 181 };
 182
 183 static const struct ad7877_platform_data bfin_ad7877_ts_info = {
 184         .model                  = 7877,
 185         .vref_delay_usecs       = 50,   /* internal, no capacitor */
 186         .x_plate_ohms           = 419,
 187         .y_plate_ohms           = 486,
 188         .pressure_max           = 1000,
 189         .pressure_min           = 0,
 190         .stopacq_polarity       = 1,
 191         .first_conversion_delay = 3,
 192         .acquisition_time       = 1,
 193         .averaging              = 1,
 194         .pen_down_acc_interval  = 1,
 195 };
 196 #endif
 197
 198 #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) && \
 199         defined(CONFIG_SND_SOC_WM8731_SPI)
 200 static struct bfin5xx_spi_chip spi_wm8731_chip_info = {
 201         .enable_dma = 0,
 202         .bits_per_word = 16,
 203 };
 204 #endif
 205
 206 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
 207 static struct bfin5xx_spi_chip spidev_chip_info = {
 208         .enable_dma = 0,
 209         .bits_per_word = 8,
 210 };
 211 #endif
 212
 213 static struct spi_board_info bfin_spi_board_info[] __initdata = {
 214 #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
 215         {
 216                 /* the modalias must be the same as spi device driver name */
 217                 .modalias = "m25p80", /* Name of spi_driver for this device */
 218                 .max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
 219                 .bus_num = 0, /* Framework bus number */
 220                 .chip_select = 2, /* On BF518F-EZBRD it's SPI0_SSEL2 */
 221                 .platform_data = &bfin_spi_flash_data,
 222                 .controller_data = &spi_flash_chip_info,
 223                 .mode = SPI_MODE_3,
 224         },
 225 #endif
 226
 227 #if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)
 228         {
 229                 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
 230                 .max_speed_hz = 6250000,     /* max spi clock (SCK) speed in HZ */
 231                 .bus_num = 0, /* Framework bus number */
 232                 .chip_select = 1, /* Framework chip select. */
 233                 .platform_data = NULL, /* No spi_driver specific config */
 234                 .controller_data = &spi_adc_chip_info,
 235         },
 236 #endif
 237
 238 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
 239 #if defined(CONFIG_NET_DSA_KSZ8893M) || defined(CONFIG_NET_DSA_KSZ8893M_MODULE)
 240         {
 241                 .modalias = "ksz8893m",
 242                 .max_speed_hz = 5000000,
 243                 .bus_num = 0,
 244                 .chip_select = 1,
 245                 .platform_data = NULL,
 246                 .controller_data = &spi_switch_info,
 247                 .mode = SPI_MODE_3,
 248         },
 249 #endif
 250 #endif
 251
 252 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
 253         {
 254                 .modalias = "mmc_spi",
 255                 .max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
 256                 .bus_num = 0,
 257                 .chip_select = 5,
 258                 .controller_data = &mmc_spi_chip_info,
 259                 .mode = SPI_MODE_3,
 260         },
 261 #endif
 262 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
 263         {
 264                 .modalias               = "ad7877",
 265                 .platform_data          = &bfin_ad7877_ts_info,
 266                 .irq                    = IRQ_PF8,
 267                 .max_speed_hz   = 12500000,     /* max spi clock (SCK) speed in HZ */
 268                 .bus_num        = 0,
 269                 .chip_select  = 2,
 270                 .controller_data = &spi_ad7877_chip_info,
 271         },
 272 #endif
 273 #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) && \
 274         defined(CONFIG_SND_SOC_WM8731_SPI)
 275         {
 276                 .modalias       = "wm8731",
 277                 .max_speed_hz   = 3125000,     /* max spi clock (SCK) speed in HZ */
 278                 .bus_num        = 0,
 279                 .chip_select    = 5,
 280                 .controller_data = &spi_wm8731_chip_info,
 281                 .mode = SPI_MODE_0,
 282         },
 283 #endif
 284 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
 285         {
 286                 .modalias = "spidev",
 287                 .max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
 288                 .bus_num = 0,
 289                 .chip_select = 1,
 290                 .controller_data = &spidev_chip_info,
 291         },
 292 #endif
 293 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
 294         {
 295                 .modalias = "bfin-lq035q1-spi",
 296                 .max_speed_hz = 20000000,     /* max spi clock (SCK) speed in HZ */
 297                 .bus_num = 0,
 298                 .chip_select = 1,
 299                 .controller_data = &lq035q1_spi_chip_info,
 300                 .mode = SPI_CPHA | SPI_CPOL,
 301         },
 302 #endif
 303 };
 304
 305 /* SPI controller data */
 306 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
 307 /* SPI (0) */
 308 static struct bfin5xx_spi_master bfin_spi0_info = {
 309         .num_chipselect = 5,
 310         .enable_dma = 1,  /* master has the ability to do dma transfer */
 311         .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
 312 };
 313
 314 static struct resource bfin_spi0_resource[] = {
 315         [0] = {
 316                 .start = SPI0_REGBASE,
 317                 .end   = SPI0_REGBASE + 0xFF,
 318                 .flags = IORESOURCE_MEM,
 319                 },
 320         [1] = {
 321                 .start = CH_SPI0,
 322                 .end   = CH_SPI0,
 323                 .flags = IORESOURCE_DMA,
 324         },
 325         [2] = {
 326                 .start = IRQ_SPI0,
 327                 .end   = IRQ_SPI0,
 328                 .flags = IORESOURCE_IRQ,
 329         },
 330 };
 331
 332 static struct platform_device bfin_spi0_device = {
 333         .name = "bfin-spi",
 334         .id = 0, /* Bus number */
 335         .num_resources = ARRAY_SIZE(bfin_spi0_resource),
 336         .resource = bfin_spi0_resource,
 337         .dev = {
 338                 .platform_data = &bfin_spi0_info, /* Passed to driver */
 339         },
 340 };
 341
 342 /* SPI (1) */
 343 static struct bfin5xx_spi_master bfin_spi1_info = {
 344         .num_chipselect = 5,
 345         .enable_dma = 1,  /* master has the ability to do dma transfer */
 346         .pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0},
 347 };
 348
 349 static struct resource bfin_spi1_resource[] = {
 350         [0] = {
 351                 .start = SPI1_REGBASE,
 352                 .end   = SPI1_REGBASE + 0xFF,
 353                 .flags = IORESOURCE_MEM,
 354                 },
 355         [1] = {
 356                 .start = CH_SPI1,
 357                 .end   = CH_SPI1,
 358                 .flags = IORESOURCE_DMA,
 359         },
 360         [2] = {
 361                 .start = IRQ_SPI1,
 362                 .end   = IRQ_SPI1,
 363                 .flags = IORESOURCE_IRQ,
 364         },
 365 };
 366
 367 static struct platform_device bfin_spi1_device = {
 368         .name = "bfin-spi",
 369         .id = 1, /* Bus number */
 370         .num_resources = ARRAY_SIZE(bfin_spi1_resource),
 371         .resource = bfin_spi1_resource,
 372         .dev = {
 373                 .platform_data = &bfin_spi1_info, /* Passed to driver */
 374         },
 375 };
 376 #endif  /* spi master and devices */
 377
 378 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 379 #ifdef CONFIG_SERIAL_BFIN_UART0
 380 static struct resource bfin_uart0_resources[] = {
 381         {
 382                 .start = UART0_THR,
 383                 .end = UART0_GCTL+2,
 384                 .flags = IORESOURCE_MEM,
 385         },
 386         {
 387                 .start = IRQ_UART0_RX,
 388                 .end = IRQ_UART0_RX+1,
 389                 .flags = IORESOURCE_IRQ,
 390         },
 391         {
 392                 .start = IRQ_UART0_ERROR,
 393                 .end = IRQ_UART0_ERROR,
 394                 .flags = IORESOURCE_IRQ,
 395         },
 396         {
 397                 .start = CH_UART0_TX,
 398                 .end = CH_UART0_TX,
 399                 .flags = IORESOURCE_DMA,
 400         },
 401         {
 402                 .start = CH_UART0_RX,
 403                 .end = CH_UART0_RX,
 404                 .flags = IORESOURCE_DMA,
 405         },
 406 };
 407
 408 unsigned short bfin_uart0_peripherals[] = {
 409         P_UART0_TX, P_UART0_RX, 0
 410 };
 411
 412 static struct platform_device bfin_uart0_device = {
 413         .name = "bfin-uart",
 414         .id = 0,
 415         .num_resources = ARRAY_SIZE(bfin_uart0_resources),
 416         .resource = bfin_uart0_resources,
 417         .dev = {
 418                 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
 419         },
 420 };
 421 #endif
 422 #ifdef CONFIG_SERIAL_BFIN_UART1
 423 static struct resource bfin_uart1_resources[] = {
 424         {
 425                 .start = UART1_THR,
 426                 .end = UART1_GCTL+2,
 427                 .flags = IORESOURCE_MEM,
 428         },
 429         {
 430                 .start = IRQ_UART1_RX,
 431                 .end = IRQ_UART1_RX+1,
 432                 .flags = IORESOURCE_IRQ,
 433         },
 434         {
 435                 .start = IRQ_UART1_ERROR,
 436                 .end = IRQ_UART1_ERROR,
 437                 .flags = IORESOURCE_IRQ,
 438         },
 439         {
 440                 .start = CH_UART1_TX,
 441                 .end = CH_UART1_TX,
 442                 .flags = IORESOURCE_DMA,
 443         },
 444         {
 445                 .start = CH_UART1_RX,
 446                 .end = CH_UART1_RX,
 447                 .flags = IORESOURCE_DMA,
 448         },
 449 };
 450
 451 unsigned short bfin_uart1_peripherals[] = {
 452         P_UART1_TX, P_UART1_RX, 0
 453 };
 454
 455 static struct platform_device bfin_uart1_device = {
 456         .name = "bfin-uart",
 457         .id = 1,
 458         .num_resources = ARRAY_SIZE(bfin_uart1_resources),
 459         .resource = bfin_uart1_resources,
 460         .dev = {
 461                 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
 462         },
 463 };
 464 #endif
 465 #endif
 466
 467 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 468 #ifdef CONFIG_BFIN_SIR0
 469 static struct resource bfin_sir0_resources[] = {
 470         {
 471                 .start = 0xFFC00400,
 472                 .end = 0xFFC004FF,
 473                 .flags = IORESOURCE_MEM,
 474         },
 475         {
 476                 .start = IRQ_UART0_RX,
 477                 .end = IRQ_UART0_RX+1,
 478                 .flags = IORESOURCE_IRQ,
 479         },
 480         {
 481                 .start = CH_UART0_RX,
 482                 .end = CH_UART0_RX+1,
 483                 .flags = IORESOURCE_DMA,
 484         },
 485 };
 486
 487 static struct platform_device bfin_sir0_device = {
 488         .name = "bfin_sir",
 489         .id = 0,
 490         .num_resources = ARRAY_SIZE(bfin_sir0_resources),
 491         .resource = bfin_sir0_resources,
 492 };
 493 #endif
 494 #ifdef CONFIG_BFIN_SIR1
 495 static struct resource bfin_sir1_resources[] = {
 496         {
 497                 .start = 0xFFC02000,
 498                 .end = 0xFFC020FF,
 499                 .flags = IORESOURCE_MEM,
 500         },
 501         {
 502                 .start = IRQ_UART1_RX,
 503                 .end = IRQ_UART1_RX+1,
 504                 .flags = IORESOURCE_IRQ,
 505         },
 506         {
 507                 .start = CH_UART1_RX,
 508                 .end = CH_UART1_RX+1,
 509                 .flags = IORESOURCE_DMA,
 510         },
 511 };
 512
 513 static struct platform_device bfin_sir1_device = {
 514         .name = "bfin_sir",
 515         .id = 1,
 516         .num_resources = ARRAY_SIZE(bfin_sir1_resources),
 517         .resource = bfin_sir1_resources,
 518 };
 519 #endif
 520 #endif
 521
 522 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
 523 static struct resource bfin_twi0_resource[] = {
 524         [0] = {
 525                 .start = TWI0_REGBASE,
 526                 .end   = TWI0_REGBASE,
 527                 .flags = IORESOURCE_MEM,
 528         },
 529         [1] = {
 530                 .start = IRQ_TWI,
 531                 .end   = IRQ_TWI,
 532                 .flags = IORESOURCE_IRQ,
 533         },
 534 };
 535
 536 static struct platform_device i2c_bfin_twi_device = {
 537         .name = "i2c-bfin-twi",
 538         .id = 0,
 539         .num_resources = ARRAY_SIZE(bfin_twi0_resource),
 540         .resource = bfin_twi0_resource,
 541 };
 542 #endif
 543
 544 static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
 545 #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
 546         {
 547                 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
 548         },
 549 #endif
 550 #if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
 551         {
 552                 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
 553                 .irq = IRQ_PF8,
 554         },
 555 #endif
 556 };
 557
 558 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
 559 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
 560 static struct resource bfin_sport0_uart_resources[] = {
 561         {
 562                 .start = SPORT0_TCR1,
 563                 .end = SPORT0_MRCS3+4,
 564                 .flags = IORESOURCE_MEM,
 565         },
 566         {
 567                 .start = IRQ_SPORT0_RX,
 568                 .end = IRQ_SPORT0_RX+1,
 569                 .flags = IORESOURCE_IRQ,
 570         },
 571         {
 572                 .start = IRQ_SPORT0_ERROR,
 573                 .end = IRQ_SPORT0_ERROR,
 574                 .flags = IORESOURCE_IRQ,
 575         },
 576 };
 577
 578 unsigned short bfin_sport0_peripherals[] = {
 579         P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
 580         P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
 581 };
 582
 583 static struct platform_device bfin_sport0_uart_device = {
 584         .name = "bfin-sport-uart",
 585         .id = 0,
 586         .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
 587         .resource = bfin_sport0_uart_resources,
 588         .dev = {
 589                 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
 590         },
 591 };
 592 #endif
 593 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
 594 static struct resource bfin_sport1_uart_resources[] = {
 595         {
 596                 .start = SPORT1_TCR1,
 597                 .end = SPORT1_MRCS3+4,
 598                 .flags = IORESOURCE_MEM,
 599         },
 600         {
 601                 .start = IRQ_SPORT1_RX,
 602                 .end = IRQ_SPORT1_RX+1,
 603                 .flags = IORESOURCE_IRQ,
 604         },
 605         {
 606                 .start = IRQ_SPORT1_ERROR,
 607                 .end = IRQ_SPORT1_ERROR,
 608                 .flags = IORESOURCE_IRQ,
 609         },
 610 };
 611
 612 unsigned short bfin_sport1_peripherals[] = {
 613         P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
 614         P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0
 615 };
 616
 617 static struct platform_device bfin_sport1_uart_device = {
 618         .name = "bfin-sport-uart",
 619         .id = 1,
 620         .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
 621         .resource = bfin_sport1_uart_resources,
 622         .dev = {
 623                 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
 624         },
 625 };
 626 #endif
 627 #endif
 628
 629 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
 630 #include <linux/input.h>
 631 #include <linux/gpio_keys.h>
 632
 633 static struct gpio_keys_button bfin_gpio_keys_table[] = {
 634         {BTN_0, GPIO_PG0, 1, "gpio-keys: BTN0"},
 635         {BTN_1, GPIO_PG13, 1, "gpio-keys: BTN1"},
 636 };
 637
 638 static struct gpio_keys_platform_data bfin_gpio_keys_data = {
 639         .buttons        = bfin_gpio_keys_table,
 640         .nbuttons       = ARRAY_SIZE(bfin_gpio_keys_table),
 641 };
 642
 643 static struct platform_device bfin_device_gpiokeys = {
 644         .name      = "gpio-keys",
 645         .dev = {
 646                 .platform_data = &bfin_gpio_keys_data,
 647         },
 648 };
 649 #endif
 650
 651 #if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
 652
 653 static struct bfin_sd_host bfin_sdh_data = {
 654         .dma_chan = CH_RSI,
 655         .irq_int0 = IRQ_RSI_INT0,
 656         .pin_req = {P_RSI_DATA0, P_RSI_DATA1, P_RSI_DATA2, P_RSI_DATA3, P_RSI_CMD, P_RSI_CLK, 0},
 657 };
 658
 659 static struct platform_device bf51x_sdh_device = {
 660         .name = "bfin-sdh",
 661         .id = 0,
 662         .dev = {
 663                 .platform_data = &bfin_sdh_data,
 664         },
 665 };
 666 #endif
 667
 668 static const unsigned int cclk_vlev_datasheet[] =
 669 {
 670         VRPAIR(VLEV_100, 400000000),
 671         VRPAIR(VLEV_105, 426000000),
 672         VRPAIR(VLEV_110, 500000000),
 673         VRPAIR(VLEV_115, 533000000),
 674         VRPAIR(VLEV_120, 600000000),
 675 };
 676
 677 static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
 678         .tuple_tab = cclk_vlev_datasheet,
 679         .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
 680         .vr_settling_time = 25 /* us */,
 681 };
 682
 683 static struct platform_device bfin_dpmc = {
 684         .name = "bfin dpmc",
 685         .dev = {
 686                 .platform_data = &bfin_dmpc_vreg_data,
 687         },
 688 };
 689
 690 static struct platform_device *stamp_devices[] __initdata = {
 691
 692         &bfin_dpmc,
 693
 694 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
 695         &rtc_device,
 696 #endif
 697
 698 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
 699         &bfin_mii_bus,
 700         &bfin_mac_device,
 701 #if defined(CONFIG_NET_DSA_KSZ8893M) || defined(CONFIG_NET_DSA_KSZ8893M_MODULE)
 702         &ksz8893m_switch_device,
 703 #endif
 704 #endif
 705
 706 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
 707         &bfin_spi0_device,
 708         &bfin_spi1_device,
 709 #endif
 710
 711 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 712 #ifdef CONFIG_SERIAL_BFIN_UART0
 713         &bfin_uart0_device,
 714 #endif
 715 #ifdef CONFIG_SERIAL_BFIN_UART1
 716         &bfin_uart1_device,
 717 #endif
 718 #endif
 719
 720 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 721 #ifdef CONFIG_BFIN_SIR0
 722         &bfin_sir0_device,
 723 #endif
 724 #ifdef CONFIG_BFIN_SIR1
 725         &bfin_sir1_device,
 726 #endif
 727 #endif
 728
 729 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
 730         &i2c_bfin_twi_device,
 731 #endif
 732
 733 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
 734 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
 735         &bfin_sport0_uart_device,
 736 #endif
 737 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
 738         &bfin_sport1_uart_device,
 739 #endif
 740 #endif
 741
 742 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
 743         &bfin_device_gpiokeys,
 744 #endif
 745
 746 #if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
 747         &bf51x_sdh_device,
 748 #endif
 749
 750 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
 751         &ezbrd_flash_device,
 752 #endif
 753 };
 754
 755 static int __init ezbrd_init(void)
 756 {
 757         printk(KERN_INFO "%s(): registering device resources\n", __func__);
 758         i2c_register_board_info(0, bfin_i2c_board_info,
 759                                 ARRAY_SIZE(bfin_i2c_board_info));
 760         platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
 761         spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
 762         /* setup BF518-EZBRD GPIO pin PG11 to AMS2, PG15 to AMS3. */
 763         peripheral_request(P_AMS2, "ParaFlash");
 764 #if !defined(CONFIG_SPI_BFIN) && !defined(CONFIG_SPI_BFIN_MODULE)
 765         peripheral_request(P_AMS3, "ParaFlash");
 766 #endif
 767         return 0;
 768 }
 769
 770 arch_initcall(ezbrd_init);
 771
 772 static struct platform_device *ezbrd_early_devices[] __initdata = {
 773 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
 774 #ifdef CONFIG_SERIAL_BFIN_UART0
 775         &bfin_uart0_device,
 776 #endif
 777 #ifdef CONFIG_SERIAL_BFIN_UART1
 778         &bfin_uart1_device,
 779 #endif
 780 #endif
 781
 782 #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
 783 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
 784         &bfin_sport0_uart_device,
 785 #endif
 786 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
 787         &bfin_sport1_uart_device,
 788 #endif
 789 #endif
 790 };
 791
 792 void __init native_machine_early_platform_add_devices(void)
 793 {
 794         printk(KERN_INFO "register early platform devices\n");
 795         early_platform_add_devices(ezbrd_early_devices,
 796                 ARRAY_SIZE(ezbrd_early_devices));
 797 }
 798
 799 void native_machine_restart(char *cmd)
 800 {
 801         if ((bfin_read_SYSCR() & 0x7) == 0x3)
 802                 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
 803 }
 804
 805 void bfin_get_ether_addr(char *addr)
 806 {
 807         /* the MAC is stored in OTP memory page 0xDF */
 808         u32 ret;
 809         u64 otp_mac;
 810         u32 (*otp_read)(u32 page, u32 flags, u64 *page_content) = (void *)0xEF00001A;
 811
 812         ret = otp_read(0xDF, 0x00, &otp_mac);
 813         if (!(ret & 0x1)) {
 814                 char *otp_mac_p = (char *)&otp_mac;
 815                 for (ret = 0; ret < 6; ++ret)
 816                         addr[ret] = otp_mac_p[5 - ret];
 817         }
 818 }
 819 EXPORT_SYMBOL(bfin_get_ether_addr);