release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-s3c64xx/include/mach/gpio-bank-g.h

   1 /* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-g.h
   2  *
   3  * Copyright 2008 Openmoko, Inc.
   4  * Copyright 2008 Simtec Electronics
   5  *      Ben Dooks <ben@simtec.co.uk>
   6  *      http://armlinux.simtec.co.uk/
   7  *
   8  * GPIO Bank G register and configuration definitions
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License version 2 as
  12  * published by the Free Software Foundation.
  13 */
  14
  15 #define S3C64XX_GPGCON                  (S3C64XX_GPG_BASE + 0x00)
  16 #define S3C64XX_GPGDAT                  (S3C64XX_GPG_BASE + 0x04)
  17 #define S3C64XX_GPGPUD                  (S3C64XX_GPG_BASE + 0x08)
  18 #define S3C64XX_GPGCONSLP               (S3C64XX_GPG_BASE + 0x0c)
  19 #define S3C64XX_GPGPUDSLP               (S3C64XX_GPG_BASE + 0x10)
  20
  21 #define S3C64XX_GPG_CONMASK(__gpio)     (0xf << ((__gpio) * 4))
  22 #define S3C64XX_GPG_INPUT(__gpio)       (0x0 << ((__gpio) * 4))
  23 #define S3C64XX_GPG_OUTPUT(__gpio)      (0x1 << ((__gpio) * 4))
  24
  25 #define S3C64XX_GPG0_MMC0_CLK           (0x02 << 0)
  26 #define S3C64XX_GPG0_EINT_G5_0          (0x07 << 0)
  27
  28 #define S3C64XX_GPG1_MMC0_CMD           (0x02 << 4)
  29 #define S3C64XX_GPG1_EINT_G5_1          (0x07 << 4)
  30
  31 #define S3C64XX_GPG2_MMC0_DATA0         (0x02 << 8)
  32 #define S3C64XX_GPG2_EINT_G5_2          (0x07 << 8)
  33
  34 #define S3C64XX_GPG3_MMC0_DATA1         (0x02 << 12)
  35 #define S3C64XX_GPG3_EINT_G5_3          (0x07 << 12)
  36
  37 #define S3C64XX_GPG4_MMC0_DATA2         (0x02 << 16)
  38 #define S3C64XX_GPG4_EINT_G5_4          (0x07 << 16)
  39
  40 #define S3C64XX_GPG5_MMC0_DATA3         (0x02 << 20)
  41 #define S3C64XX_GPG5_EINT_G5_5          (0x07 << 20)