release/src-rt-6.x.4708/cfe/cfe/arch/mips/cpu/rm5200/include/cpu_config.h

   1 /*  *********************************************************************
   2     *  Broadcom Common Firmware Environment (CFE)
   3     *
   4     *  CPU Configuration file                   File: cpu_config.h
   5     *
   6     *  This file contains the names of the routines to be used
   7     *  in the dispatch table in init_mips.S
   8     *
   9     *  It lives here in the CPU directory so we can direct
  10     *  the init calls to routines named in this directory.
  11     *
  12     *  Author:  Mitch Lichtenberg (mpl@broadcom.com)
  13     *
  14     *********************************************************************
  15     *
  16     *  Copyright 2000,2001,2002,2003
  17     *  Broadcom Corporation. All rights reserved.
  18     *
  19     *  This software is furnished under license and may be used and
  20     *  copied only in accordance with the following terms and
  21     *  conditions.  Subject to these conditions, you may download,
  22     *  copy, install, use, modify and distribute modified or unmodified
  23     *  copies of this software in source and/or binary form.  No title
  24     *  or ownership is transferred hereby.
  25     *
  26     *  1) Any source code used, modified or distributed must reproduce
  27     *     and retain this copyright notice and list of conditions
  28     *     as they appear in the source file.
  29     *
  30     *  2) No right is granted to use any trade name, trademark, or
  31     *     logo of Broadcom Corporation.  The "Broadcom Corporation"
  32     *     name may not be used to endorse or promote products derived
  33     *     from this software without the prior written permission of
  34     *     Broadcom Corporation.
  35     *
  36     *  3) THIS SOFTWARE IS PROVIDED "AS-IS" AND ANY EXPRESS OR
  37     *     IMPLIED WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED
  38     *     WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
  39     *     PURPOSE, OR NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT
  40     *     SHALL BROADCOM BE LIABLE FOR ANY DAMAGES WHATSOEVER, AND IN
  41     *     PARTICULAR, BROADCOM SHALL NOT BE LIABLE FOR DIRECT, INDIRECT,
  42     *     INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  43     *     (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
  44     *     GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
  45     *     BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
  46     *     OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
  47     *     TORT (INCLUDING NEGLIGENCE OR OTHERWISE), EVEN IF ADVISED OF
  48     *     THE POSSIBILITY OF SUCH DAMAGE.
  49     ********************************************************************* */
  50
  51 /*
  52  *
  53  * The RM5200 doesn't have a built-in memory controller, so
  54  * the draminit routine is just "board_dram_init" to call a
  55  * board-specific routine.
  56  *
  57  * There's no secondary CPU cores, so all the ALTCPU entrypoints
  58  * are null routines.
  59  */
  60
  61 #define CPUCFG_CPUINIT          rm5200_cpuinit
  62 #define CPUCFG_ALTCPU_START1    rm5200_null_init
  63 #define CPUCFG_ALTCPU_START2    rm5200_null_init
  64 #define CPUCFG_ALTCPU_RESET     rm5200_null_init
  65 #define CPUCFG_CPURESTART       rm5200_null_init
  66 #define CPUCFG_DRAMINIT         board_dram_init
  67 #define CPUCFG_CACHEOPS         rm5200_cacheops
  68 #define CPUCFG_ARENAINIT        rm5200_arena_init
  69 #define CPUCFG_PAGETBLINIT      rm5200_pagetable_init
  70 #define CPUCFG_TLBHANDLER       rm5200_tlbhandler
  71 #define CPUCFG_DIAG_TEST1       rm5200_null_init
  72 #define CPUCFG_DIAG_TEST2       rm5200_null_init
  73
  74 /*
  75  * Hazard macro
  76  */
  77
  78 #define HAZARD nop ; nop ; nop ; nop ; nop ; nop ; nop
  79 #define ERET eret