release/src-rt-6.x.4708/cfe/cfe/arch/mips/board/bcm97115/src/dev_bcm4413_mii.c

   1 #include "lib_types.h"
   2 #include "lib_printf.h"
   3
   4 #include "cfe_timer.h"
   5
   6 #include "dev_bcm4413.h"
   7 #include "dev_bcm4413_mii.h"
   8
   9
  10         #define MIITRACE( x )
  11
  12
  13 #define CTL_RESET   (1 << 15)   /* reset */
  14 #define CTL_SPEED   (1 << 13)   /* speed selection 0=10, 1=100 */
  15 #define CTL_ANENAB  (1 << 12)   /* autonegotiation enable */
  16 #define CTL_RESTART (1 << 9)    /* restart autonegotiation */
  17 #define CTL_DUPLEX  (1 << 8)    /* duplex mode 0=half, 1=full */
  18
  19 #define ADV_10FULL      (1 << 6)        /* autonegotiate advertise 10full capability */
  20 #define ADV_10HALF      (1 << 5)        /* autonegotiate advertise 10half capability */
  21 #define ADV_100FULL     (1 << 8)        /* autonegotiate advertise 100full capability */
  22 #define ADV_100HALF     (1 << 7)        /* autonegotiate advertise 100half capability */
  23
  24
  25 static uint16_t mii_read( bcmenetregs_t * regs , unsigned int reg )
  26 {
  27         uint32_t mdiodata;
  28
  29         MIITRACE( "mii_read entered\n" );
  30
  31 #ifdef DEBUG
  32         if( reg >= 32 ) {
  33                 xprintf( "ERROR : invalid register in mii_read (%d)!\n", reg );
  34                 return -1;
  35         }
  36 #endif
  37
  38         /* clear mii_int */
  39         W_REG(NULL,  &regs->emacintstatus, EI_MII );
  40
  41         mdiodata = MD_SB_START | MD_OP_READ | (1 << MD_PMD_SHIFT)
  42                  | (reg << MD_RA_SHIFT) | MD_TA_VALID;
  43
  44         /* issue the read */
  45         W_REG(NULL,  &regs->mdiodata, mdiodata );
  46
  47         MIITRACE( "Waiting for hardware...\n" );
  48
  49         /* wait for it to complete */
  50         while( !(R_REG(NULL, &regs->emacintstatus) & EI_MII) ) {
  51                 cfe_usleep( 10 );
  52         }
  53
  54         mdiodata = R_REG(NULL, &regs->mdiodata);
  55
  56         MIITRACE( "mii_read exited\n" );
  57
  58         return mdiodata & MD_DATA_MASK;
  59 }
  60
  61
  62 static void mii_write( bcmenetregs_t * regs, unsigned int reg, uint16_t v )
  63 {
  64         uint32_t mdiodata;
  65
  66         MIITRACE( "mii_write entered\n" );
  67
  68 #ifdef DEBUG
  69         if( reg >= 32 ) {
  70                 xprintf( "ERROR : invalid register in mii_write (%d)!\n", reg );
  71                 return;
  72         }
  73 #endif
  74
  75         /* clear mii_int */
  76         W_REG(NULL,  &regs->emacintstatus, EI_MII );
  77
  78         mdiodata = MD_SB_START | MD_OP_WRITE | (1 << MD_PMD_SHIFT)
  79                  | (reg << MD_RA_SHIFT) | MD_TA_VALID | v;
  80
  81         /* issue the write */
  82         W_REG(NULL,  &regs->mdiodata, mdiodata );
  83
  84         MIITRACE( "Waiting for hardware...\n" );
  85
  86         /* wait for it to complete */
  87         while( !(R_REG(NULL, &regs->emacintstatus) & EI_MII) ) {
  88                 cfe_usleep( 10 );
  89         }
  90
  91         MIITRACE( "mii_write exited\n" );
  92 }
  93
  94
  95 static void mii_or( bcmenetregs_t * regs, unsigned int reg, uint16_t v )
  96 {
  97         uint16_t tmp;
  98
  99         tmp = mii_read( regs, reg );
 100         tmp |= v;
 101         mii_write( regs, reg, tmp );
 102 }
 103
 104
 105 static void mii_and( bcmenetregs_t * regs, unsigned int reg, uint16_t v )
 106 {
 107         uint16_t tmp;
 108
 109         tmp = mii_read( regs, reg );
 110         tmp &= v;
 111         mii_write( regs, reg, tmp );
 112 }
 113
 114
 115 void mii_init( bcmenetregs_t * regs )
 116 {
 117         mii_write( regs, 0, CTL_RESET );
 118         cfe_usleep( 10 );
 119         if (mii_read(regs, 0) & CTL_RESET) {
 120                 xprintf( "mii_reset: reset not complete\n" );
 121         }
 122
 123         /* enable activity led */
 124         mii_and( regs, 26, 0x7fff );
 125
 126         /* enable traffic meter led mode */
 127         mii_or( regs, 27, (1 << 6) );
 128 }
 129
 130
 131 void mii_setspeed( bcmenetregs_t * regs )
 132 {
 133         uint16_t reg;
 134
 135         /*
 136          * Because of our bcm4413 interface limitations, force 10Mbps.
 137          */
 138
 139         /* reset our advertised capabilitity bits */
 140         reg = mii_read(regs, 4);
 141         reg &= ~(ADV_100FULL | ADV_100HALF | ADV_10FULL | ADV_10HALF);
 142         reg |= (ADV_10FULL | ADV_10HALF);
 143         mii_write(regs, 4, reg);
 144
 145         /* restart autonegotiation */
 146         mii_or(regs, 0, CTL_RESTART);
 147 }