2 # For a description of the syntax of this configuration file,
3 # see Documentation/kbuild/kconfig-language.txt.
6 mainmenu "Linux Kernel Configuration"
15 select SYS_SUPPORTS_APM_EMULATION
16 select GENERIC_ATOMIC64 if (!CPU_32v6K)
17 select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
19 select HAVE_KPROBES if (!XIP_KERNEL)
20 select HAVE_KRETPROBES if (HAVE_KPROBES)
21 select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
22 select HAVE_GENERIC_DMA_COHERENT
23 select HAVE_KERNEL_GZIP
24 select HAVE_KERNEL_LZO
25 select HAVE_KERNEL_LZMA
26 select HAVE_PERF_EVENTS
27 select PERF_USE_VMALLOC
28 select HAVE_REGS_AND_STACK_ACCESS_API
30 The ARM series is a line of low-power-consumption RISC chip designs
31 licensed by ARM Ltd and targeted at embedded applications and
32 handhelds such as the Compaq IPAQ. ARM-based PCs are no longer
33 manufactured, but legacy ARM-based PC hardware remains popular in
34 Europe. There is an ARM Linux project with a web page at
35 <http://www.arm.linux.org.uk/>.
40 config SYS_SUPPORTS_APM_EMULATION
46 config ARCH_USES_GETTIMEOFFSET
50 config GENERIC_CLOCKEVENTS
53 config GENERIC_CLOCKEVENTS_BROADCAST
55 depends on GENERIC_CLOCKEVENTS
60 select GENERIC_ALLOCATOR
71 The Extended Industry Standard Architecture (EISA) bus was
72 developed as an open alternative to the IBM MicroChannel bus.
74 The EISA bus provided some of the features of the IBM MicroChannel
75 bus while maintaining backward compatibility with cards made for
76 the older ISA bus. The EISA bus saw limited use between 1988 and
77 1995 when it was made obsolete by the PCI bus.
79 Say Y here if you are building a kernel for an EISA-based machine.
89 MicroChannel Architecture is found in some IBM PS/2 machines and
90 laptops. It is a bus system similar to PCI or ISA. See
91 <file:Documentation/mca.txt> (and especially the web page given
92 there) before attempting to build an MCA bus kernel.
94 config GENERIC_HARDIRQS
98 config STACKTRACE_SUPPORT
103 bool "Enable BUZZZ kernel tools framework"
106 Enable kernel tools framework: event/performance/function call tracing
109 bool "Enable kernel tool function call tracing"
114 Enable kernel tool function call tracing
117 bool "Enable BUZZZ kernel event tracing"
121 Enable kernel event tracing
123 config HAVE_LATENCYTOP_SUPPORT
128 config LOCKDEP_SUPPORT
132 config TRACE_IRQFLAGS_SUPPORT
136 config HARDIRQS_SW_RESEND
140 config GENERIC_IRQ_PROBE
144 config GENERIC_LOCKBREAK
147 depends on SMP && PREEMPT
149 config RWSEM_GENERIC_SPINLOCK
153 config RWSEM_XCHGADD_ALGORITHM
156 config ARCH_HAS_ILOG2_U32
159 config ARCH_HAS_ILOG2_U64
162 config ARCH_HAS_CPUFREQ
165 Internal node to signify that the ARCH has CPUFREQ support
166 and that the relevant menu configurations are displayed for
169 config GENERIC_HWEIGHT
173 config GENERIC_CALIBRATE_DELAY
177 config ARCH_MAY_HAVE_PC_FDC
183 config NEED_DMA_MAP_STATE
186 config GENERIC_ISA_DMA
195 config GENERIC_HARDIRQS_NO__DO_IRQ
198 config ARM_L1_CACHE_SHIFT_6
201 Setting ARM L1 cache line size to 64 Bytes.
205 default 0xffff0000 if MMU || CPU_HIGH_VECTOR
206 default DRAM_BASE if REMAP_VECTORS_TO_RAM
209 The base address of exception vectors.
211 source "init/Kconfig"
213 source "kernel/Kconfig.freezer"
218 bool "MMU-based Paged Memory Management Support"
221 Select if you want MMU-based virtualised addressing space
222 support by paged memory management. If unsure, say 'Y'.
225 # The "ARM system type" choice list is ordered alphabetically by option
226 # text. Please add new entries in the option alphabetic order.
229 prompt "ARM system type"
230 default ARCH_VERSATILE
233 bool "Agilent AAEC-2000 based"
237 select ARCH_USES_GETTIMEOFFSET
239 This enables support for systems based on the Agilent AAEC-2000
241 config ARCH_INTEGRATOR
242 bool "ARM Ltd. Integrator family"
244 select ARCH_HAS_CPUFREQ
247 select GENERIC_CLOCKEVENTS
248 select PLAT_VERSATILE
250 Support for ARM's Integrator platform.
253 bool "ARM Ltd. RealView family"
257 select GENERIC_CLOCKEVENTS
258 select ARCH_WANT_OPTIONAL_GPIOLIB
259 select PLAT_VERSATILE
260 select ARM_TIMER_SP804
261 select GPIO_PL061 if GPIOLIB
263 This enables support for ARM Ltd RealView boards.
265 config ARCH_VERSATILE
266 bool "ARM Ltd. Versatile family"
271 select GENERIC_CLOCKEVENTS
272 select ARCH_WANT_OPTIONAL_GPIOLIB
273 select PLAT_VERSATILE
274 select ARM_TIMER_SP804
276 This enables support for ARM Ltd Versatile board.
279 bool "ARM Ltd. Versatile Express family"
280 select ARCH_WANT_OPTIONAL_GPIOLIB
282 select ARM_TIMER_SP804
284 select GENERIC_CLOCKEVENTS
287 select PLAT_VERSATILE
289 This enables support for the ARM Ltd Versatile Express boards.
293 select ARCH_REQUIRE_GPIOLIB
296 This enables support for systems based on the Atmel AT91RM9200,
297 AT91SAM9 and AT91CAP9 processors.
300 bool "Broadcom BCMRING"
305 select GENERIC_CLOCKEVENTS
306 select ARCH_WANT_OPTIONAL_GPIOLIB
308 Support for Broadcom's BCMRing platform.
311 bool "Cirrus Logic CLPS711x/EP721x-based"
313 select ARCH_USES_GETTIMEOFFSET
315 Support for Cirrus Logic 711x/721x based boards.
318 bool "Cavium Networks CNS3XXX family"
320 select GENERIC_CLOCKEVENTS
322 select PCI_DOMAINS if PCI
324 Support for Cavium Networks CNS3XXX platform.
327 bool "Cortina Systems Gemini"
329 select ARCH_REQUIRE_GPIOLIB
330 select ARCH_USES_GETTIMEOFFSET
332 Support for the Cortina Systems Gemini family SoCs
339 select ARCH_USES_GETTIMEOFFSET
341 This is an evaluation board for the StrongARM processor available
342 from Digital. It has limited hardware on-board, including an
343 Ethernet interface, two PCMCIA sockets, two serial ports and a
352 select ARCH_REQUIRE_GPIOLIB
353 select ARCH_HAS_HOLES_MEMORYMODEL
354 select ARCH_USES_GETTIMEOFFSET
356 This enables support for the Cirrus EP93xx series of CPUs.
358 config ARCH_FOOTBRIDGE
362 select ARCH_USES_GETTIMEOFFSET
364 Support for systems based on the DC21285 companion chip
365 ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
368 bool "Freescale MXC/iMX-based"
369 select GENERIC_CLOCKEVENTS
370 select ARCH_REQUIRE_GPIOLIB
373 Support for Freescale MXC/iMX-based family of processors
376 bool "Freescale STMP3xxx"
379 select ARCH_REQUIRE_GPIOLIB
380 select GENERIC_CLOCKEVENTS
381 select USB_ARCH_HAS_EHCI
383 Support for systems based on the Freescale 3xxx CPUs.
386 bool "Hilscher NetX based"
389 select GENERIC_CLOCKEVENTS
391 This enables support for systems based on the Hilscher NetX Soc
394 bool "Hynix HMS720x-based"
397 select ARCH_USES_GETTIMEOFFSET
399 This enables support for systems based on the Hynix HMS720x
407 select ARCH_SUPPORTS_MSI
410 Support for Intel's IOP13XX (XScale) family of processors.
418 select ARCH_REQUIRE_GPIOLIB
420 Support for Intel's 80219 and IOP32X (XScale) family of
429 select ARCH_REQUIRE_GPIOLIB
431 Support for Intel's IOP33X (XScale) family of processors.
438 select ARCH_USES_GETTIMEOFFSET
440 Support for Intel's IXP23xx (XScale) family of processors.
443 bool "IXP2400/2800-based"
447 select ARCH_USES_GETTIMEOFFSET
449 Support for Intel's IXP2400/2800 (XScale) family of processors.
456 select GENERIC_CLOCKEVENTS
457 select DMABOUNCE if PCI
459 Support for Intel's IXP4XX (XScale) family of processors.
464 select ARCH_REQUIRE_GPIOLIB
465 select GENERIC_CLOCKEVENTS
468 Support for the Marvell Dove SoC 88AP510
471 bool "Marvell Kirkwood"
474 select ARCH_REQUIRE_GPIOLIB
475 select GENERIC_CLOCKEVENTS
478 Support for the following Marvell Kirkwood series SoCs:
479 88F6180, 88F6192 and 88F6281.
482 bool "Marvell Loki (88RC8480)"
484 select GENERIC_CLOCKEVENTS
487 Support for the Marvell Loki (88RC8480) SoC.
492 select ARCH_REQUIRE_GPIOLIB
495 select USB_ARCH_HAS_OHCI
498 select GENERIC_CLOCKEVENTS
500 Support for the NXP LPC32XX family of processors
503 bool "Marvell MV78xx0"
506 select ARCH_REQUIRE_GPIOLIB
507 select GENERIC_CLOCKEVENTS
510 Support for the following Marvell MV78xx0 series SoCs:
518 select ARCH_REQUIRE_GPIOLIB
519 select GENERIC_CLOCKEVENTS
522 Support for the following Marvell Orion 5x series SoCs:
523 Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
524 Orion-2 (5281), Orion-1-90 (6183).
527 bool "Marvell PXA168/910/MMP2"
529 select ARCH_REQUIRE_GPIOLIB
531 select GENERIC_CLOCKEVENTS
535 Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
538 bool "Micrel/Kendin KS8695"
540 select ARCH_REQUIRE_GPIOLIB
541 select ARCH_USES_GETTIMEOFFSET
543 Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
544 System-on-Chip devices.
547 bool "NetSilicon NS9xxx"
550 select GENERIC_CLOCKEVENTS
553 Say Y here if you intend to run this kernel on a NetSilicon NS9xxx
556 <http://www.digi.com/products/microprocessors/index.jsp>
559 bool "Nuvoton W90X900 CPU"
561 select ARCH_REQUIRE_GPIOLIB
563 select GENERIC_CLOCKEVENTS
565 Support for Nuvoton (Winbond logic dept.) ARM9 processor,
566 At present, the w90x900 has been renamed nuc900, regarding
567 the ARM series product line, you can login the following
568 link address to know more.
570 <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
571 ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
574 bool "Nuvoton NUC93X CPU"
578 Support for Nuvoton (Winbond logic dept.) NUC93X MCU,The NUC93X is a
579 low-power and high performance MPEG-4/JPEG multimedia controller chip.
584 select GENERIC_CLOCKEVENTS
588 select ARCH_HAS_BARRIERS if CACHE_L2X0
590 This enables support for NVIDIA Tegra based systems (Tegra APX,
591 Tegra 6xx and Tegra 2 series).
594 bool "Philips Nexperia PNX4008 Mobile"
597 select ARCH_USES_GETTIMEOFFSET
599 This enables support for Philips PNX4008 mobile platform.
602 bool "PXA2xx/PXA3xx-based"
605 select ARCH_HAS_CPUFREQ
607 select ARCH_REQUIRE_GPIOLIB
608 select GENERIC_CLOCKEVENTS
612 Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
617 select GENERIC_CLOCKEVENTS
618 select ARCH_REQUIRE_GPIOLIB
620 Support for Qualcomm MSM/QSD based systems. This runs on the
621 apps processor of the MSM/QSD and depends on a shared memory
622 interface to the modem processor which runs the baseband
623 stack and controls some vital subsystems
624 (clock and power control, etc).
627 bool "Renesas SH-Mobile"
629 Support for Renesas's SH-Mobile ARM platforms
636 select ARCH_MAY_HAVE_PC_FDC
637 select HAVE_PATA_PLATFORM
640 select ARCH_SPARSEMEM_ENABLE
641 select ARCH_USES_GETTIMEOFFSET
643 On the Acorn Risc-PC, Linux can support the internal IDE disk and
644 CD-ROM interface, serial and parallel port, and the floppy drive.
650 select ARCH_SPARSEMEM_ENABLE
652 select ARCH_HAS_CPUFREQ
654 select GENERIC_CLOCKEVENTS
657 select ARCH_REQUIRE_GPIOLIB
659 Support for StrongARM 11x0 based boards.
662 bool "Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443, S3C2450"
664 select ARCH_HAS_CPUFREQ
666 select ARCH_USES_GETTIMEOFFSET
667 select HAVE_S3C2410_I2C
669 Samsung S3C2410X CPU based systems, such as the Simtec Electronics
670 BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or
671 the Samsung SMDK2410 development board (and derivatives).
673 Note, the S3C2416 and the S3C2450 are so close that they even share
674 the same SoC ID code. This means that there is no seperate machine
675 directory (no arch/arm/mach-s3c2450) as the S3C2416 was first.
678 bool "Samsung S3C64XX"
684 select ARCH_USES_GETTIMEOFFSET
685 select ARCH_HAS_CPUFREQ
686 select ARCH_REQUIRE_GPIOLIB
687 select SAMSUNG_CLKSRC
688 select SAMSUNG_IRQ_VIC_TIMER
689 select SAMSUNG_IRQ_UART
690 select S3C_GPIO_TRACK
691 select S3C_GPIO_PULL_UPDOWN
692 select S3C_GPIO_CFG_S3C24XX
693 select S3C_GPIO_CFG_S3C64XX
695 select USB_ARCH_HAS_OHCI
696 select SAMSUNG_GPIOLIB_4BIT
697 select HAVE_S3C2410_I2C
698 select HAVE_S3C2410_WATCHDOG
700 Samsung S3C64XX series based systems
703 bool "Samsung S5P6440"
707 select HAVE_S3C2410_WATCHDOG
708 select ARCH_USES_GETTIMEOFFSET
709 select HAVE_S3C2410_I2C
712 Samsung S5P6440 CPU based systems
715 bool "Samsung S5P6442"
719 select ARCH_USES_GETTIMEOFFSET
720 select HAVE_S3C2410_WATCHDOG
722 Samsung S5P6442 CPU based systems
725 bool "Samsung S5PC100"
729 select ARM_L1_CACHE_SHIFT_6
730 select ARCH_USES_GETTIMEOFFSET
731 select HAVE_S3C2410_I2C
733 select HAVE_S3C2410_WATCHDOG
735 Samsung S5PC100 series based systems
738 bool "Samsung S5PV210/S5PC110"
742 select ARM_L1_CACHE_SHIFT_6
743 select ARCH_USES_GETTIMEOFFSET
744 select HAVE_S3C2410_I2C
746 select HAVE_S3C2410_WATCHDOG
748 Samsung S5PV210/S5PC110 series based systems
751 bool "Samsung S5PV310/S5PC210"
755 select GENERIC_CLOCKEVENTS
757 Samsung S5PV310 series based systems
766 select ARCH_USES_GETTIMEOFFSET
768 Support for the StrongARM based Digital DNARD machine, also known
769 as "Shark" (<http://www.shark-linux.de/shark.html>).
774 select ARCH_SPARSEMEM_ENABLE if !LH7A40X_CONTIGMEM
775 select ARCH_USES_GETTIMEOFFSET
777 Say Y here for systems based on one of the Sharp LH7A40X
778 System on a Chip processors. These CPUs include an ARM922T
779 core with a wide array of integrated devices for
780 hand-held and low-power applications.
783 bool "ST-Ericsson U300 Series"
789 select GENERIC_CLOCKEVENTS
793 Support for ST-Ericsson U300 series mobile platforms.
796 bool "ST-Ericsson U8500 Series"
799 select GENERIC_CLOCKEVENTS
801 select ARCH_REQUIRE_GPIOLIB
803 Support for ST-Ericsson's Ux500 architecture
806 bool "STMicroelectronics Nomadik"
811 select GENERIC_CLOCKEVENTS
812 select ARCH_REQUIRE_GPIOLIB
814 Support for the Nomadik platform by ST-Ericsson
818 select GENERIC_CLOCKEVENTS
819 select ARCH_REQUIRE_GPIOLIB
823 select GENERIC_ALLOCATOR
824 select ARCH_HAS_HOLES_MEMORYMODEL
826 Support for TI's DaVinci platform.
831 select ARCH_REQUIRE_GPIOLIB
832 select ARCH_HAS_CPUFREQ
833 select GENERIC_CLOCKEVENTS
834 select ARCH_HAS_HOLES_MEMORYMODEL
836 Support for TI's OMAP platform (OMAP1 and OMAP2).
841 select ARCH_REQUIRE_GPIOLIB
843 select GENERIC_CLOCKEVENTS
846 Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
851 Support for Broadcom ARM-based devices and boards.
856 # This is sorted alphabetically by mach-* pathname. However, plat-*
857 # Kconfigs may be included either alphabetically (according to the
858 # plat- suffix) or along side the corresponding mach-* source.
860 source "arch/arm/mach-aaec2000/Kconfig"
862 source "arch/arm/mach-at91/Kconfig"
864 source "arch/arm/mach-bcmring/Kconfig"
866 source "arch/arm/mach-clps711x/Kconfig"
868 source "arch/arm/mach-cns3xxx/Kconfig"
870 source "arch/arm/mach-davinci/Kconfig"
872 source "arch/arm/mach-dove/Kconfig"
874 source "arch/arm/mach-ep93xx/Kconfig"
876 source "arch/arm/mach-footbridge/Kconfig"
878 source "arch/arm/mach-gemini/Kconfig"
880 source "arch/arm/mach-h720x/Kconfig"
882 source "arch/arm/mach-integrator/Kconfig"
884 source "arch/arm/mach-iop32x/Kconfig"
886 source "arch/arm/mach-iop33x/Kconfig"
888 source "arch/arm/mach-iop13xx/Kconfig"
890 source "arch/arm/mach-ixp4xx/Kconfig"
892 source "arch/arm/mach-ixp2000/Kconfig"
894 source "arch/arm/mach-ixp23xx/Kconfig"
896 source "arch/arm/mach-kirkwood/Kconfig"
898 source "arch/arm/mach-ks8695/Kconfig"
900 source "arch/arm/mach-lh7a40x/Kconfig"
902 source "arch/arm/mach-loki/Kconfig"
904 source "arch/arm/mach-lpc32xx/Kconfig"
906 source "arch/arm/mach-msm/Kconfig"
908 source "arch/arm/mach-mv78xx0/Kconfig"
910 source "arch/arm/plat-mxc/Kconfig"
912 source "arch/arm/mach-netx/Kconfig"
914 source "arch/arm/mach-nomadik/Kconfig"
915 source "arch/arm/plat-nomadik/Kconfig"
917 source "arch/arm/mach-ns9xxx/Kconfig"
919 source "arch/arm/mach-nuc93x/Kconfig"
921 source "arch/arm/plat-omap/Kconfig"
923 source "arch/arm/mach-omap1/Kconfig"
925 source "arch/arm/mach-omap2/Kconfig"
927 source "arch/arm/mach-orion5x/Kconfig"
929 source "arch/arm/mach-pxa/Kconfig"
930 source "arch/arm/plat-pxa/Kconfig"
932 source "arch/arm/mach-mmp/Kconfig"
934 source "arch/arm/mach-realview/Kconfig"
936 source "arch/arm/mach-sa1100/Kconfig"
938 source "arch/arm/plat-samsung/Kconfig"
939 source "arch/arm/plat-s3c24xx/Kconfig"
940 source "arch/arm/plat-s5p/Kconfig"
942 source "arch/arm/plat-spear/Kconfig"
945 source "arch/arm/mach-s3c2400/Kconfig"
946 source "arch/arm/mach-s3c2410/Kconfig"
947 source "arch/arm/mach-s3c2412/Kconfig"
948 source "arch/arm/mach-s3c2416/Kconfig"
949 source "arch/arm/mach-s3c2440/Kconfig"
950 source "arch/arm/mach-s3c2443/Kconfig"
954 source "arch/arm/mach-s3c64xx/Kconfig"
957 source "arch/arm/mach-s5p6440/Kconfig"
959 source "arch/arm/mach-s5p6442/Kconfig"
961 source "arch/arm/mach-s5pc100/Kconfig"
963 source "arch/arm/mach-s5pv210/Kconfig"
965 source "arch/arm/mach-s5pv310/Kconfig"
967 source "arch/arm/mach-shmobile/Kconfig"
969 source "arch/arm/plat-stmp3xxx/Kconfig"
971 source "arch/arm/mach-tegra/Kconfig"
973 source "arch/arm/mach-u300/Kconfig"
975 source "arch/arm/mach-ux500/Kconfig"
977 source "arch/arm/mach-versatile/Kconfig"
979 source "arch/arm/mach-vexpress/Kconfig"
981 source "arch/arm/mach-w90x900/Kconfig"
983 source "arch/arm/mach-brcm-hnd/Kconfig"
984 source "arch/arm/plat-brcm/Kconfig"
986 # Definitions to make life easier
992 select GENERIC_CLOCKEVENTS
1000 config PLAT_VERSATILE
1003 config ARM_TIMER_SP804
1006 source arch/arm/mm/Kconfig
1009 bool "Enable iWMMXt support"
1010 depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK
1011 default y if PXA27x || PXA3xx || ARCH_MMP
1013 Enable support for iWMMXt context switching at run time if
1014 running on a CPU that supports it.
1016 # bool 'Use XScale PMU as timer source' CONFIG_XSCALE_PMU_TIMER
1019 depends on CPU_XSCALE && !XSCALE_PMU_TIMER
1023 depends on (CPU_V6 || CPU_V7 || XSCALE_PMU) && \
1024 (!ARCH_OMAP3 || OMAP3_EMU)
1029 source "arch/arm/Kconfig-nommu"
1032 config ARM_ERRATA_411920
1033 bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
1034 depends on CPU_V6 && !SMP
1036 Invalidation of the Instruction Cache operation can
1037 fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
1038 It does not affect the MPCore. This option enables the ARM Ltd.
1039 recommended workaround.
1041 config ARM_ERRATA_430973
1042 bool "ARM errata: Stale prediction on replaced interworking branch"
1045 This option enables the workaround for the 430973 Cortex-A8
1046 (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
1047 interworking branch is replaced with another code sequence at the
1048 same virtual address, whether due to self-modifying code or virtual
1049 to physical address re-mapping, Cortex-A8 does not recover from the
1050 stale interworking branch prediction. This results in Cortex-A8
1051 executing the new code sequence in the incorrect ARM or Thumb state.
1052 The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
1053 and also flushes the branch target cache at every context switch.
1054 Note that setting specific bits in the ACTLR register may not be
1055 available in non-secure mode.
1057 config ARM_ERRATA_458693
1058 bool "ARM errata: Processor deadlock when a false hazard is created"
1061 This option enables the workaround for the 458693 Cortex-A8 (r2p0)
1062 erratum. For very specific sequences of memory operations, it is
1063 possible for a hazard condition intended for a cache line to instead
1064 be incorrectly associated with a different cache line. This false
1065 hazard might then cause a processor deadlock. The workaround enables
1066 the L1 caching of the NEON accesses and disables the PLD instruction
1067 in the ACTLR register. Note that setting specific bits in the ACTLR
1068 register may not be available in non-secure mode.
1070 config ARM_ERRATA_460075
1071 bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
1074 This option enables the workaround for the 460075 Cortex-A8 (r2p0)
1075 erratum. Any asynchronous access to the L2 cache may encounter a
1076 situation in which recent store transactions to the L2 cache are lost
1077 and overwritten with stale memory contents from external memory. The
1078 workaround disables the write-allocate mode for the L2 cache via the
1079 ACTLR register. Note that setting specific bits in the ACTLR register
1080 may not be available in non-secure mode.
1082 config ARM_ERRATA_742230
1083 bool "ARM errata: DMB operation may be faulty"
1084 depends on CPU_V7 && SMP
1086 This option enables the workaround for the 742230 Cortex-A9
1087 (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
1088 between two write operations may not ensure the correct visibility
1089 ordering of the two writes. This workaround sets a specific bit in
1090 the diagnostic register of the Cortex-A9 which causes the DMB
1091 instruction to behave as a DSB, ensuring the correct behaviour of
1094 config ARM_ERRATA_742231
1095 bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
1096 depends on CPU_V7 && SMP
1098 This option enables the workaround for the 742231 Cortex-A9
1099 (r2p0..r2p2) erratum. Under certain conditions, specific to the
1100 Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
1101 accessing some data located in the same cache line, may get corrupted
1102 data due to bad handling of the address hazard when the line gets
1103 replaced from one of the CPUs at the same time as another CPU is
1104 accessing it. This workaround sets specific bits in the diagnostic
1105 register of the Cortex-A9 which reduces the linefill issuing
1106 capabilities of the processor.
1108 config PL310_ERRATA_588369
1109 bool "Clean & Invalidate maintenance operations do not invalidate clean lines"
1110 depends on CACHE_L2X0 && ARCH_OMAP4
1112 The PL310 L2 cache controller implements three types of Clean &
1113 Invalidate maintenance operations: by Physical Address
1114 (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC).
1115 They are architecturally defined to behave as the execution of a
1116 clean operation followed immediately by an invalidate operation,
1117 both performing to the same memory location. This functionality
1118 is not correctly implemented in PL310 as clean lines are not
1119 invalidated as a result of these operations. Note that this errata
1120 uses Texas Instrument's secure monitor api.
1122 config ARM_ERRATA_720789
1123 bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
1124 depends on CPU_V7 && SMP
1126 This option enables the workaround for the 720789 Cortex-A9 (prior to
1127 r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
1128 broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
1129 As a consequence of this erratum, some TLB entries which should be
1130 invalidated are not, resulting in an incoherency in the system page
1131 tables. The workaround changes the TLB flushing routines to invalidate
1132 entries regardless of the ASID.
1134 config ARM_ERRATA_743622
1135 bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
1138 This option enables the workaround for the 743622 Cortex-A9
1139 (r2p0..r2p2) erratum. Under very rare conditions, a faulty
1140 optimisation in the Cortex-A9 Store Buffer may lead to data
1141 corruption. This workaround sets a specific bit in the diagnostic
1142 register of the Cortex-A9 which disables the Store Buffer
1143 optimisation, preventing the defect from occurring. This has no
1144 visible impact on the overall performance or power consumption of the
1149 source "arch/arm/common/Kconfig"
1151 menu "Support for Broadcom ARM based boards"
1154 bool "Support for Broadcom BCM947XX"
1155 depends on ARCH_BRCM
1158 bool "Support for Broadcom BCM47XX processors"
1161 config FAILSAFE_UPGRADE
1162 bool "Failsafe Upgrades"
1167 bool "Store Crashlog in nvram"
1172 bool "Support nvram 128K"
1176 bool "Support dual trx"
1179 config DUMP_PREV_OOPS_MSG
1180 bool "Dump previous kernel oops message"
1183 config DUMP_PREV_OOPS_MSG_BUF_ADDR
1184 hex "Buffer start address to store previous kernel oops message."
1185 depends on DUMP_PREV_OOPS_MSG
1186 default "0xC000000" if BRCMCHIP
1188 config DUMP_PREV_OOPS_MSG_BUF_LEN
1189 hex "Buffer length to store previous kernel oops message."
1190 depends on DUMP_PREV_OOPS_MSG
1191 default "0x2000" if BRCMCHIP
1203 Find out whether you have ISA slots on your motherboard. ISA is the
1204 name of a bus system, i.e. the way the CPU talks to the other stuff
1205 inside your box. Other bus systems are PCI, EISA, MicroChannel
1206 (MCA) or VESA. ISA is an older system, now being displaced by PCI;
1207 newer boards don't support it. If you have ISA, say Y, otherwise N.
1209 # Select ISA DMA controller support
1214 # Select ISA DMA interface
1219 bool "PCI support" if ARCH_INTEGRATOR_AP || ARCH_VERSATILE_PB || ARCH_IXP4XX || ARCH_KS8695 || MACH_ARMCORE || ARCH_CNS3XXX
1221 Find out whether you have a PCI motherboard. PCI is the name of a
1222 bus system, i.e. the way the CPU talks to the other stuff inside
1223 your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
1224 VESA. If you have PCI, say Y, otherwise N.
1233 # Select the host bridge type
1234 config PCI_HOST_VIA82C505
1236 depends on PCI && ARCH_SHARK
1239 config PCI_HOST_ITE8152
1241 depends on PCI && MACH_ARMCORE
1245 source "drivers/pci/pcie/Kconfig"
1247 source "drivers/pci/Kconfig"
1249 source "drivers/pcmcia/Kconfig"
1253 menu "Kernel Features"
1255 source "kernel/time/Kconfig"
1258 bool "Symmetric Multi-Processing (EXPERIMENTAL)"
1259 depends on EXPERIMENTAL && (REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP ||\
1260 MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 ||\
1261 ARCH_S5PV310 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 ||\
1263 depends on GENERIC_CLOCKEVENTS
1264 select USE_GENERIC_SMP_HELPERS
1265 select HAVE_ARM_SCU if ARCH_REALVIEW || ARCH_OMAP4 || ARCH_S5PV310 ||\
1266 ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || PLAT_MPCORE
1268 This enables support for systems with more than one CPU. If you have
1269 a system with only one CPU, like most personal computers, say N. If
1270 you have a system with more than one CPU, say Y.
1272 If you say N here, the kernel will run on single and multiprocessor
1273 machines, but will use only one CPU of a multiprocessor machine. If
1274 you say Y here, the kernel will run on many, but not all, single
1275 processor machines. On a single processor machine, the kernel will
1276 run faster if you say N here.
1278 See also <file:Documentation/i386/IO-APIC.txt>,
1279 <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
1280 <http://www.linuxdoc.org/docs.html#howto>.
1282 If you don't know what to do here, say N.
1288 This option enables support for the ARM system coherency unit
1294 This options enables support for the ARM timer and watchdog unit
1297 prompt "Memory split"
1300 Select the desired split between kernel and user memory.
1302 If you are not absolutely sure what you are doing, leave this
1306 bool "3G/1G user/kernel split"
1308 bool "2G/2G user/kernel split"
1310 bool "1G/3G user/kernel split"
1315 default 0x40000000 if VMSPLIT_1G
1316 default 0x80000000 if VMSPLIT_2G
1320 int "Maximum number of CPUs (2-32)"
1326 bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
1327 depends on SMP && HOTPLUG && EXPERIMENTAL
1329 Say Y here to experiment with turning CPUs off and on. CPUs
1330 can be controlled through /sys/devices/system/cpu.
1333 bool "Use local timer interrupts"
1334 depends on SMP && (REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || \
1335 REALVIEW_EB_A9MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \
1336 ARCH_S5PV310 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4)
1338 select HAVE_ARM_TWD if ARCH_REALVIEW || ARCH_OMAP4 || ARCH_S5PV310 || \
1339 ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS
1341 Enable support for local timers on SMP platforms, rather then the
1342 legacy IPI broadcast method. Local timers allows the system
1343 accounting to be spread across the timer interval, preventing a
1344 "thundering herd" at every timer tick.
1346 source kernel/Kconfig.preempt
1350 default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P6440 || \
1351 ARCH_S5P6442 || ARCH_S5PV210 || ARCH_S5PV310
1352 default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
1353 default AT91_TIMER_HZ if ARCH_AT91
1354 default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
1357 config THUMB2_KERNEL
1358 bool "Compile the kernel in Thumb-2 mode"
1359 depends on CPU_V7 && EXPERIMENTAL
1361 select ARM_ASM_UNIFIED
1363 By enabling this option, the kernel will be compiled in
1364 Thumb-2 mode. A compiler/assembler that understand the unified
1365 ARM-Thumb syntax is needed.
1369 config ARM_ASM_UNIFIED
1373 bool "Use the ARM EABI to compile the kernel"
1375 This option allows for the kernel to be compiled using the latest
1376 ARM ABI (aka EABI). This is only useful if you are using a user
1377 space environment that is also compiled with EABI.
1379 Since there are major incompatibilities between the legacy ABI and
1380 EABI, especially with regard to structure member alignment, this
1381 option also changes the kernel syscall calling convention to
1382 disambiguate both ABIs and allow for backward compatibility support
1383 (selected with CONFIG_OABI_COMPAT).
1385 To use this you need GCC version 4.0.0 or later.
1388 bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
1389 depends on AEABI && EXPERIMENTAL
1392 This option preserves the old syscall interface along with the
1393 new (ARM EABI) one. It also provides a compatibility layer to
1394 intercept syscalls that have structure arguments which layout
1395 in memory differs between the legacy ABI and the new ARM EABI
1396 (only for non "thumb" binaries). This option adds a tiny
1397 overhead to all syscalls and produces a slightly larger kernel.
1398 If you know you'll be using only pure EABI user space then you
1399 can say N here. If this option is not selected and you attempt
1400 to execute a legacy ABI binary then the result will be
1401 UNPREDICTABLE (in fact it can be predicted that it won't work
1402 at all). If in doubt say Y.
1404 config ARCH_HAS_HOLES_MEMORYMODEL
1407 config ARCH_SPARSEMEM_ENABLE
1410 config ARCH_SPARSEMEM_DEFAULT
1411 def_bool ARCH_SPARSEMEM_ENABLE
1413 config ARCH_SELECT_MEMORY_MODEL
1414 def_bool ARCH_SPARSEMEM_ENABLE
1417 bool "High Memory Support (EXPERIMENTAL)"
1418 depends on MMU && EXPERIMENTAL
1420 The address space of ARM processors is only 4 Gigabytes large
1421 and it has to accommodate user address space, kernel address
1422 space as well as some memory mapped IO. That means that, if you
1423 have a large amount of physical memory and/or IO, not all of the
1424 memory can be "permanently mapped" by the kernel. The physical
1425 memory that is not permanently mapped is called "high memory".
1427 Depending on the selected kernel/user memory split, minimum
1428 vmalloc space and actual amount of RAM, you may not need this
1429 option which should result in a slightly faster kernel.
1434 bool "Allocate 2nd-level pagetables from highmem"
1436 depends on !OUTER_CACHE
1438 config HW_PERF_EVENTS
1439 bool "Enable hardware performance counter support for perf events"
1440 depends on PERF_EVENTS && CPU_HAS_PMU
1443 Enable hardware performance counter support for perf events. If
1444 disabled, perf events will use software events only.
1449 This enables support for sparse irqs. This is useful in general
1450 as most CPUs have a fairly sparse array of IRQ vectors, which
1451 the irq_desc then maps directly on to. Systems with a high
1452 number of off-chip IRQs will want to treat this as
1453 experimental until they have been independently verified.
1457 config FORCE_MAX_ZONEORDER
1458 int "Maximum zone order" if ARCH_SHMOBILE
1459 range 11 64 if ARCH_SHMOBILE
1460 default "9" if SA1111
1463 The kernel memory allocator divides physically contiguous memory
1464 blocks into "zones", where each zone is a power of two number of
1465 pages. This option selects the largest power of two that the kernel
1466 keeps in the memory allocator. If you need to allocate very large
1467 blocks of physically contiguous memory, then you may need to
1468 increase this value.
1470 This config option is actually maximum order plus one. For example,
1471 a value of 11 means that the largest free memory block is 2^10 pages.
1474 bool "Timer and CPU usage LEDs"
1475 depends on ARCH_CDB89712 || ARCH_EBSA110 || \
1476 ARCH_EBSA285 || ARCH_INTEGRATOR || \
1477 ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \
1478 ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \
1479 ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \
1480 ARCH_AT91 || ARCH_DAVINCI || \
1481 ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW
1483 If you say Y here, the LEDs on your machine will be used
1484 to provide useful information about your current system status.
1486 If you are compiling a kernel for a NetWinder or EBSA-285, you will
1487 be able to select which LEDs are active using the options below. If
1488 you are compiling a kernel for the EBSA-110 or the LART however, the
1489 red LED will simply flash regularly to indicate that the system is
1490 still functional. It is safe to say Y here if you have a CATS
1491 system, but the driver will do nothing.
1494 bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \
1495 OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1496 || MACH_OMAP_PERSEUS2
1498 depends on !GENERIC_CLOCKEVENTS
1499 default y if ARCH_EBSA110
1501 If you say Y here, one of the system LEDs (the green one on the
1502 NetWinder, the amber one on the EBSA285, or the red one on the LART)
1503 will flash regularly to indicate that the system is still
1504 operational. This is mainly useful to kernel hackers who are
1505 debugging unstable kernels.
1507 The LART uses the same LED for both Timer LED and CPU usage LED
1508 functions. You may choose to use both, but the Timer LED function
1509 will overrule the CPU usage LED.
1512 bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \
1514 || OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1515 || MACH_OMAP_PERSEUS2
1518 If you say Y here, the red LED will be used to give a good real
1519 time indication of CPU usage, by lighting whenever the idle task
1520 is not currently executing.
1522 The LART uses the same LED for both Timer LED and CPU usage LED
1523 functions. You may choose to use both, but the Timer LED function
1524 will overrule the CPU usage LED.
1526 config ALIGNMENT_TRAP
1528 depends on CPU_CP15_MMU
1529 default y if !ARCH_EBSA110
1530 select HAVE_PROC_CPU if PROC_FS
1532 ARM processors cannot fetch/store information which is not
1533 naturally aligned on the bus, i.e., a 4 byte fetch must start at an
1534 address divisible by 4. On 32-bit ARM processors, these non-aligned
1535 fetch/store instructions will be emulated in software if you say
1536 here, which has a severe performance impact. This is necessary for
1537 correct operation of some network protocols. With an IP-only
1538 configuration it is safe to say N, otherwise say Y.
1540 config UACCESS_WITH_MEMCPY
1541 bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)"
1542 depends on MMU && EXPERIMENTAL
1543 default y if CPU_FEROCEON
1545 Implement faster copy_to_user and clear_user methods for CPU
1546 cores where a 8-word STM instruction give significantly higher
1547 memory write throughput than a sequence of individual 32bit stores.
1549 A possible side effect is a slight increase in scheduling latency
1550 between threads sharing the same address space if they invoke
1551 such copy operations with large buffers.
1553 However, if the CPU data cache is using a write-allocate mode,
1554 this option is unlikely to provide any performance gain.
1556 config CC_STACKPROTECTOR
1557 bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
1559 This option turns on the -fstack-protector GCC feature. This
1560 feature puts, at the beginning of functions, a canary value on
1561 the stack just before the return address, and validates
1562 the value just before actually returning. Stack based buffer
1563 overflows (that need to overwrite this return address) now also
1564 overwrite the canary, which gets detected and the attack is then
1565 neutralized via a kernel panic.
1566 This feature requires gcc version 4.2 or above.
1568 config DEPRECATED_PARAM_STRUCT
1569 bool "Provide old way to pass kernel parameters"
1571 This was deprecated in 2001 and announced to live on for 5 years.
1572 Some old boot loaders still use this way.
1578 # Compressed boot loader in ROM. Yes, we really want to ask about
1579 # TEXT and BSS so we preserve their values in the config files.
1580 config ZBOOT_ROM_TEXT
1581 hex "Compressed ROM boot loader base address"
1584 The physical address at which the ROM-able zImage is to be
1585 placed in the target. Platforms which normally make use of
1586 ROM-able zImage formats normally set this to a suitable
1587 value in their defconfig file.
1589 If ZBOOT_ROM is not enabled, this has no effect.
1591 config ZBOOT_ROM_BSS
1592 hex "Compressed ROM boot loader BSS address"
1595 The base address of an area of read/write memory in the target
1596 for the ROM-able zImage which must be available while the
1597 decompressor is running. It must be large enough to hold the
1598 entire decompressed kernel plus an additional 128 KiB.
1599 Platforms which normally make use of ROM-able zImage formats
1600 normally set this to a suitable value in their defconfig file.
1602 If ZBOOT_ROM is not enabled, this has no effect.
1605 bool "Compressed boot loader in ROM/flash"
1606 depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
1608 Say Y here if you intend to execute your compressed kernel image
1609 (zImage) directly from ROM or flash. If unsure, say N.
1612 string "Default kernel command string"
1615 On some architectures (EBSA110 and CATS), there is currently no way
1616 for the boot loader to pass arguments to the kernel. For these
1617 architectures, you should supply some command-line options at build
1618 time by entering them here. As a minimum, you should specify the
1619 memory size and the root device (e.g., mem=64M root=/dev/nfs).
1621 config CMDLINE_FORCE
1622 bool "Always use the default kernel command string"
1623 depends on CMDLINE != ""
1625 Always use the default kernel command string, even if the boot
1626 loader passes other arguments to the kernel.
1627 This is useful if you cannot or don't want to change the
1628 command-line options your boot loader passes to the kernel.
1633 bool "Kernel Execute-In-Place from ROM"
1634 depends on !ZBOOT_ROM
1636 Execute-In-Place allows the kernel to run from non-volatile storage
1637 directly addressable by the CPU, such as NOR flash. This saves RAM
1638 space since the text section of the kernel is not loaded from flash
1639 to RAM. Read-write sections, such as the data section and stack,
1640 are still copied to RAM. The XIP kernel is not compressed since
1641 it has to run directly from flash, so it will take more space to
1642 store it. The flash address used to link the kernel object files,
1643 and for storing it, is configuration dependent. Therefore, if you
1644 say Y here, you must know the proper physical address where to
1645 store the kernel image depending on your own flash memory usage.
1647 Also note that the make target becomes "make xipImage" rather than
1648 "make zImage" or "make Image". The final kernel binary to put in
1649 ROM memory will be arch/arm/boot/xipImage.
1653 config XIP_PHYS_ADDR
1654 hex "XIP Kernel Physical Location"
1655 depends on XIP_KERNEL
1656 default "0x00080000"
1658 This is the physical address in your flash memory the kernel will
1659 be linked for and stored to. This address is dependent on your
1663 bool "Kexec system call (EXPERIMENTAL)"
1664 depends on EXPERIMENTAL
1666 kexec is a system call that implements the ability to shutdown your
1667 current kernel, and to start another kernel. It is like a reboot
1668 but it is independent of the system firmware. And like a reboot
1669 you can start any kernel with it, not just Linux.
1671 It is an ongoing process to be certain the hardware in a machine
1672 is properly shutdown, so do not be surprised if this code does not
1673 initially work for you. It may help to enable device hotplugging
1677 bool "Export atags in procfs"
1681 Should the atags used to boot the kernel be exported in an "atags"
1682 file in procfs. Useful with kexec.
1684 config AUTO_ZRELADDR
1685 bool "Auto calculation of the decompressed kernel image address"
1686 depends on !ZBOOT_ROM && !ARCH_U300
1688 ZRELADDR is the physical address where the decompressed kernel
1689 image will be placed. If AUTO_ZRELADDR is selected, the address
1690 will be determined at run-time by masking the current IP with
1691 0xf8000000. This assumes the zImage being placed in the first 128MB
1692 from start of memory.
1696 menu "CPU Power Management"
1700 source "drivers/cpufreq/Kconfig"
1702 config CPU_FREQ_SA1100
1705 config CPU_FREQ_SA1110
1708 config CPU_FREQ_INTEGRATOR
1709 tristate "CPUfreq driver for ARM Integrator CPUs"
1710 depends on ARCH_INTEGRATOR && CPU_FREQ
1713 This enables the CPUfreq driver for ARM Integrator CPUs.
1715 For details, take a look at <file:Documentation/cpu-freq>.
1721 depends on CPU_FREQ && ARCH_PXA && PXA25x
1723 select CPU_FREQ_DEFAULT_GOV_USERSPACE
1725 config CPU_FREQ_S3C64XX
1726 bool "CPUfreq support for Samsung S3C64XX CPUs"
1727 depends on CPU_FREQ && CPU_S3C6410
1732 Internal configuration node for common cpufreq on Samsung SoC
1734 config CPU_FREQ_S3C24XX
1735 bool "CPUfreq driver for Samsung S3C24XX series CPUs"
1736 depends on ARCH_S3C2410 && CPU_FREQ && EXPERIMENTAL
1739 This enables the CPUfreq driver for the Samsung S3C24XX family
1742 For details, take a look at <file:Documentation/cpu-freq>.
1746 config CPU_FREQ_S3C24XX_PLL
1747 bool "Support CPUfreq changing of PLL frequency"
1748 depends on CPU_FREQ_S3C24XX && EXPERIMENTAL
1750 Compile in support for changing the PLL frequency from the
1751 S3C24XX series CPUfreq driver. The PLL takes time to settle
1752 after a frequency change, so by default it is not enabled.
1754 This also means that the PLL tables for the selected CPU(s) will
1755 be built which may increase the size of the kernel image.
1757 config CPU_FREQ_S3C24XX_DEBUG
1758 bool "Debug CPUfreq Samsung driver core"
1759 depends on CPU_FREQ_S3C24XX
1761 Enable s3c_freq_dbg for the Samsung S3C CPUfreq core
1763 config CPU_FREQ_S3C24XX_IODEBUG
1764 bool "Debug CPUfreq Samsung driver IO timing"
1765 depends on CPU_FREQ_S3C24XX
1767 Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core
1769 config CPU_FREQ_S3C24XX_DEBUGFS
1770 bool "Export debugfs for CPUFreq"
1771 depends on CPU_FREQ_S3C24XX && DEBUG_FS
1773 Export status information via debugfs.
1777 source "drivers/cpuidle/Kconfig"
1781 menu "Floating point emulation"
1783 comment "At least one emulation must be selected"
1786 bool "NWFPE math emulation"
1787 depends on !AEABI || OABI_COMPAT
1789 Say Y to include the NWFPE floating point emulator in the kernel.
1790 This is necessary to run most binaries. Linux does not currently
1791 support floating point hardware so you need to say Y here even if
1792 your machine has an FPA or floating point co-processor podule.
1794 You may say N here if you are going to load the Acorn FPEmulator
1795 early in the bootup.
1798 bool "Support extended precision"
1799 depends on FPE_NWFPE
1801 Say Y to include 80-bit support in the kernel floating-point
1802 emulator. Otherwise, only 32 and 64-bit support is compiled in.
1803 Note that gcc does not generate 80-bit operations by default,
1804 so in most cases this option only enlarges the size of the
1805 floating point emulator without any good reason.
1807 You almost surely want to say N here.
1810 bool "FastFPE math emulation (EXPERIMENTAL)"
1811 depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL
1813 Say Y here to include the FAST floating point emulator in the kernel.
1814 This is an experimental much faster emulator which now also has full
1815 precision for the mantissa. It does not support any exceptions.
1816 It is very simple, and approximately 3-6 times faster than NWFPE.
1818 It should be sufficient for most programs. It may be not suitable
1819 for scientific calculations, but you have to check this for yourself.
1820 If you do not feel you need a faster FP emulation you should better
1824 bool "VFP-format floating point maths"
1825 depends on CPU_V6 || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
1827 Say Y to include VFP support code in the kernel. This is needed
1828 if your hardware includes a VFP unit.
1830 Please see <file:Documentation/arm/VFP/release-notes.txt> for
1831 release notes and additional status information.
1833 Say N if your target does not have VFP hardware.
1841 bool "Advanced SIMD (NEON) Extension support"
1842 depends on VFPv3 && CPU_V7
1844 Say Y to include support code for NEON, the ARMv7 Advanced SIMD
1849 menu "Userspace binary formats"
1851 source "fs/Kconfig.binfmt"
1854 tristate "RISC OS personality"
1857 Say Y here to include the kernel code necessary if you want to run
1858 Acorn RISC OS/Arthur binaries under Linux. This code is still very
1859 experimental; if this sounds frightening, say N and sleep in peace.
1860 You can also say M here to compile this support as a module (which
1861 will be called arthur).
1865 menu "Power management options"
1867 source "kernel/power/Kconfig"
1869 config ARCH_SUSPEND_POSSIBLE
1874 source "net/Kconfig"
1876 source "drivers/Kconfig"
1880 source "arch/arm/Kconfig.debug"
1882 source "security/Kconfig"
1884 source "crypto/Kconfig"
1886 source "lib/Kconfig"