release/src-rt/et/sys/etc.h

   1 /*
   2  * Common [OS-independent] header file for
   3  * Broadcom BCM47XX 10/100Mbps Ethernet Device Driver
   4  *
   5  * Copyright (C) 2009, Broadcom Corporation
   6  * All Rights Reserved.
   7  *
   8  * This is UNPUBLISHED PROPRIETARY SOURCE CODE of Broadcom Corporation;
   9  * the contents of this file may not be disclosed to third parties, copied
  10  * or duplicated in any form, in whole or in part, without the prior
  11  * written permission of Broadcom Corporation.
  12  *
  13  * $Id: etc.h,v 1.66.96.4 2009/07/07 19:25:16 Exp $
  14  */
  15
  16 #ifndef _etc_h_
  17 #define _etc_h_
  18
  19 #include <etioctl.h>
  20
  21 #define MAXMULTILIST    32
  22
  23 #ifndef ch_t
  24 #define ch_t void
  25 #endif
  26
  27 #define NUMTXQ          4
  28
  29 #define TXREC_THR       8
  30
  31 struct etc_info;        /* forward declaration */
  32 struct bcmstrbuf;       /* forward declaration */
  33
  34 /* each chip type supports a set of chip-type-specific ops */
  35 struct chops {
  36         bool (*id)(uint vendor, uint device);           /* return true if match */
  37         void *(*attach)(struct etc_info *etc, void *dev, void *regs);
  38         void (*detach)(ch_t *ch);                       /* free chip private state */
  39         void (*reset)(ch_t *ch);                        /* chip reset */
  40         void (*init)(ch_t *ch, uint options);           /* chip init */
  41         bool (*tx)(ch_t *ch, void *p);                  /* transmit frame */
  42         void *(*rx)(ch_t *ch);                          /* receive frame */
  43         void (*rxfill)(ch_t *ch);                       /* post dma rx buffers */
  44         int (*getintrevents)(ch_t *ch, bool in_isr);    /* return intr events */
  45         bool (*errors)(ch_t *ch);                       /* handle chip errors */
  46         void (*intrson)(ch_t *ch);                      /* enable chip interrupts */
  47         void (*intrsoff)(ch_t *ch);                     /* disable chip interrupts */
  48         void (*txreclaim)(ch_t *ch, bool all);          /* reclaim transmit resources */
  49         void (*rxreclaim)(ch_t *ch);                    /* reclaim receive resources */
  50         void (*statsupd)(ch_t *ch);                     /* update sw stat counters */
  51         void (*dumpmib)(ch_t *ch, struct bcmstrbuf *);  /* get sw mib counters */
  52         void (*enablepme)(ch_t *ch);                    /* enable PME */
  53         void (*disablepme)(ch_t *ch);                   /* disable PME */
  54         void (*phyreset)(ch_t *ch, uint phyaddr);       /* reset phy */
  55         uint16 (*phyrd)(ch_t *ch, uint phyaddr, uint reg);      /* read phy register */
  56         void (*phywr)(ch_t *ch, uint phyaddr, uint reg, uint16 val);    /* write phy register */
  57         void (*dump)(ch_t *ch, struct bcmstrbuf *b);            /* debugging output */
  58         void (*longname)(ch_t *ch, char *buf, uint bufsize);    /* return descriptive name */
  59         void (*duplexupd)(ch_t *ch);                    /* keep mac duplex consistent */
  60 };
  61
  62 /*
  63  * "Common" os-independent software state structure.
  64  */
  65 typedef struct etc_info {
  66         void            *et;            /* pointer to os-specific private state */
  67         uint            unit;           /* device instance number */
  68         void            *osh;           /* pointer to os handler */
  69         void            *mib;           /* pointer to s/w maintained mib counters */
  70         bool            up;             /* interface up and running */
  71         bool            promisc;        /* promiscuous destination address */
  72         bool            qos;            /* QoS priority determination on rx */
  73         bool            loopbk;         /* loopback override mode */
  74
  75         int             forcespeed;     /* disable autonegotiation and force speed/duplex */
  76         uint            advertise;      /* control speed/duplex advertised caps */
  77         uint            advertise2;     /* control gige speed/duplex advertised caps */
  78         bool            needautoneg;    /* request restart autonegotiation */
  79         int             speed;          /* current speed: 10, 100 */
  80         int             duplex;         /* current duplex: 0=half, 1=full */
  81
  82         bool            piomode;        /* enable programmed io (!dma) */
  83         void            *pioactive;     /* points to pio packet being transmitted */
  84         volatile uint   *txavail[NUMTXQ];       /* dma: # tx descriptors available */
  85
  86         uint16          vendorid;       /* pci function vendor id */
  87         uint16          deviceid;       /* pci function device id */
  88         uint            chip;           /* chip number */
  89         uint            chiprev;        /* chip revision */
  90         uint            coreid;         /* core id */
  91         uint            corerev;        /* core revision */
  92
  93         bool            nicmode;        /* is this core using its own pci i/f */
  94
  95         struct chops    *chops;         /* pointer to chip-specific opsvec */
  96         void            *ch;            /* pointer to chip-specific state */
  97         void            *robo;          /* optional robo private data */
  98
  99         uint            txq_state;      /* tx queues state bits */
 100         uint            coreunit;       /* sb chips: chip enet instance # */
 101         uint            phyaddr;        /* sb chips: mdio 5-bit phy address */
 102         uint            mdcport;        /* sb chips: which mii to use (enet core #) to access phy */
 103
 104         struct ether_addr cur_etheraddr; /* our local ethernet address */
 105         struct ether_addr perm_etheraddr; /* original sprom local ethernet address */
 106
 107         struct ether_addr multicast[MAXMULTILIST];
 108         uint            nmulticast;
 109         bool            allmulti;       /* enable all multicasts */
 110
 111         bool            linkstate;      /* link integrity state */
 112         bool            pm_modechange;  /* true if mode change is to due pm */
 113
 114         uint32          now;            /* elapsed seconds */
 115
 116         uint32          boardflags;     /* board flags */
 117         uint32          txrec_thresh;   /* # of tx frames after which reclaim is done */
 118
 119         /* sw-maintained stat counters */
 120         uint32          txframes[NUMTXQ];       /* transmitted frames on each tx fifo */
 121         uint32          txframe;        /* transmitted frames */
 122         uint32          txbyte;         /* transmitted bytes */
 123         uint32          rxframe;        /* received frames */
 124         uint32          rxbyte;         /* received bytes */
 125         uint32          txerror;        /* total tx errors */
 126         uint32          txnobuf;        /* tx out-of-buffer errors */
 127         uint32          rxerror;        /* total rx errors */
 128         uint32          rxgiants;       /* total rx giant frames */
 129         uint32          rxnobuf;        /* rx out-of-buffer errors */
 130         uint32          reset;          /* reset count */
 131         uint32          dmade;          /* pci descriptor errors */
 132         uint32          dmada;          /* pci data errors */
 133         uint32          dmape;          /* descriptor protocol error */
 134         uint32          rxdmauflo;      /* receive descriptor underflow */
 135         uint32          rxoflo;         /* receive fifo overflow */
 136         uint32          txuflo;         /* transmit fifo underflow */
 137         uint32          rxoflodiscards; /* frames discarded during rx fifo overflow */
 138         uint32          rxbadlen;       /* 802.3 len field != read length */
 139 } etc_info_t;
 140
 141 /* interrupt event bitvec */
 142 #define INTR_TX         0x1
 143 #define INTR_RX         0x2
 144 #define INTR_ERROR      0x4
 145 #define INTR_TO         0x8
 146 #define INTR_NEW        0x10
 147
 148 /* forcespeed values */
 149 #define ET_AUTO         -1
 150 #define ET_10HALF       0
 151 #define ET_10FULL       1
 152 #define ET_100HALF      2
 153 #define ET_100FULL      3
 154 #define ET_1000HALF     4
 155 #define ET_1000FULL     5
 156
 157 /* init options */
 158 #define ET_INIT_FULL     0x1
 159 #define ET_INIT_INTRON   0x2
 160
 161 /* Specific init options for et_init */
 162 #define ET_INIT_DEF_OPTIONS   (ET_INIT_FULL | ET_INIT_INTRON)
 163 #define ET_INIT_INTROFF       (ET_INIT_FULL)
 164 #define ET_INIT_PARTIAL      (0)
 165
 166 /* macro to safely clear the UP flag */
 167 #define ET_FLAG_DOWN(x)   (*(x)->chops->intrsoff)((x)->ch);  \
 168                           (x)->up = FALSE;
 169
 170 /*
 171  * Least-common denominator rxbuf start-of-data offset:
 172  * Must be >= size of largest rxhdr
 173  * Must be 2-mod-4 aligned so IP is 0-mod-4
 174  */
 175 #define HWRXOFF         30
 176
 177 #define TC_BK           0       /* background traffic class */
 178 #define TC_BE           1       /* best effort traffic class */
 179 #define TC_CL           2       /* controlled load traffic class */
 180 #define TC_VO           3       /* voice traffic class */
 181 #define TC_NONE         -1      /* traffic class none */
 182
 183 #define RX_Q0           0       /* receive DMA queue */
 184 #define NUMRXQ          1       /* gmac has one rx queue */
 185
 186 #define TX_Q0           TC_BK   /* DMA txq 0 */
 187 #define TX_Q1           TC_BE   /* DMA txq 1 */
 188 #define TX_Q2           TC_CL   /* DMA txq 2 */
 189 #define TX_Q3           TC_VO   /* DMA txq 3 */
 190
 191 static inline uint32
 192 etc_up2tc(uint32 up)
 193 {
 194         extern uint32 up2tc[];
 195
 196         return (up2tc[up]);
 197 }
 198
 199 static inline uint32
 200 etc_priq(uint32 txq_state)
 201 {
 202         extern uint32 priq_selector[];
 203
 204         return (priq_selector[txq_state]);
 205 }
 206
 207 /* rx header flags bits */
 208 #define RXH_FLAGS(etc, rxh) (((etc)->coreid == GMAC_CORE_ID) ? \
 209         (ltoh16(((bcmgmacrxh_t *)(rxh))->flags) & (GRXF_CRC | GRXF_OVF | GRXF_OVERSIZE)) : \
 210         (ltoh16(((bcmenetrxh_t *)(rxh))->flags) & (RXF_NO | RXF_RXER | RXF_CRC | RXF_OV)))
 211
 212 #define RXH_OVERSIZE(etc, rxh) (((etc)->coreid == GMAC_CORE_ID) ? \
 213         (ltoh16(((bcmgmacrxh_t *)(rxh))->flags) & GRXF_OVERSIZE) : FALSE)
 214
 215 #define RXH_CRC(etc, rxh) (((etc)->coreid == GMAC_CORE_ID) ? \
 216         (ltoh16(((bcmgmacrxh_t *)(rxh))->flags) & GRXF_CRC) : \
 217         (ltoh16(((bcmenetrxh_t *)(rxh))->flags) & RXF_CRC))
 218
 219 #define RXH_OVF(etc, rxh) (((etc)->coreid == GMAC_CORE_ID) ? \
 220         (ltoh16(((bcmgmacrxh_t *)(rxh))->flags) & GRXF_OVF) : \
 221         (ltoh16(((bcmenetrxh_t *)(rxh))->flags) & RXF_OV))
 222
 223 #define RXH_RXER(etc, rxh) (((etc)->coreid == GMAC_CORE_ID) ? \
 224         FALSE : (ltoh16(((bcmenetrxh_t *)(rxh))->flags) & RXF_RXER))
 225
 226 #define RXH_NO(etc, rxh) (((etc)->coreid == GMAC_CORE_ID) ? \
 227         FALSE : (ltoh16(((bcmenetrxh_t *)(rxh))->flags) & RXF_NO))
 228
 229 #ifdef  CFG_GMAC
 230 #define ET_GMAC(etc)    ((etc)->coreid == GMAC_CORE_ID)
 231 #else
 232 #define ET_GMAC(etc)    (0)
 233 #endif  /* CFG_GMAC */
 234
 235 /* exported prototypes */
 236 extern struct chops *etc_chipmatch(uint vendor, uint device);
 237 extern void *etc_attach(void *et, uint vendor, uint device, uint unit, void *dev, void *regsva);
 238 extern void etc_detach(etc_info_t *etc);
 239 extern void etc_reset(etc_info_t *etc);
 240 extern void etc_init(etc_info_t *etc, uint options);
 241 extern void etc_up(etc_info_t *etc);
 242 extern uint etc_down(etc_info_t *etc, int reset);
 243 extern int etc_ioctl(etc_info_t *etc, int cmd, void *arg);
 244 extern int etc_iovar(etc_info_t *etc, uint cmd, uint set, void *arg);
 245 extern void etc_promisc(etc_info_t *etc, uint on);
 246 extern void etc_qos(etc_info_t *etc, uint on);
 247 extern void etc_dump(etc_info_t *etc, struct bcmstrbuf *b);
 248 extern void etc_watchdog(etc_info_t *etc);
 249 extern uint etc_totlen(etc_info_t *etc, void *p);
 250
 251 #endif  /* _etc_h_ */