4 ; 1 : Address of register. $ is replaced by the instance index from the !agent line
5 ; 2 : Subinstance of subsystem (DMA chan within MAC), '*' if only one subinstance
6 ; 3 : Printing function name suffix (print_subsystem_suffix)
7 ; 4 : Description string
10 ; note: if you add new agents, add them at the *end* of this file.
11 ; If you don't do that, you'll need to rebuild all of the VAPI
12 ; diagnostics since the bitmask will be different.
17 A_MC_REGISTER($,R_MC_CONFIG) * NULL "Config"
18 A_MC_REGISTER($,R_MC_DRAMCMD) * NULL "DRAM Config"
19 A_MC_REGISTER($,R_MC_DRAMMODE) * NULL "DRAM Mode"
20 A_MC_REGISTER($,R_MC_TIMING1) * NULL "DRAM Timing #1"
21 A_MC_REGISTER($,R_MC_TIMING2) * NULL "DRAM Timing #2"
22 A_MC_REGISTER($,R_MC_CS_START) * NULL "CS Start
23 A_MC_REGISTER($,R_MC_CS_END) * NULL "CS End"
24 A_MC_REGISTER($,R_MC_CS_INTERLEAVE) * NULL "CS Interleave"
25 A_MC_REGISTER($,R_MC_CS0_ROW) * NULL "CS0 Rows"
26 A_MC_REGISTER($,R_MC_CS0_COL) * NULL "CS0 Columns"
27 A_MC_REGISTER($,R_MC_CS0_BA) * NULL "CS0 Banks"
28 A_MC_REGISTER($,R_MC_CS1_ROW) * NULL "CS1 Rows"
29 A_MC_REGISTER($,R_MC_CS1_COL) * NULL "CS1 Columns"
30 A_MC_REGISTER($,R_MC_CS1_BA) * NULL "CS1 Banks"
31 A_MC_REGISTER($,R_MC_CS2_ROW) * NULL "CS2 Rows"
32 A_MC_REGISTER($,R_MC_CS2_COL) * NULL "CS2 Columns"
33 A_MC_REGISTER($,R_MC_CS2_BA) * NULL "CS2 Banks"
34 A_MC_REGISTER($,R_MC_CS3_ROW) * NULL "CS3 Rows"
35 A_MC_REGISTER($,R_MC_CS3_COL) * NULL "CS3 Columns"
36 A_MC_REGISTER($,R_MC_CS3_BA) * NULL "CS3 Banks"
37 A_MC_REGISTER($,R_MC_CS_ATTR) * NULL "Attributes"
38 A_MC_REGISTER($,R_MC_TEST_DATA) * NULL "ECC Test Data"
39 A_MC_REGISTER($,R_MC_TEST_ECC) * NULL "ECC Test"
40 A_MC_REGISTER($,R_MC_MCLK_CFG) * NULL "MCLK Config"
44 A_L2_READ_TAG * NULL "Read Tag"
45 A_L2_ECC_TAG * NULL "ECC Tag"
46 A_L2_READ_MISC * NULL "Read Misc (pass3+/112x)"
50 A_MAC_DMA_REGISTER($,DMA_TX,0,R_MAC_DMA_CONFIG0) TX0 NULL "Config 0"
51 A_MAC_DMA_REGISTER($,DMA_TX,0,R_MAC_DMA_CONFIG1) TX0 NULL "Config 1"
52 A_MAC_DMA_REGISTER($,DMA_TX,0,R_MAC_DMA_DSCR_BASE) TX0 NULL "Descriptor Base"
53 A_MAC_DMA_REGISTER($,DMA_TX,0,R_MAC_DMA_DSCR_CNT) TX0 NULL "Descriptor Count"
54 A_MAC_DMA_REGISTER($,DMA_TX,0,R_MAC_DMA_CUR_DSCRA) TX0 NULL "Cur DSCR_A"
55 A_MAC_DMA_REGISTER($,DMA_TX,0,R_MAC_DMA_CUR_DSCRB) TX0 NULL "Cur DSCR_B"
56 A_MAC_DMA_REGISTER($,DMA_TX,0,R_MAC_DMA_CUR_DSCRADDR) TX0 NULL "Cur Dscr Addr"
58 A_MAC_DMA_REGISTER($,DMA_TX,1,R_MAC_DMA_CONFIG0) TX1 NULL "Config 0"
59 A_MAC_DMA_REGISTER($,DMA_TX,1,R_MAC_DMA_CONFIG1) TX1 NULL "Config 1"
60 A_MAC_DMA_REGISTER($,DMA_TX,1,R_MAC_DMA_DSCR_BASE) TX1 NULL "Descriptor Base"
61 A_MAC_DMA_REGISTER($,DMA_TX,1,R_MAC_DMA_DSCR_CNT) TX1 NULL "Descriptor Count"
62 A_MAC_DMA_REGISTER($,DMA_TX,1,R_MAC_DMA_CUR_DSCRA) TX1 NULL "Cur DSCR_A"
63 A_MAC_DMA_REGISTER($,DMA_TX,1,R_MAC_DMA_CUR_DSCRB) TX1 NULL "Cur DSCR_B"
64 A_MAC_DMA_REGISTER($,DMA_TX,1,R_MAC_DMA_CUR_DSCRADDR) TX1 NULL "Cur Dscr Addr"
66 A_MAC_DMA_REGISTER($,DMA_RX,0,R_MAC_DMA_CONFIG0) RX0 NULL "Config 0"
67 A_MAC_DMA_REGISTER($,DMA_RX,0,R_MAC_DMA_CONFIG1) RX0 NULL "Config 1"
68 A_MAC_DMA_REGISTER($,DMA_RX,0,R_MAC_DMA_DSCR_BASE) RX0 NULL "Descriptor Base"
69 A_MAC_DMA_REGISTER($,DMA_RX,0,R_MAC_DMA_DSCR_CNT) RX0 NULL "Descriptor Count"
70 A_MAC_DMA_REGISTER($,DMA_RX,0,R_MAC_DMA_CUR_DSCRA) RX0 NULL "Cur DSCR_A"
71 A_MAC_DMA_REGISTER($,DMA_RX,0,R_MAC_DMA_CUR_DSCRB) RX0 NULL "Cur DSCR_B"
72 A_MAC_DMA_REGISTER($,DMA_RX,0,R_MAC_DMA_CUR_DSCRADDR) RX0 NULL "Cur Dscr Addr"
74 A_MAC_DMA_REGISTER($,DMA_RX,1,R_MAC_DMA_CONFIG0) RX1 NULL "Config 0"
75 A_MAC_DMA_REGISTER($,DMA_RX,1,R_MAC_DMA_CONFIG1) RX1 NULL "Config 1"
76 A_MAC_DMA_REGISTER($,DMA_RX,1,R_MAC_DMA_DSCR_BASE) RX1 NULL "Descriptor Base"
77 A_MAC_DMA_REGISTER($,DMA_RX,1,R_MAC_DMA_DSCR_CNT) RX1 NULL "Descriptor Count"
78 A_MAC_DMA_REGISTER($,DMA_RX,1,R_MAC_DMA_CUR_DSCRA) RX1 NULL "Cur DSCR_A"
79 A_MAC_DMA_REGISTER($,DMA_RX,1,R_MAC_DMA_CUR_DSCRB) RX1 NULL "Cur DSCR_B"
80 A_MAC_DMA_REGISTER($,DMA_RX,1,R_MAC_DMA_CUR_DSCRADDR) RX1 NULL "Cur Dscr Addr"
85 A_MAC_REGISTER($,R_MAC_RMON_TX_BYTES) * NULL "RMON TX Bytes"
86 A_MAC_REGISTER($,R_MAC_RMON_COLLISIONS) * NULL "RMON Collisions"
87 A_MAC_REGISTER($,R_MAC_RMON_LATE_COL) * NULL "RMON Late Coll"
88 A_MAC_REGISTER($,R_MAC_RMON_EX_COL) * NULL "RMON Excess Coll"
89 A_MAC_REGISTER($,R_MAC_RMON_FCS_ERROR) * NULL "RMON FCS Error"
90 A_MAC_REGISTER($,R_MAC_RMON_TX_ABORT) * NULL "RMON TX Abort"
91 A_MAC_REGISTER($,R_MAC_RMON_TX_BAD) * NULL "RMON TX Bad"
92 A_MAC_REGISTER($,R_MAC_RMON_TX_GOOD) * NULL "RMON TX Good"
93 A_MAC_REGISTER($,R_MAC_RMON_TX_RUNT) * NULL "RMON TX Runt"
94 A_MAC_REGISTER($,R_MAC_RMON_TX_OVERSIZE) * NULL "RMON TX Oversize"
95 A_MAC_REGISTER($,R_MAC_RMON_RX_BYTES) * NULL "RMON RX Bytes"
96 A_MAC_REGISTER($,R_MAC_RMON_RX_MCAST) * NULL "RMON RX Mcast"
97 A_MAC_REGISTER($,R_MAC_RMON_RX_BCAST) * NULL "RMON RX Bcast"
98 A_MAC_REGISTER($,R_MAC_RMON_RX_BAD) * NULL "RMON RX Bad"
99 A_MAC_REGISTER($,R_MAC_RMON_RX_GOOD) * NULL "RMON RX Good"
100 A_MAC_REGISTER($,R_MAC_RMON_RX_RUNT) * NULL "RMON RX Runt"
101 A_MAC_REGISTER($,R_MAC_RMON_RX_OVERSIZE) * NULL "RMON RX Oversize"
102 A_MAC_REGISTER($,R_MAC_RMON_RX_FCS_ERROR) * NULL "RMON RX FCS Error"
103 A_MAC_REGISTER($,R_MAC_RMON_RX_LENGTH_ERROR) * NULL "RMON RX Length Error"
104 A_MAC_REGISTER($,R_MAC_RMON_RX_CODE_ERROR) * NULL "RMON RX Code Error"
105 A_MAC_REGISTER($,R_MAC_RMON_RX_ALIGN_ERROR) * NULL "RMON RX Align Error"
109 A_MAC_REGISTER($,R_MAC_CFG) * NULL "MAC Config"
110 A_MAC_REGISTER($,R_MAC_THRSH_CFG) * NULL "MAC Thresh Config"
111 A_MAC_REGISTER($,R_MAC_VLANTAG) * NULL "VLAN Tag"
112 A_MAC_REGISTER($,R_MAC_FRAMECFG) * NULL "Frame Config"
113 A_MAC_REGISTER($,R_MAC_EOPCNT) * NULL "EOP Count"
114 A_MAC_REGISTER($,R_MAC_FIFO_PTRS) * NULL "FIFO Pointers"
115 A_MAC_REGISTER($,R_MAC_ADFILTER_CFG) * NULL "Address Filter"
116 A_MAC_REGISTER($,R_MAC_ETHERNET_ADDR) * NULL "Ethernet Addr"
117 A_MAC_REGISTER($,R_MAC_PKT_TYPE) * NULL "Packet Type"
118 A_MAC_REGISTER($,R_MAC_HASH_BASE+0) * NULL "Hash 0"
119 A_MAC_REGISTER($,R_MAC_HASH_BASE+8) * NULL "Hash 1"
120 A_MAC_REGISTER($,R_MAC_HASH_BASE+16) * NULL "Hash 2"
121 A_MAC_REGISTER($,R_MAC_HASH_BASE+24) * NULL "Hash 3"
122 A_MAC_REGISTER($,R_MAC_HASH_BASE+32) * NULL "Hash 4"
123 A_MAC_REGISTER($,R_MAC_HASH_BASE+40) * NULL "Hash 5"
124 A_MAC_REGISTER($,R_MAC_HASH_BASE+48) * NULL "Hash 6"
125 A_MAC_REGISTER($,R_MAC_HASH_BASE+56) * NULL "Hash 7"
126 A_MAC_REGISTER($,R_MAC_ADDR_BASE+0) * NULL "Addr 0"
127 A_MAC_REGISTER($,R_MAC_ADDR_BASE+8) * NULL "Addr 1"
128 A_MAC_REGISTER($,R_MAC_ADDR_BASE+16) * NULL "Addr 2"
129 A_MAC_REGISTER($,R_MAC_ADDR_BASE+24) * NULL "Addr 3"
130 A_MAC_REGISTER($,R_MAC_ADDR_BASE+32) * NULL "Addr 4"
131 A_MAC_REGISTER($,R_MAC_ADDR_BASE+40) * NULL "Addr 5"
132 A_MAC_REGISTER($,R_MAC_ADDR_BASE+48) * NULL "Addr 6"
133 A_MAC_REGISTER($,R_MAC_ADDR_BASE+56) * NULL "Addr 7"
134 A_MAC_REGISTER($,R_MAC_CHLO0_BASE+0) * NULL "CHLO 0"
135 A_MAC_REGISTER($,R_MAC_CHLO0_BASE+8) * NULL "CHLO 1"
136 A_MAC_REGISTER($,R_MAC_CHLO0_BASE+16) * NULL "CHLO 2"
137 A_MAC_REGISTER($,R_MAC_CHLO0_BASE+24) * NULL "CHLO 3"
138 A_MAC_REGISTER($,R_MAC_CHUP0_BASE+0) * NULL "CHUP 0"
139 A_MAC_REGISTER($,R_MAC_CHUP0_BASE+8) * NULL "CHUP 1"
140 A_MAC_REGISTER($,R_MAC_CHUP0_BASE+16) * NULL "CHUP 2"
141 A_MAC_REGISTER($,R_MAC_CHUP0_BASE+24) * NULL "CHUP 3"
142 A_MAC_REGISTER($,R_MAC_ENABLE) * NULL "MAC Enable"
143 A_MAC_REGISTER($,R_MAC_STATUS) * NULL "MAC Status"
144 A_MAC_REGISTER($,R_MAC_INT_MASK) * NULL "Interrupt Mask"
145 A_MAC_REGISTER($,R_MAC_TXD_CTL) * NULL "TXD Control"
146 A_MAC_REGISTER($,R_MAC_MDIO) * NULL "MDIO"
147 A_MAC_REGISTER($,R_MAC_DEBUG_STATUS) * NULL "Debug Status"
151 A_DUART_MODE_REG_1_A * NULL "Mode Register 1A"
152 A_DUART_MODE_REG_2_A * NULL "Mode Register 2A"
153 A_DUART_STATUS_A * NULL "Status A"
154 A_DUART_CLK_SEL_A * NULL "Clock Select A"
155 A_DUART_CMD_A * NULL "Command A"
156 A_DUART_RX_HOLD_A * NULL "RX Hold A"
157 A_DUART_TX_HOLD_A * NULL "TX Hold A"
159 A_DUART_MODE_REG_1_B * NULL "Mode Register 1B"
160 A_DUART_MODE_REG_2_B * NULL "Mode Register 2B"
161 A_DUART_STATUS_B * NULL "Status B"
162 A_DUART_CLK_SEL_B * NULL "Clock Select B"
163 A_DUART_CMD_B * NULL "Command B"
164 A_DUART_RX_HOLD_B * NULL "RX Hold B"
165 A_DUART_TX_HOLD_B * NULL "TX Hold B"
167 A_DUART_INPORT_CHNG * NULL "Input Port Change"
168 A_DUART_AUX_CTRL * NULL "Aux Control"
169 A_DUART_ISR_A * NULL "ISR A"
170 A_DUART_IMR_A * NULL "IMR A"
171 A_DUART_ISR_B * NULL "ISR B"
172 A_DUART_IMR_B * NULL "IMR B"
173 A_DUART_OUT_PORT * NULL "Output Port"
174 A_DUART_OPCR * NULL "OPCR"
175 A_DUART_IN_PORT * NULL "Input Port"
176 A_DUART_ISR * NULL "ISR Combined"
177 A_DUART_IMR * NULL "IMR Combined"
178 A_DUART_SET_OPR * NULL "Set output port"
179 A_DUART_CLEAR_OPR * NULL "Clear output port"
180 A_DUART_INPORT_CHNG_A * NULL "Input Port Change A"
181 A_DUART_INPORT_CHNG_B * NULL "Input Port Change B"
186 ; GENCS is done as a single instance to avoid using up mask bits
189 A_IO_EXT_REG(R_IO_EXT_REG(R_IO_EXT_CFG,0)) 0 NULL "Config"
190 A_IO_EXT_REG(R_IO_EXT_REG(R_IO_EXT_MULT_SIZE,0)) 0 NULL "Region Size"
191 A_IO_EXT_REG(R_IO_EXT_REG(R_IO_EXT_START_ADDR,0)) 0 NULL "Start Addr"
192 A_IO_EXT_REG(R_IO_EXT_REG(R_IO_EXT_TIME_CFG0,0)) 0 NULL "Time Config0"
193 A_IO_EXT_REG(R_IO_EXT_REG(R_IO_EXT_TIME_CFG1,0)) 0 NULL "Time Config1"
195 A_IO_EXT_REG(R_IO_EXT_REG(R_IO_EXT_CFG,1)) 1 NULL "Config"
196 A_IO_EXT_REG(R_IO_EXT_REG(R_IO_EXT_MULT_SIZE,1)) 1 NULL "Region Size"
197 A_IO_EXT_REG(R_IO_EXT_REG(R_IO_EXT_START_ADDR,1)) 1 NULL "Start Addr"
198 A_IO_EXT_REG(R_IO_EXT_REG(R_IO_EXT_TIME_CFG0,1)) 1 NULL "Time Config0"
199 A_IO_EXT_REG(R_IO_EXT_REG(R_IO_EXT_TIME_CFG1,1)) 1 NULL "Time Config1"
201 A_IO_EXT_REG(R_IO_EXT_REG(R_IO_EXT_CFG,2)) 2 NULL "Config"
202 A_IO_EXT_REG(R_IO_EXT_REG(R_IO_EXT_MULT_SIZE,2)) 2 NULL "Region Size"
203 A_IO_EXT_REG(R_IO_EXT_REG(R_IO_EXT_START_ADDR,2)) 2 NULL "Start Addr"
204 A_IO_EXT_REG(R_IO_EXT_REG(R_IO_EXT_TIME_CFG0,2)) 2 NULL "Time Config0"
205 A_IO_EXT_REG(R_IO_EXT_REG(R_IO_EXT_TIME_CFG1,2)) 2 NULL "Time Config1"
207 A_IO_EXT_REG(R_IO_EXT_REG(R_IO_EXT_CFG,3)) 3 NULL "Config"
208 A_IO_EXT_REG(R_IO_EXT_REG(R_IO_EXT_MULT_SIZE,3)) 3 NULL "Region Size"
209 A_IO_EXT_REG(R_IO_EXT_REG(R_IO_EXT_START_ADDR,3)) 3 NULL "Start Addr"
210 A_IO_EXT_REG(R_IO_EXT_REG(R_IO_EXT_TIME_CFG0,3)) 3 NULL "Time Config0"
211 A_IO_EXT_REG(R_IO_EXT_REG(R_IO_EXT_TIME_CFG1,3)) 3 NULL "Time Config1"
213 A_IO_EXT_REG(R_IO_EXT_REG(R_IO_EXT_CFG,4)) 4 NULL "Config"
214 A_IO_EXT_REG(R_IO_EXT_REG(R_IO_EXT_MULT_SIZE,4)) 4 NULL "Region Size"
215 A_IO_EXT_REG(R_IO_EXT_REG(R_IO_EXT_START_ADDR,4)) 4 NULL "Start Addr"
216 A_IO_EXT_REG(R_IO_EXT_REG(R_IO_EXT_TIME_CFG0,4)) 4 NULL "Time Config0"
217 A_IO_EXT_REG(R_IO_EXT_REG(R_IO_EXT_TIME_CFG1,4)) 4 NULL "Time Config1"
219 A_IO_EXT_REG(R_IO_EXT_REG(R_IO_EXT_CFG,5)) 5 NULL "Config"
220 A_IO_EXT_REG(R_IO_EXT_REG(R_IO_EXT_MULT_SIZE,5)) 5 NULL "Region Size"
221 A_IO_EXT_REG(R_IO_EXT_REG(R_IO_EXT_START_ADDR,5)) 5 NULL "Start Addr"
222 A_IO_EXT_REG(R_IO_EXT_REG(R_IO_EXT_TIME_CFG0,5)) 5 NULL "Time Config0"
223 A_IO_EXT_REG(R_IO_EXT_REG(R_IO_EXT_TIME_CFG1,5)) 5 NULL "Time Config1"
225 A_IO_EXT_REG(R_IO_EXT_REG(R_IO_EXT_CFG,6)) 6 NULL "Config"
226 A_IO_EXT_REG(R_IO_EXT_REG(R_IO_EXT_MULT_SIZE,6)) 6 NULL "Region Size"
227 A_IO_EXT_REG(R_IO_EXT_REG(R_IO_EXT_START_ADDR,6)) 6 NULL "Start Addr"
228 A_IO_EXT_REG(R_IO_EXT_REG(R_IO_EXT_TIME_CFG0,6)) 6 NULL "Time Config0"
229 A_IO_EXT_REG(R_IO_EXT_REG(R_IO_EXT_TIME_CFG1,6)) 6 NULL "Time Config1"
231 A_IO_EXT_REG(R_IO_EXT_REG(R_IO_EXT_CFG,7)) 7 NULL "Config"
232 A_IO_EXT_REG(R_IO_EXT_REG(R_IO_EXT_MULT_SIZE,7)) 7 NULL "Region Size"
233 A_IO_EXT_REG(R_IO_EXT_REG(R_IO_EXT_START_ADDR,7)) 7 NULL "Start Addr"
234 A_IO_EXT_REG(R_IO_EXT_REG(R_IO_EXT_TIME_CFG0,7)) 7 NULL "Time Config0"
235 A_IO_EXT_REG(R_IO_EXT_REG(R_IO_EXT_TIME_CFG1,7)) 7 NULL "Time Config1"
239 A_IO_INTERRUPT_STATUS * NULL "Interrupt Status"
240 A_IO_INTERRUPT_DATA0 * NULL "Interrupt Data0"
241 A_IO_INTERRUPT_DATA1 * NULL "Interrupt Data1"
242 A_IO_INTERRUPT_DATA2 * NULL "Interrupt Data2"
243 A_IO_INTERRUPT_DATA3 * NULL "Interrupt Data3"
244 A_IO_INTERRUPT_ADDR0 * NULL "Interrupt Addr0"
245 A_IO_INTERRUPT_ADDR1 * NULL "Interrupt Addr1"
246 A_IO_INTERRUPT_PARITY * NULL "Interrupt Parity"
247 A_IO_PCMCIA_CFG * NULL "PCMCIA Config"
248 A_IO_PCMCIA_STATUS * NULL "PCMCIA Status"
249 A_IO_DRIVE_0 * NULL "IO Drive 0"
250 A_IO_DRIVE_1 * NULL "IO Drive 1"
251 A_IO_DRIVE_2 * NULL "IO Drive 2"
252 A_IO_DRIVE_3 * NULL "IO Drive 3"
256 A_GPIO_CLR_EDGE * NULL "Clear Edge"
257 A_GPIO_INT_TYPE * NULL "Int Type"
258 A_GPIO_INPUT_INVERT * NULL "Input Invert"
259 A_GPIO_GLITCH * NULL "Glitch"
260 A_GPIO_READ * NULL "Read Data"
261 A_GPIO_DIRECTION * NULL "Direction"
262 A_GPIO_PIN_CLR * NULL "Pin Clear"
263 A_GPIO_PIN_SET * NULL "Pin Set"
268 A_SMB_REGISTER($,R_SMB_XTRA) * NULL "Extra"
269 A_SMB_REGISTER($,R_SMB_FREQ) * NULL "Frequency"
270 A_SMB_REGISTER($,R_SMB_STATUS) * NULL "Status"
271 A_SMB_REGISTER($,R_SMB_CMD) * NULL "Command"
272 A_SMB_REGISTER($,R_SMB_START) * NULL "Start"
273 A_SMB_REGISTER($,R_SMB_DATA) * NULL "Data"
274 A_SMB_REGISTER($,R_SMB_CONTROL) * NULL "Control"
275 A_SMB_REGISTER($,R_SMB_PEC) * NULL "PEC"
280 A_SCD_WDOG_INIT_0 WD0 NULL "Init"
281 A_SCD_WDOG_CNT_0 WD0 NULL "Count"
282 A_SCD_WDOG_CFG_0 WD0 NULL "Config"
284 A_SCD_WDOG_INIT_1 WD1 NULL "Init"
285 A_SCD_WDOG_CNT_1 WD1 NULL "Count"
286 A_SCD_WDOG_CFG_1 WD1 NULL "Config"
288 A_SCD_TIMER_INIT_0 TMR0 NULL "Init"
289 A_SCD_TIMER_CNT_0 TMR0 NULL "Count"
290 A_SCD_TIMER_CFG_0 TMR0 NULL "Config"
292 A_SCD_TIMER_INIT_1 TMR1 NULL "Init"
293 A_SCD_TIMER_CNT_1 TMR1 NULL "Count"
294 A_SCD_TIMER_CFG_1 TMR1 NULL "Config"
296 A_SCD_TIMER_INIT_2 TMR2 NULL "Init"
297 A_SCD_TIMER_CNT_2 TMR2 NULL "Count"
298 A_SCD_TIMER_CFG_2 TMR2 NULL "Config"
300 A_SCD_TIMER_INIT_3 TMR3 NULL "Init"
301 A_SCD_TIMER_CNT_3 TMR3 NULL "Count"
302 A_SCD_TIMER_CFG_3 TMR3 NULL "Config"
306 A_SCD_SYSTEM_REVISION * NULL "System Revision"
307 A_SCD_SYSTEM_CFG * NULL "System Config"
308 A_SCD_PERF_CNT_CFG * NULL "Perf Cnt Config"
309 A_SCD_PERF_CNT_0 * NULL "Perf Counter 0"
310 A_SCD_PERF_CNT_1 * NULL "Perf Counter 1"
311 A_SCD_PERF_CNT_2 * NULL "Perf Counter 2"
312 A_SCD_PERF_CNT_3 * NULL "Perf Counter 3"
317 A_SCD_BUS_ERR_STATUS * NULL "Bus Err Status"
318 A_BUS_ERR_DATA_0 * NULL "Bus Err Data0"
319 A_BUS_ERR_DATA_1 * NULL "Bus Err Data1"
320 A_BUS_ERR_DATA_2 * NULL "Bus Err Data2"
321 A_BUS_ERR_DATA_3 * NULL "Bus Err Data3"
322 A_BUS_L2_ERRORS * NULL "Bus L2 Errors"
323 A_BUS_MEM_IO_ERRORS * NULL "Bus IOMEM Errors"
328 A_DM_REGISTER(0,R_DM_DSCR_BASE) 0 NULL "Descr Base"
329 A_DM_REGISTER(0,R_DM_DSCR_COUNT) 0 NULL "Descr Count"
330 A_DM_REGISTER(0,R_DM_CUR_DSCR_ADDR) 0 NULL "Descr Addr"
331 A_DM_REGISTER(0,R_DM_DSCR_BASE_DEBUG) 0 NULL "Descr Base Debug"
333 A_DM_REGISTER(1,R_DM_DSCR_BASE) 1 NULL "Descr Base"
334 A_DM_REGISTER(1,R_DM_DSCR_COUNT) 1 NULL "Descr Count"
335 A_DM_REGISTER(1,R_DM_CUR_DSCR_ADDR) 1 NULL "Descr Addr"
336 A_DM_REGISTER(1,R_DM_DSCR_BASE_DEBUG) 1 NULL "Descr Base Debug"
338 A_DM_REGISTER(2,R_DM_DSCR_BASE) 2 NULL "Descr Base"
339 A_DM_REGISTER(2,R_DM_DSCR_COUNT) 2 NULL "Descr Count"
340 A_DM_REGISTER(2,R_DM_CUR_DSCR_ADDR) 2 NULL "Descr Addr"
341 A_DM_REGISTER(2,R_DM_DSCR_BASE_DEBUG) 2 NULL "Descr Base Debug"
343 A_DM_REGISTER(3,R_DM_DSCR_BASE) 3 NULL "Descr Base"
344 A_DM_REGISTER(3,R_DM_DSCR_COUNT) 3 NULL "Descr Count"
345 A_DM_REGISTER(3,R_DM_CUR_DSCR_ADDR) 3 NULL "Descr Addr"
346 A_DM_REGISTER(3,R_DM_DSCR_BASE_DEBUG) 3 NULL "Descr Base Debug"
350 A_IMR_REGISTER($,R_IMR_INTERRUPT_DIAG) * NULL "Diag"
351 A_IMR_REGISTER($,R_IMR_INTERRUPT_MASK) * NULL "Mask"
352 A_IMR_REGISTER($,R_IMR_INTERRUPT_TRACE) * NULL "Trace"
353 A_IMR_REGISTER($,R_IMR_INTERRUPT_SOURCE_STATUS) * NULL "Source Status"
354 A_IMR_REGISTER($,R_IMR_LDT_INTERRUPT_SET) * NULL "LDT Interrupt Set"
355 A_IMR_REGISTER($,R_IMR_LDT_INTERRUPT) * NULL "LDT Interrupt"
356 A_IMR_REGISTER($,R_IMR_LDT_INTERRUPT_CLR) * NULL "LDT Interrupt Clear"
357 A_IMR_REGISTER($,R_IMR_MAILBOX_CPU) * NULL "Mailbox"
358 ; A_IMR_REGISTER($,R_IMR_ALIAS_MAILBOX_CPU) * NULL "Alias Mailbox"
359 A_IMR_REGISTER($,R_IMR_MAILBOX_SET_CPU) * NULL "Mailbox Set"
360 ; A_IMR_REGISTER($,R_IMR_ALIAS_MAILBOX_SET_CPU) * NULL "Alias Mailbox Set"
361 A_IMR_REGISTER($,R_IMR_MAILBOX_CLR_CPU) * NULL "Mailbox Clear"
362 A_IMR_REGISTER($,R_IMR_INTERRUPT_STATUS_BASE+0) * NULL "Status 0"
363 A_IMR_REGISTER($,R_IMR_INTERRUPT_STATUS_BASE+8) * NULL "Status 1"
364 A_IMR_REGISTER($,R_IMR_INTERRUPT_STATUS_BASE+16) * NULL "Status 2"
365 A_IMR_REGISTER($,R_IMR_INTERRUPT_STATUS_BASE+24) * NULL "Status 3"
366 A_IMR_REGISTER($,R_IMR_INTERRUPT_STATUS_BASE+32) * NULL "Status 4"
367 A_IMR_REGISTER($,R_IMR_INTERRUPT_STATUS_BASE+40) * NULL "Status 5"
368 A_IMR_REGISTER($,R_IMR_INTERRUPT_STATUS_BASE+48) * NULL "Status 6"
369 A_IMR_REGISTER($,R_IMR_INTERRUPT_STATUS_BASE+56) * NULL "Status 7"
371 ; What to do about these? 64 registers?
372 ; A_IMR_REGISTER($,R_IMR_INTERRUPT_MAP_BASE) * NULL ""
373 ; R_IMR_INTERRUPT_MAP_COUNT 64
378 ; Not implemented in functional sim
381 ; A_ADDR_TRAP_INDEX * NULL "Addr Trap Index"
382 ; A_ADDR_TRAP_REG * NULL "Addr Trap Reg"
383 ; A_ADDR_TRAP_UP_0 * NULL "Addr Trap UP0"
384 ; A_ADDR_TRAP_UP_1 * NULL "Addr Trap UP1"
385 ; A_ADDR_TRAP_UP_2 * NULL "Addr Trap UP2"
386 ; A_ADDR_TRAP_UP_3 * NULL "Addr Trap UP3"
387 ; A_ADDR_TRAP_DOWN_0 * NULL "Addr Trap DOWN0"
388 ; A_ADDR_TRAP_DOWN_1 * NULL "Addr Trap DOWN1"
389 ; A_ADDR_TRAP_DOWN_2 * NULL "Addr Trap DOWN2"
390 ; A_ADDR_TRAP_DOWN_3 * NULL "Addr Trap DOWN3"
391 ; A_ADDR_TRAP_CFG_0 * NULL "Addr Trap CFG0"
392 ; A_ADDR_TRAP_CFG_1 * NULL "Addr Trap CFG1"
393 ; A_ADDR_TRAP_CFG_2 * NULL "Addr Trap CFG2"
394 ; A_ADDR_TRAP_CFG_3 * NULL "Addr Trap CFG3"
398 ; Not implemented in functional simulator
401 ; A_SCD_TRACE_CFG * NULL "Trace Config"
402 ; A_SCD_TRACE_READ * NULL "Trace Read"
403 ; A_SCD_TRACE_EVENT_0 * NULL "Trace Event0"
404 ; A_SCD_TRACE_EVENT_1 * NULL "Trace Event1"
405 ; A_SCD_TRACE_EVENT_2 * NULL "Trace Event2"
406 ; A_SCD_TRACE_EVENT_3 * NULL "Trace Event3"
407 ; A_SCD_TRACE_EVENT_4 * NULL "Trace Event4"
408 ; A_SCD_TRACE_EVENT_5 * NULL "Trace Event5"
409 ; A_SCD_TRACE_EVENT_6 * NULL "Trace Event6"
410 ; A_SCD_TRACE_EVENT_7 * NULL "Trace Event7"
411 ; A_SCD_TRACE_SEQUENCE_0 * NULL "Trace Seq0"
412 ; A_SCD_TRACE_SEQUENCE_1 * NULL "Trace Seq1"
413 ; A_SCD_TRACE_SEQUENCE_2 * NULL "Trace Seq2"
414 ; A_SCD_TRACE_SEQUENCE_3 * NULL "Trace Seq3"
415 ; A_SCD_TRACE_SEQUENCE_4 * NULL "Trace Seq4"
416 ; A_SCD_TRACE_SEQUENCE_5 * NULL "Trace Seq5"
417 ; A_SCD_TRACE_SEQUENCE_6 * NULL "Trace Seq6"
418 ; A_SCD_TRACE_SEQUENCE_7 * NULL "Trace Seq7"
423 A_SER_REGISTER($,R_SER_MODE) * NULL "Mode Config"
424 A_SER_REGISTER($,R_SER_LINE_MODE) * NULL "Line Interface Mode"
425 ; A_SER_REGISTER($,R_SER_STATUS) * NULL "Status"
426 A_SER_REGISTER($,R_SER_STATUS_DEBUG) * NULL "Status"
427 A_SER_REGISTER($,R_SER_DMA_ENABLE) * NULL "DMA Enable"
428 A_SER_REGISTER($,R_SER_INT_MASK) * NULL "Interrupt Mask"
429 A_SER_REGISTER($,R_SER_MINFRM_SZ) * NULL "Minimum Frame Size"
430 A_SER_REGISTER($,R_SER_MAXFRM_SZ) * NULL "Maximum Frame Size"
431 A_SER_REGISTER($,R_SER_TX_RD_THRSH) * NULL "Tx Read Threshold"
432 A_SER_REGISTER($,R_SER_TX_WR_THRSH) * NULL "Tx Write Threshold"
433 A_SER_REGISTER($,R_SER_RX_RD_THRSH) * NULL "Rx Read Threshold"
434 A_SER_REGISTER($,R_SER_ADDR) * NULL "Address Mask"
435 A_SER_REGISTER($,R_SER_USR0_ADDR) * NULL "Address Match 0"
436 A_SER_REGISTER($,R_SER_USR1_ADDR) * NULL "Address Match 1"
437 A_SER_REGISTER($,R_SER_USR2_ADDR) * NULL "Address Match 2"
438 A_SER_REGISTER($,R_SER_USR3_ADDR) * NULL "Address Match 3"
440 A_SER_REGISTER($,R_SER_RX_TABLE_BASE+0) * NULL "Rx Sequencer 0"
441 A_SER_REGISTER($,R_SER_RX_TABLE_BASE+8) * NULL "Rx Sequencer 1"
442 A_SER_REGISTER($,R_SER_RX_TABLE_BASE+16) * NULL "Rx Sequencer 2"
443 A_SER_REGISTER($,R_SER_RX_TABLE_BASE+24) * NULL "Rx Sequencer 3"
444 A_SER_REGISTER($,R_SER_RX_TABLE_BASE+32) * NULL "Rx Sequencer 4"
445 A_SER_REGISTER($,R_SER_RX_TABLE_BASE+40) * NULL "Rx Sequencer 5"
446 A_SER_REGISTER($,R_SER_RX_TABLE_BASE+48) * NULL "Rx Sequencer 6"
447 A_SER_REGISTER($,R_SER_RX_TABLE_BASE+56) * NULL "Rx Sequencer 7"
448 A_SER_REGISTER($,R_SER_RX_TABLE_BASE+64) * NULL "Rx Sequencer 8"
449 A_SER_REGISTER($,R_SER_RX_TABLE_BASE+72) * NULL "Rx Sequencer 9"
450 A_SER_REGISTER($,R_SER_RX_TABLE_BASE+80) * NULL "Rx Sequencer 10"
451 A_SER_REGISTER($,R_SER_RX_TABLE_BASE+88) * NULL "Rx Sequencer 11"
452 A_SER_REGISTER($,R_SER_RX_TABLE_BASE+96) * NULL "Rx Sequencer 12"
453 A_SER_REGISTER($,R_SER_RX_TABLE_BASE+104) * NULL "Rx Sequencer 13"
454 A_SER_REGISTER($,R_SER_RX_TABLE_BASE+112) * NULL "Rx Sequencer 14"
455 A_SER_REGISTER($,R_SER_RX_TABLE_BASE+120) * NULL "Rx Sequencer 15"
457 A_SER_REGISTER($,R_SER_TX_TABLE_BASE+0) * NULL "Tx Sequencer 0"
458 A_SER_REGISTER($,R_SER_TX_TABLE_BASE+8) * NULL "Tx Sequencer 1"
459 A_SER_REGISTER($,R_SER_TX_TABLE_BASE+16) * NULL "Tx Sequencer 2"
460 A_SER_REGISTER($,R_SER_TX_TABLE_BASE+24) * NULL "Tx Sequencer 3"
461 A_SER_REGISTER($,R_SER_TX_TABLE_BASE+32) * NULL "Tx Sequencer 4"
462 A_SER_REGISTER($,R_SER_TX_TABLE_BASE+40) * NULL "Tx Sequencer 5"
463 A_SER_REGISTER($,R_SER_TX_TABLE_BASE+48) * NULL "Tx Sequencer 6"
464 A_SER_REGISTER($,R_SER_TX_TABLE_BASE+56) * NULL "Tx Sequencer 7"
465 A_SER_REGISTER($,R_SER_TX_TABLE_BASE+64) * NULL "Tx Sequencer 8"
466 A_SER_REGISTER($,R_SER_TX_TABLE_BASE+72) * NULL "Tx Sequencer 9"
467 A_SER_REGISTER($,R_SER_TX_TABLE_BASE+80) * NULL "Tx Sequencer 10"
468 A_SER_REGISTER($,R_SER_TX_TABLE_BASE+88) * NULL "Tx Sequencer 11"
469 A_SER_REGISTER($,R_SER_TX_TABLE_BASE+96) * NULL "Tx Sequencer 12"
470 A_SER_REGISTER($,R_SER_TX_TABLE_BASE+104) * NULL "Tx Sequencer 13"
471 A_SER_REGISTER($,R_SER_TX_TABLE_BASE+112) * NULL "Tx Sequencer 14"
472 A_SER_REGISTER($,R_SER_TX_TABLE_BASE+120) * NULL "Tx Sequencer 15"
477 A_SER_DMA_REGISTER($,DMA_TX,R_SER_DMA_CONFIG0) TX NULL "Config 0"
478 A_SER_DMA_REGISTER($,DMA_TX,R_SER_DMA_CONFIG1) TX NULL "Config 1"
479 A_SER_DMA_REGISTER($,DMA_TX,R_SER_DMA_DSCR_BASE) TX NULL "Descriptor Base"
480 A_SER_DMA_REGISTER($,DMA_TX,R_SER_DMA_DSCR_CNT) TX NULL "Descriptor Count"
481 A_SER_DMA_REGISTER($,DMA_TX,R_SER_DMA_CUR_DSCRA) TX NULL "Cur DSCR_A"
482 A_SER_DMA_REGISTER($,DMA_TX,R_SER_DMA_CUR_DSCRB) TX NULL "Cur DSCR_B"
483 A_SER_DMA_REGISTER($,DMA_TX,R_SER_DMA_CUR_DSCRADDR) TX NULL "Cur Dscr Addr"
485 A_SER_DMA_REGISTER($,DMA_RX,R_SER_DMA_CONFIG0) RX NULL "Config 0"
486 A_SER_DMA_REGISTER($,DMA_RX,R_SER_DMA_CONFIG1) RX NULL "Config 1"
487 A_SER_DMA_REGISTER($,DMA_RX,R_SER_DMA_DSCR_BASE) RX NULL "Descriptor Base"
488 A_SER_DMA_REGISTER($,DMA_RX,R_SER_DMA_DSCR_CNT) RX NULL "Descriptor Count"
489 A_SER_DMA_REGISTER($,DMA_RX,R_SER_DMA_CUR_DSCRA) RX NULL "Cur DSCR_A"
490 A_SER_DMA_REGISTER($,DMA_RX,R_SER_DMA_CUR_DSCRB) RX NULL "Cur DSCR_B"
491 A_SER_DMA_REGISTER($,DMA_RX,R_SER_DMA_CUR_DSCRADDR) RX NULL "Cur Dscr Addr"