release/src-rt/cfe/cfe/arch/mips/common/include/lib_physio.h

   1 /*  *********************************************************************
   2     *  Broadcom Common Firmware Environment (CFE)
   3     *
   4     *  Physical memory peek/poke routines       File: lib_physio.h
   5     *
   6     *  Little stub routines to allow access to arbitrary physical
   7     *  addresses.  In most cases this should not be needed, as
   8     *  many physical addresses are within kseg1, but this handles
   9     *  the cases that are not automagically, so we don't need
  10     *  to mess up the code with icky macros and such.
  11     *
  12     *  Author:  Mitch Lichtenberg (mpl@broadcom.com)
  13     *
  14     *********************************************************************
  15     *
  16     *  Copyright 2000,2001,2002,2003
  17     *  Broadcom Corporation. All rights reserved.
  18     *
  19     *  This software is furnished under license and may be used and
  20     *  copied only in accordance with the following terms and
  21     *  conditions.  Subject to these conditions, you may download,
  22     *  copy, install, use, modify and distribute modified or unmodified
  23     *  copies of this software in source and/or binary form.  No title
  24     *  or ownership is transferred hereby.
  25     *
  26     *  1) Any source code used, modified or distributed must reproduce
  27     *     and retain this copyright notice and list of conditions
  28     *     as they appear in the source file.
  29     *
  30     *  2) No right is granted to use any trade name, trademark, or
  31     *     logo of Broadcom Corporation.  The "Broadcom Corporation"
  32     *     name may not be used to endorse or promote products derived
  33     *     from this software without the prior written permission of
  34     *     Broadcom Corporation.
  35     *
  36     *  3) THIS SOFTWARE IS PROVIDED "AS-IS" AND ANY EXPRESS OR
  37     *     IMPLIED WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED
  38     *     WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
  39     *     PURPOSE, OR NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT
  40     *     SHALL BROADCOM BE LIABLE FOR ANY DAMAGES WHATSOEVER, AND IN
  41     *     PARTICULAR, BROADCOM SHALL NOT BE LIABLE FOR DIRECT, INDIRECT,
  42     *     INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  43     *     (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
  44     *     GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
  45     *     BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
  46     *     OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
  47     *     TORT (INCLUDING NEGLIGENCE OR OTHERWISE), EVEN IF ADVISED OF
  48     *     THE POSSIBILITY OF SUCH DAMAGE.
  49     ********************************************************************* */
  50
  51
  52 #ifndef _LIB_PHYSIO_H
  53 #define _LIB_PHYSIO_H
  54
  55 //#ifndef _SB_MIPS_H
  56 //#include "sbmips.h"
  57 //#endif
  58
  59 /*
  60  * If __long64 we can do this via macros.  Otherwise, call
  61  * the magic functions.
  62  */
  63
  64 #if __long64
  65
  66 typedef long physaddr_t;
  67 #define _PHYSADDR_T_DEFINED_
  68
  69 /*#define __UNCADDRX(x) PHYS_TO_XKSEG_UNCACHED(x)*/
  70 #define __UNCADDRX(x) (((physaddr_t)(x))|0x9000000000000000)
  71
  72
  73 #define phys_write8(a,b) *((volatile uint8_t *) __UNCADDRX(a)) = (b)
  74 #define phys_write16(a,b) *((volatile uint16_t *) __UNCADDRX(a)) = (b)
  75 #define phys_write32(a,b) *((volatile uint32_t *) __UNCADDRX(a)) = (b)
  76 #define phys_write64(a,b) *((volatile uint64_t *) __UNCADDRX(a)) = (b)
  77 #define phys_read8(a) *((volatile uint8_t *) __UNCADDRX(a))
  78 #define phys_read16(a) *((volatile uint16_t *) __UNCADDRX(a))
  79 #define phys_read32(a) *((volatile uint32_t *) __UNCADDRX(a))
  80 #define phys_read64(a) *((volatile uint64_t *) __UNCADDRX(a))
  81
  82 #else   /* not __long64 */
  83
  84 #ifdef _MIPSREGS32_
  85
  86 #include "addrspace.h"
  87
  88 typedef long physaddr_t;        /* 32-bit-only processors can't have >32bit pa's */
  89
  90 #if defined(__MIPSEB) && defined(_MIPSEB_DATA_INVARIANT_)
  91 /*
  92  * Most of the time, address bits matter. If endianness is
  93  * implemented by swapping address lines on the way out the CPU,
  94  * defeat this mechanism.
  95  */
  96 #ifdef  BCMHND74K
  97
  98 #define phys_write8(a,b) do { *((volatile uint8_t *) PHYS_TO_K1(((physaddr_t)(a))^7)) = (b); } while (0)
  99 #define phys_write16(a,b) do { *((volatile uint16_t *) PHYS_TO_K1(((physaddr_t)(a))^6)) = (b); } while (0)
 100 #define phys_write32(a,b) do { *((volatile uint32_t *) PHYS_TO_K1(((physaddr_t)(a))^4)) = (b); } while (0)
 101 #define phys_read8(a) (*((volatile uint8_t *) PHYS_TO_K1(((physaddr_t)(a))^7)))
 102 #define phys_read16(a) (*((volatile uint16_t *) PHYS_TO_K1(((physaddr_t)(a))^6)))
 103 #define phys_read32(a) (*((volatile uint32_t *) PHYS_TO_K1(((physaddr_t)(a))^4)))
 104
 105 #else   /* Not 74k: bcm33xx */
 106
 107 #define phys_write8(a,b) do { *((volatile uint8_t *) PHYS_TO_K1(((physaddr_t)(a))^3)) = (b); } while (0)
 108 #define phys_write16(a,b) do { *((volatile uint16_t *) PHYS_TO_K1(((physaddr_t)(a))^2)) = (b); } while (0)
 109 #define phys_write32(a,b) do { *((volatile uint32_t *) PHYS_TO_K1((physaddr_t)(a))) = (b); } while (0)
 110 #define phys_read8(a) (*((volatile uint8_t *) PHYS_TO_K1(((physaddr_t)(a))^3)))
 111 #define phys_read16(a) (*((volatile uint16_t *) PHYS_TO_K1(((physaddr_t)(a))^2)))
 112 #define phys_read32(a) (*((volatile uint32_t *) PHYS_TO_K1((physaddr_t)(a))))
 113
 114 #endif  /* BCMHND74K */
 115
 116 #else   /* sane endianness */
 117
 118 #define phys_write8(a,b) do { *((volatile uint8_t *) PHYS_TO_K1((physaddr_t)(a))) = (b); } while (0)
 119 #define phys_write16(a,b) do { *((volatile uint16_t *) PHYS_TO_K1((physaddr_t)(a))) = (b); } while (0)
 120 #define phys_write32(a,b) do { *((volatile uint32_t *) PHYS_TO_K1((physaddr_t)(a))) = (b); } while (0)
 121 #define phys_read8(a) (*((volatile uint8_t *) PHYS_TO_K1((physaddr_t)(a))))
 122 #define phys_read16(a) (*((volatile uint16_t *) PHYS_TO_K1((physaddr_t)(a))))
 123 #define phys_read32(a) (*((volatile uint32_t *) PHYS_TO_K1((physaddr_t)(a))))
 124
 125 #endif
 126
 127 #else   /* not _MIPSREGS32_ */
 128
 129 typedef long long physaddr_t;   /* Otherwise, they might. */
 130
 131 extern void phys_write8(physaddr_t a,uint8_t b);
 132 extern void phys_write16(physaddr_t a,uint16_t b);
 133 extern void phys_write32(physaddr_t a,uint32_t b);
 134 extern void phys_write64(physaddr_t a,uint64_t b);
 135 extern uint8_t phys_read8(physaddr_t a);
 136 extern uint16_t phys_read16(physaddr_t a);
 137 extern uint32_t phys_read32(physaddr_t a);
 138 extern uint64_t phys_read64(physaddr_t a);
 139
 140 #endif
 141
 142 #endif
 143
 144 #endif