release/src-rt/cfe/cfe/arch/mips/board/bcm91125e/src/bcm91125e_devs.c

   1 /*  *********************************************************************
   2     *  Broadcom Common Firmware Environment (CFE)
   3     *
   4     *  Board device initialization              File: bcm91125e_devs.c
   5     *
   6     *  This is the "C" part of the board support package.  The
   7     *  routines to create and initialize the console, wire up
   8     *  device drivers, and do other customization live here.
   9     *
  10     *  Author:  Mitch Lichtenberg (mpl@broadcom.com)
  11     *
  12     *********************************************************************
  13     *
  14     *  Copyright 2000,2001,2002,2003
  15     *  Broadcom Corporation. All rights reserved.
  16     *
  17     *  This software is furnished under license and may be used and
  18     *  copied only in accordance with the following terms and
  19     *  conditions.  Subject to these conditions, you may download,
  20     *  copy, install, use, modify and distribute modified or unmodified
  21     *  copies of this software in source and/or binary form.  No title
  22     *  or ownership is transferred hereby.
  23     *
  24     *  1) Any source code used, modified or distributed must reproduce
  25     *     and retain this copyright notice and list of conditions
  26     *     as they appear in the source file.
  27     *
  28     *  2) No right is granted to use any trade name, trademark, or
  29     *     logo of Broadcom Corporation.  The "Broadcom Corporation"
  30     *     name may not be used to endorse or promote products derived
  31     *     from this software without the prior written permission of
  32     *     Broadcom Corporation.
  33     *
  34     *  3) THIS SOFTWARE IS PROVIDED "AS-IS" AND ANY EXPRESS OR
  35     *     IMPLIED WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED
  36     *     WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
  37     *     PURPOSE, OR NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT
  38     *     SHALL BROADCOM BE LIABLE FOR ANY DAMAGES WHATSOEVER, AND IN
  39     *     PARTICULAR, BROADCOM SHALL NOT BE LIABLE FOR DIRECT, INDIRECT,
  40     *     INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  41     *     (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
  42     *     GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
  43     *     BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
  44     *     OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
  45     *     TORT (INCLUDING NEGLIGENCE OR OTHERWISE), EVEN IF ADVISED OF
  46     *     THE POSSIBILITY OF SUCH DAMAGE.
  47     ********************************************************************* */
  48
  49
  50
  51 #include "sbmips.h"
  52 #include "lib_types.h"
  53 #include "lib_queue.h"
  54
  55 #include "lib_malloc.h"
  56 #include "lib_string.h"
  57
  58 #include "lib_printf.h"
  59 #include "cfe_iocb.h"
  60 #include "cfe_device.h"
  61 #include "cfe_timer.h"
  62 #include "env_subr.h"
  63 #include "cfe.h"
  64 #include "cfe_devfuncs.h"
  65
  66 #include "sb1250_defs.h"
  67 #include "sb1250_regs.h"
  68 #include "sb1250_scd.h"
  69 #include "sb1250_smbus.h"
  70 #include "sb1250_draminit.h"
  71 #include "sb1250_mac.h"
  72
  73 #include "bsp_config.h"
  74
  75 #include "bcm91125e.h"
  76
  77 #include "dev_newflash.h"
  78
  79 static int program_spd_eeprom(void);
  80
  81 /*  *********************************************************************
  82     *  Devices we're importing
  83     ********************************************************************* */
  84
  85 extern cfe_driver_t promice_uart;               /* promice serial port */
  86 extern cfe_driver_t sb1250_uart;                /* SB1250 serial ports */
  87 extern cfe_driver_t sb1250_ether;               /* SB1250 MACs */
  88
  89 extern cfe_driver_t newflashdrv;                /* AMD-style flash */
  90 extern cfe_driver_t flashdrv;                   /* AMD-style flash */
  91
  92 extern cfe_driver_t sb1250_24lc128eeprom;       /* Microchip EEPROM */
  93 extern cfe_driver_t m41t81_clock;               /* M41T81 SMBus RTC */
  94 extern cfe_driver_t sb1250_at24c02eeprom;       /* Atmel SPD EEPROM */
  95
  96 #if CFG_PCI
  97 extern void pci_add_devices(int init);          /* driver collection du jour */
  98 #endif
  99 extern cfe_driver_t sb1250_pcihost;             /* driver for host downloads */
 100
 101 /*  *********************************************************************
 102     *  Commands we're importing
 103     ********************************************************************* */
 104
 105 extern int ui_init_bcm91125ecmds(void);
 106 extern int ui_init_corecmds(void);
 107 extern int ui_init_soccmds(void);
 108 extern int ui_init_testcmds(void);
 109 extern int ui_init_resetcmds(void);
 110 extern int ui_init_phycmds(void);
 111 extern int ui_init_tempsensorcmds(void);
 112 extern int ui_init_toyclockcmds(void);
 113 extern int ui_init_memtestcmds(void);
 114 extern int ui_init_ethertestcmds(void);
 115 extern int ui_init_flashtestcmds(void);
 116 extern int ui_init_disktestcmds(void);
 117 extern int ui_init_spdcmds(void);
 118
 119 /*  *********************************************************************
 120     *  Some other stuff we use
 121     ********************************************************************* */
 122
 123 extern void sb1250_show_cpu_type(void);
 124 extern int cfe_device_download(int boot, char *options);
 125
 126 /*  *********************************************************************
 127     *  Some board-specific parameters
 128     ********************************************************************* */
 129
 130 /*
 131  * Note!  Configure the PROMICE for burst mode zero (one byte per
 132  * access).
 133  */
 134
 135 #define PROMICE_BASE    (0x1FDFFC00)
 136 #define PROMICE_WORDSIZE 1
 137
 138 #define REAL_BOOTROM_SIZE       (2*1024*1024)   /* region is 4MB, but rom is 2MB */
 139
 140 /*  *********************************************************************
 141     *  SysConfig switch settings and related parameters
 142     ********************************************************************* */
 143
 144 int board_rev;
 145 int config_switch;
 146
 147 #define UART_CONSOLE            0x00000000
 148 #define PROMICE_CONSOLE         0x00000001
 149 #define DEVICE_DOWNLOAD         0x00000002
 150 #define DEVICE_EXECUTE          0x00000004
 151 #define DEVICE_REBOOT           (DEVICE_DOWNLOAD|DEVICE_EXECUTE)
 152 #define PROGRAM_SPD             0x00000008
 153
 154 const unsigned int board_startflags[16] = {
 155     UART_CONSOLE,                                       /* 0 : UART console, no PCI */
 156     PROMICE_CONSOLE,                                    /* 1 : PromICE console, no PCI */
 157     CFE_INIT_PCI | UART_CONSOLE,                        /* 2 : UART console, PCI */
 158     CFE_INIT_PCI | PROMICE_CONSOLE,                     /* 3 : PromICE console, PCI */
 159     0,                                                  /* 4 : unused  */
 160     0,                                                  /* 5 : unused */
 161     CFE_INIT_PCI | CFE_LDT_SLAVE | UART_CONSOLE,        /* 6 : UART, PCI, HT slave mode */
 162     CFE_INIT_SAFE | UART_CONSOLE,                       /* 7 : UART console, no pci, safe mode */
 163     CFE_INIT_PCI | DEVICE_DOWNLOAD | UART_CONSOLE,      /* 8 : UART console, PCI, download */
 164     CFE_INIT_PCI | DEVICE_REBOOT | UART_CONSOLE,        /* 9 : UART console, PCI, reboot */
 165     0,                                                  /* 10 : unused */
 166     0,                                                  /* 11 : unused */
 167     0,                                                  /* 12 : unused */
 168     0,                                                  /* 13 : unused */
 169     PROGRAM_SPD | UART_CONSOLE,                         /* 14 : UART, program SPD EEPROM */
 170     0,                                                  /* 15 : unused */
 171 };
 172
 173 static int64_t blinky_timer;                    /* for blinky */
 174
 175 /*  *********************************************************************
 176     *  board_console_init()
 177     *
 178     *  Add the console device and set it to be the primary
 179     *  console.
 180     *
 181     *  Input parameters:
 182     *      nothing
 183     *
 184     *  Return value:
 185     *      nothing
 186     ********************************************************************* */
 187
 188 void board_console_init(void)
 189 {
 190     uint64_t syscfg;
 191     int plldiv;
 192
 193     syscfg = SBREADCSR(A_SCD_SYSTEM_CFG);
 194
 195     /* Console */
 196     cfe_add_device(&sb1250_uart,A_DUART,0,0);
 197     cfe_add_device(&promice_uart,PROMICE_BASE,PROMICE_WORDSIZE,0);
 198
 199     /*
 200      * Read the config switch and decide how we are going to set up
 201      * the console.  This is actually board revision dependent.
 202      */
 203     board_rev = G_SYS_CONFIG(syscfg) & 0x3;
 204     config_switch = (G_SYS_CONFIG(syscfg) >> 2) & 0x0F;
 205
 206     cfe_startflags = board_startflags[config_switch];
 207
 208     if (cfe_startflags & PROMICE_CONSOLE) {
 209         cfe_set_console("promice0");
 210         }
 211     else {
 212         cfe_set_console("uart0");
 213         }
 214
 215     /*
 216      * Set variable that contains CPU speed, spit out config register
 217      */
 218
 219     plldiv = G_SYS_PLL_DIV(syscfg);
 220     if (plldiv == 0) {
 221         plldiv = 6;
 222         }
 223
 224 #ifdef _FUNCSIM_
 225     cfe_cpu_speed = 500000;                     /* wire func sim at 500KHz */
 226 #else
 227     cfe_cpu_speed = 50000000 * plldiv;          /* use PLL divisor */
 228 #endif
 229
 230     /*
 231      * NVRAM (environment variables)
 232      */
 233
 234     cfe_add_device(&sb1250_24lc128eeprom,BIGEEPROM0_SMBUS_CHAN,BIGEEPROM0_SMBUS_DEV,0);
 235     cfe_add_device(&sb1250_24lc128eeprom,BIGEEPROM1_SMBUS_CHAN,BIGEEPROM1_SMBUS_DEV,0);
 236     cfe_set_envdevice("eeprom1");       /* Connect NVRAM to 2nd 24lc128 */
 237
 238 }
 239
 240 /*  *********************************************************************
 241     *  board_device_init()
 242     *
 243     *  Initialize and add other devices.  Add everything you need
 244     *  for bootstrap here, like disk drives, flash memory, UARTs,
 245     *  network controllers, etc.
 246     *
 247     *  Input parameters:
 248     *      nothing
 249     *
 250     *  Return value:
 251     *      nothing
 252     ********************************************************************* */
 253 #define WRITECSR(csr,val) *((volatile uint64_t *) (csr)) = (val)
 254 #define READCSR(csr) *((volatile uint64_t *) (csr))
 255 void board_device_init(void)
 256 {
 257
 258     uint64_t mac_mdio_1_genc;
 259
 260     /*
 261      * Print out the board version number.
 262      */
 263     printf("%s board revision %d\n", CFG_BOARDNAME,board_rev + 1);
 264
 265     /*
 266      * Boot ROM, using "new" flash driver
 267      */
 268     cfe_add_device(&newflashdrv,
 269                    BOOTROM_PHYS,
 270                    (BOOTROM_SIZE*K64) | FLASH_FLG_BUS8 | FLASH_FLG_DEV16,
 271                    NULL);
 272     cfe_add_device(&newflashdrv,
 273                    ALT_BOOTROM_PHYS,
 274                    (BOOTROM_SIZE*K64) | FLASH_FLG_BUS8 | FLASH_FLG_DEV16,
 275                    NULL);
 276
 277     /*
 278      * SPD EEPROM. This is used to store the type of memory soldered
 279      * onto the board. [eeprom2]
 280      */
 281
 282     cfe_add_device(&sb1250_at24c02eeprom,SPDEEPROM_SMBUS_CHAN,SPDEEPROM_SMBUS_DEV,0);
 283
 284     /*
 285      * MACs - must init after environment, since the hw address is stored there.
 286      *
 287      */
 288     cfe_add_device(&sb1250_ether,A_MAC_BASE_0,0,env_getenv("ETH0_HWADDR"));
 289     cfe_add_device(&sb1250_ether,A_MAC_BASE_1,1,env_getenv("ETH1_HWADDR"));
 290
 291     /*
 292      * MAC 1 on BCM91125E boards is mux'ed between the PHY and the mezz connector.
 293      * The genc bit on the mac_mdio_1 register determine the route.  High = PHY
 294      * Low = Mezz.
 295      *
 296      * Default to PHY
 297      */
 298     mac_mdio_1_genc = READCSR(PHYS_TO_K1(A_MAC_BASE_1+R_MAC_MDIO)) | M_MAC_GENC;
 299     WRITECSR(PHYS_TO_K1(A_MAC_BASE_1+R_MAC_MDIO),mac_mdio_1_genc);
 300
 301
 302 #if CFG_PCI
 303     pci_add_devices(cfe_startflags & CFE_INIT_PCI);
 304 #endif
 305
 306     /*
 307      * Real-time clock
 308      */
 309     cfe_add_device(&m41t81_clock,M41T81_SMBUS_CHAN,M41T81_SMBUS_DEV,0);
 310
 311     /*
 312      * Host download interface.
 313      */
 314     cfe_add_device(&sb1250_pcihost,0,0,NULL);
 315
 316     /*
 317      * Set variable that contains CPU speed, spit out config register
 318      */
 319
 320     printf("Config switch: %d\n", config_switch);
 321
 322     sb1250_show_cpu_type();
 323
 324 }
 325
 326
 327
 328 /*  *********************************************************************
 329     *  board_device_reset()
 330     *
 331     *  Reset devices.  This call is done when the firmware is restarted,
 332     *  as might happen when an operating system exits, just before the
 333     *  "reset" command is applied to the installed devices.   You can
 334     *  do whatever board-specific things are here to keep the system
 335     *  stable, like stopping DMA sources, interrupts, etc.
 336     *
 337     *  Input parameters:
 338     *      nothing
 339     *
 340     *  Return value:
 341     *      nothing
 342     ********************************************************************* */
 343
 344 void board_device_reset(void)
 345 {
 346     /*Nothing to do. */
 347 }
 348
 349
 350 /*  *********************************************************************
 351     *  board_blinkylight(arg)
 352     *
 353     *  Blink the LED once per second
 354     *
 355     *  Input parameters:
 356     *      arg - not used
 357     *
 358     *  Return value:
 359     *      nothing
 360     ********************************************************************* */
 361
 362 static void board_blinkylight(void *arg)
 363 {
 364     static int light = 0;
 365     intptr_t reg;
 366
 367     if (TIMER_EXPIRED(blinky_timer)) {
 368         light = !light;
 369         reg = light ? A_GPIO_PIN_SET : A_GPIO_PIN_CLR;
 370         WRITECSR(PHYS_TO_K1(reg),M_GPIO_DEBUG_LED);
 371         TIMER_SET(blinky_timer,CFE_HZ);
 372         }
 373 }
 374
 375 /*  *********************************************************************
 376     *  program_spd_eeprom()
 377     *
 378     *  Program the Atmel eeprom with SPD definitions
 379     *
 380     *  Input parameters:
 381     *      none
 382     *
 383     *  Return value:
 384     *      0 - success
 385     *     else - failure
 386     ********************************************************************* */
 387
 388 static int program_spd_eeprom(void)
 389 {
 390     unsigned char spd[JEDEC_SPD_MAX];
 391     int fh;
 392     int res;
 393
 394     memset(spd,0,JEDEC_SPD_MAX);
 395
 396     /*
 397      * 128MB on MC 1 (JEDEC SDRAM)
 398      * Samsung K4H561638B - 16Mx16 chips
 399      *
 400      * Minimum tMEMCLK: 8.0ns (125Mhz max freq)
 401      *
 402      * CS0 Geometry: 13 rows, 9 columns, 2 bankbits
 403      *
 404      * 64khz refresh, CAS Latency 2.5
 405      * Timing (ns):   tCK=7.50 tRAS=45 tRP=20.00 tRRD=15.0 tRCD=20.0 tRFC=auto tRC=auto
 406      *
 407      * Clock Config: Default
 408      */
 409
 410     spd[JEDEC_SPD_MEMTYPE] = JEDEC_MEMTYPE_DDRSDRAM2;
 411     spd[JEDEC_SPD_ROWS] = 0x0D;
 412     spd[JEDEC_SPD_COLS] = 0x09;
 413     spd[JEDEC_SPD_BANKS] = 0x04;
 414     spd[JEDEC_SPD_SIDES] = 0x01;
 415     spd[JEDEC_SPD_WIDTH] = 0x48;
 416
 417     spd[JEDEC_SPD_tCK25] = 0x75;
 418     spd[JEDEC_SPD_tCK20] = 0x00;
 419     spd[JEDEC_SPD_tCK10] = 0x00;
 420     spd[JEDEC_SPD_RFSH] = 0x82;
 421     spd[JEDEC_SPD_CASLATENCIES] = 0x08;
 422     spd[JEDEC_SPD_ATTRIBUTES] = 0x00;
 423     spd[JEDEC_SPD_tRAS] = 0x2D;
 424     spd[JEDEC_SPD_tRP] = 0x50;
 425     spd[JEDEC_SPD_tRRD] = 0x3C;
 426     spd[JEDEC_SPD_tRCD] = 0x50;
 427     spd[JEDEC_SPD_tRFC] = 0x00;
 428     spd[JEDEC_SPD_tRC] = 0x00;
 429
 430     fh = cfe_open("eeprom2");
 431     if (fh <= 0) {
 432         xprintf("Could not open device: %s\n",cfe_errortext(fh));
 433         xprintf("SPD EEPROM IS NOT PROGRAMMED\n");
 434         return fh;
 435         }
 436
 437     res = cfe_writeblk(fh,0,spd,JEDEC_SPD_MAX);
 438     if (res != JEDEC_SPD_MAX) {
 439         xprintf("Could not write to device: %s\n",cfe_errortext(fh));
 440         xprintf("SPD EEPROM IS NOT PROGRAMMED\n");
 441         return fh;
 442         }
 443
 444     xprintf("SPD EEPROM programmed at SMBus chan: %d addr: 0x%x\n\n",SPDEEPROM_SMBUS_CHAN,
 445             SPDEEPROM_SMBUS_DEV);
 446
 447     cfe_close(fh);
 448
 449     return 0;
 450 }
 451
 452 /*  *********************************************************************
 453     *  board_final_init()
 454     *
 455     *  Do any final initialization, such as adding commands to the
 456     *  user interface.
 457     *
 458     *  If you don't want a user interface, put the startup code here.
 459     *  This routine is called just before CFE starts its user interface.
 460     *
 461     *  Input parameters:
 462     *      nothing
 463     *
 464     *  Return value:
 465     *      nothing
 466     ********************************************************************* */
 467
 468 void board_final_init(void)
 469 {
 470     ui_init_bcm91125ecmds();
 471     ui_init_corecmds();
 472     ui_init_soccmds();
 473     ui_init_testcmds();
 474     ui_init_resetcmds();
 475     ui_init_tempsensorcmds();
 476     ui_init_toyclockcmds();
 477     ui_init_memtestcmds();
 478     ui_init_phycmds();
 479     ui_init_ethertestcmds();
 480     ui_init_flashtestcmds();
 481     ui_init_disktestcmds();
 482     ui_init_spdcmds();
 483
 484     cfe_bg_add(board_blinkylight,NULL);
 485     TIMER_SET(blinky_timer,CFE_HZ);
 486
 487     if (cfe_startflags & DEVICE_DOWNLOAD) {
 488         cfe_device_download((cfe_startflags & DEVICE_EXECUTE), "");
 489         }
 490
 491     /*
 492      * Program SPD EEPROM
 493      */
 494     if (cfe_startflags & PROGRAM_SPD) {
 495         program_spd_eeprom();
 496         }
 497 }