Resync with broadcom drivers 5.100.138.20 and utilities.
[tomato.git] / release / src-rt / include / nflash.h
blob11ea315ad5744cabeb85aa9129a14d0be3d9b9c0
1 /*
2 * Broadcom chipcommon NAND flash interface
4 * Copyright (C) 2010, Broadcom Corporation. All Rights Reserved.
5 *
6 * Permission to use, copy, modify, and/or distribute this software for any
7 * purpose with or without fee is hereby granted, provided that the above
8 * copyright notice and this permission notice appear in all copies.
9 *
10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
13 * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
15 * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
16 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18 * $Id: nflash.h,v 13.3.2.3 2010-10-13 04:00:31 Exp $
21 #ifndef _nflash_h_
22 #define _nflash_h_
24 #ifndef _LANGUAGE_ASSEMBLY
25 #include <typedefs.h>
26 #include <sbchipc.h>
27 #endif /* _LANGUAGE_ASSEMBLY */
29 /* Nand flash AC timing (in unit of ns) for BCM4706 (rev 31) */
30 #define NFLASH_T_WP 15
31 #define NFLASH_T_RR 20
32 #define NFLASH_T_CS 25
33 #define NFLASH_T_WH 10
34 #define NFLASH_T_WB 100
36 #define nflash_ns_to_cycle(ns, clk) (((ns*1000*clk)/1000000) + 1)
38 /* Bits definition in nflash_ctrl register for BCM4706 (rev 31) */
39 #define NFC_OP0 0x000000ff
40 #define NFC_OP1 0x0000ff00
41 #define NFC_CMD0 0x00010000
42 #define NFC_COL 0x00020000
43 #define NFC_ROW 0x00040000
44 #define NFC_CMD1W 0x00080000
45 #define NFC_DREAD 0x00100000
46 #define NFC_DWRITE 0x00200000
47 #define NFC_SPECADDR 0x01000000
48 #define NFC_RDYBUSY 0x04000000
49 #define NFC_ERROR 0x08000000
50 #define NFC_BCOUNT 0x30000000
51 #define NFC_1BYTE 0x00000000
52 #define NFC_2BYTES 0x10000000
53 #define NFC_3BYTES 0x20000000
54 #define NFC_4BYTES 0x30000000
55 #define NFC_CSA 0x40000000
56 #define NFC_START 0x80000000
58 /* nflash control command for BCM4706 */
59 #define NFCTRL_ID 0x0090
60 #define NFCTRL_STATUS 0x0070
61 #define NFCTRL_RESET 0xff00
62 #define NFCTRL_READ 0x3000
63 #define NFCTRL_PAGEPROG 0x0080
64 #define NFCTRL_PROGSTART 0x0010
65 #define NFCTRL_ERASE 0xd060
66 #define NFCTRL_RDCOL 0xe005
67 #define NFCTRL_WRCOL 0x0085
68 #define NFCTRL_RDCACHERND 0x3100
69 #define NFCTRL_RDCACHESEQ 0x0031
70 #define NFCTRL_RDCACHEEND 0x003f
71 #define NFCTRL_CACHEPROG 0x1580
72 #define NFCTRL_COPYBACKRD 0x3500
73 #define NFCTRL_COPYBACKPGM 0x1085
75 /* Bits definition in nflash_config for BCM4706 (rev 31) */
76 #define NFCF_DS_MASK 1
77 #define NFCF_DS_8 0
78 #define NFCF_DS_16 1
79 #define NFCF_WE 2
80 #define NFCF_COLSZ_MASK 0x30
81 #define NFCF_COLSZ_SHIFT 4
82 #define NFCF_ROWSZ_MASK 0xc0
83 #define NFCF_ROWSZ_SHIFT 6
85 /* Bits definition in nflash_waitcnt0 register for BCM4706 (rev 31) */
86 #define NFLASH_WAITCOUNT_W0_SHIFT 0
87 #define NFLASH_WAITCOUNT_W0_MASK 0x3f
88 #define NFLASH_WAITCOUNT_W1_SHIFT 6
89 #define NFLASH_WAITCOUNT_W1_MASK 0xfc0
90 #define NFLASH_WAITCOUNT_W2_SHIFT 12
91 #define NFLASH_WAITCOUNT_W2_MASK 0x3f000
92 #define NFLASH_WAITCOUNT_W3_SHIFT 18
93 #define NFLASH_WAITCOUNT_W3_MASK 0xfc0000
94 #define NFLASH_WAITCOUNT_W4_SHIFT 24
95 #define NFLASH_WAITCOUNT_W4_MASK 0x3f000000
97 /* nand_cmd_start commands */
98 #define NCMD_NULL 0
99 #define NCMD_PAGE_RD 1
100 #define NCMD_SPARE_RD 2
101 #define NCMD_STATUS_RD 3
102 #define NCMD_PAGE_PROG 4
103 #define NCMD_SPARE_PROG 5
104 #define NCMD_COPY_BACK 6
105 #define NCMD_ID_RD 7
106 #define NCMD_BLOCK_ERASE 8
107 #define NCMD_FLASH_RESET 9
108 #define NCMD_LOCK 0xa
109 #define NCMD_LOCK_DOWN 0xb
110 #define NCMD_UNLOCK 0xc
111 #define NCMD_LOCK_STATUS 0xd
113 /* nand_acc_control */
114 #define NAC_RD_ECC_EN 0x80000000
115 #define NAC_WR_ECC_EN 0x40000000
116 #define NAC_RD_ECC_BLK0_EN 0x20000000
117 #define NAC_FAST_PGM_RDIN 0x10000000
118 #define NAC_RD_ERASED_ECC_EN 0x08000000
119 #define NAC_PARTIAL_PAGE_EN 0x04000000
120 #define NAC_PAGE_HIT_EN 0x01000000
121 #define NAC_ECC_LEVEL0_MASK 0x00f00000
122 #define NAC_ECC_LEVEL0_SHIFT 20
123 #define NAC_ECC_LEVEL_MASK 0x000f0000
124 #define NAC_ECC_LEVEL_SHIFT 16
125 #define NAC_SPARE_SIZE0 0x00003f00
126 #define NAC_SPARE_SIZE 0x0000003f
128 /* nand_config */
129 #define NCF_CONFIG_LOCK 0x80000000
130 #define NCF_BLOCK_SIZE_MASK 0x70000000
131 #define NCF_BLOCK_SIZE_SHIFT 28
132 #define NCF_DEVICE_SIZE_MASK 0x0f000000
133 #define NCF_DEVICE_SIZE_SHIFT 24
134 #define NCF_DEVICE_WIDTH 0x00800000
135 #define NCF_PAGE_SIZE_MASK 0x00300000
136 #define NCF_PAGE_SIZE_SHIFT 20
137 #define NCF_FULL_ADDR_BYTES_MASK 0x00070000
138 #define NCF_FULL_ADDR_BYTES_SHIFT 16
139 #define NCF_COL_ADDR_BYTES_MASK 0x00007000
140 #define NCF_COL_ADDR_BYTES_SHIFT 12
141 #define NCF_BLK_ADDR_BYTES_MASK 0x00000700
142 #define NCF_BLK_ADDR_BYTES_SHIFT 8
144 /* nand_intfc_status */
145 #define NIST_CTRL_READY 0x80000000
146 #define NIST_FLASH_READY 0x40000000
147 #define NIST_CACHE_VALID 0x20000000
148 #define NIST_SPARE_VALID 0x10000000
149 #define NIST_ERASED 0x08000000
150 #define NIST_STATUS 0x000000ff
152 #define NFL_VENDOR_AMD 0x01
153 #define NFL_VENDOR_NUMONYX 0x20
154 #define NFL_VENDOR_MICRON 0x2C
155 #define NFL_VENDOR_TOSHIBA 0x98
156 #define NFL_VENDOR_HYNIX 0xAD
157 #define NFL_VENDOR_SAMSUNG 0xEC
159 #define NFL_SECTOR_SIZE 512
161 #define NFL_TABLE_END 0xffffffff
162 #define NFL_BOOT_SIZE 0x200000
163 #define NFL_BOOT_OS_SIZE 0x2000000
164 #define NFL_BBT_SIZE 0x100000
166 #ifndef _LANGUAGE_ASSEMBLY
168 struct nflash {
169 uint blocksize; /* Block size */
170 uint pagesize; /* Page size */
171 uint oobsize; /* OOB size per page */
172 uint numblocks; /* Number of blocks */
173 uint32 type; /* Type */
174 uint size; /* Total size in bytes */
175 uint8 id[5];
176 uint ecclevel; /* ECC algorithm for blocks other than block 0 */
177 uint ecclevel0; /* ECC algorithm for blocks 0 */
180 /* Utility functions */
181 extern void nflash_enable(si_t *sih, int enable);
182 extern int nflash_poll(si_t *sih, chipcregs_t *cc);
183 extern int nflash_read(si_t *sih, chipcregs_t *cc,
184 uint offset, uint len, uchar *buf);
185 extern int nflash_write(si_t *sih, chipcregs_t *cc,
186 uint offset, uint len, const uchar *buf);
187 extern int nflash_erase(si_t *sih, chipcregs_t *cc, uint offset);
188 extern struct nflash *nflash_init(si_t *sih, chipcregs_t *cc);
189 extern int nflash_checkbadb(si_t *sih, chipcregs_t *cc, uint offset);
190 extern int nflash_readst(si_t *sih, chipcregs_t *cc, uint8 *status);
191 extern int nflash_readoob(si_t *sih, chipcregs_t *cc, uint offset, uint len, uchar *buf);
192 extern int nflash_writeoob(si_t *sih, chipcregs_t *cc, uint offset, uint len, uchar *buf);
193 extern int nflash_mark_badb(si_t *sih, chipcregs_t *cc, uint offset);
195 #endif /* _LANGUAGE_ASSEMBLY */
197 #endif /* _nflash_h_ */