release/src-rt/include/arminc.h

   1 /*
   2  * HND Run Time Environment for standalone ARM programs.
   3  *
   4  * Copyright (C) 2010, Broadcom Corporation. All Rights Reserved.
   5  *
   6  * Permission to use, copy, modify, and/or distribute this software for any
   7  * purpose with or without fee is hereby granted, provided that the above
   8  * copyright notice and this permission notice appear in all copies.
   9  *
  10  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  11  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  12  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
  13  * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  14  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
  15  * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
  16  * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  17  *
  18  * $Id: arminc.h,v 13.10 2010-01-15 01:13:59 Exp $
  19  */
  20
  21 #ifndef _ARMINC_H
  22 #define _ARMINC_H
  23
  24
  25 /* ARM defines */
  26
  27 #ifdef  _LANGUAGE_ASSEMBLY
  28
  29 /*
  30  * LEAF - declare leaf routine
  31  */
  32 #define LEAF(function)                          \
  33                 .section .text.function, "ax";  \
  34                 .global function;               \
  35                 .func   function;               \
  36 function:
  37
  38 #define THUMBLEAF(function)                     \
  39                 .section .text.function, "ax";  \
  40                 .global function;               \
  41                 .func   function;               \
  42                 .thumb;                         \
  43                 .thumb_func;                    \
  44 function:
  45
  46 /*
  47  * END - mark end of function
  48  */
  49 #define END(function)                           \
  50                 .ltorg;                         \
  51                 .endfunc;                       \
  52                 .size   function, . - function
  53
  54 #define _ULCAST_
  55
  56 #else
  57
  58 /*
  59  * The following macros are especially useful for __asm__
  60  * inline assembler.
  61  */
  62 #ifndef __STR
  63 #define __STR(x) #x
  64 #endif
  65 #ifndef STR
  66 #define STR(x) __STR(x)
  67 #endif
  68
  69 #define _ULCAST_ (unsigned long)
  70
  71 #endif  /* _LANGUAGE_ASSEMBLY */
  72
  73 #if defined(__ARM_ARCH_4T__)
  74 /* arm7tdmi-s */
  75 /* Fields in cpsr */
  76 #define PS_USR          0x00000010              /* Mode: User */
  77 #define PS_FIQ          0x00000011              /* Mode: FIQ */
  78 #define PS_IRQ          0x00000012              /* Mode: IRQ */
  79 #define PS_SVC          0x00000013              /* Mode: Supervisor */
  80 #define PS_ABT          0x00000017              /* Mode: Abort */
  81 #define PS_UND          0x0000001b              /* Mode: Undefined */
  82 #define PS_SYS          0x0000001f              /* Mode: System */
  83 #define PS_MM           0x0000001f              /* Mode bits mask */
  84 #define PS_T            0x00000020              /* Thumb mode */
  85 #define PS_F            0x00000040              /* FIQ disable */
  86 #define PS_I            0x00000080              /* IRQ disable */
  87 #define PS_Q            0x08000000              /* DSP Ov/Sat */
  88 #define PS_V            0x10000000              /* Overflow cc */
  89 #define PS_C            0x20000000              /* Carry cc */
  90 #define PS_Z            0x40000000              /* Zero cc */
  91 #define PS_N            0x80000000              /* Negative cc */
  92
  93 /* Trap types */
  94 #define TR_RST          0                       /* Reset trap */
  95 #define TR_UND          1                       /* Indefined instruction trap */
  96 #define TR_SWI          2                       /* Software intrrupt */
  97 #define TR_IAB          3                       /* Instruction fetch abort */
  98 #define TR_DAB          4                       /* Data access abort */
  99 #define TR_BAD          5                       /* Bad trap: Not used by ARM */
 100 #define TR_IRQ          6                       /* Interrupt */
 101 #define TR_FIQ          7                       /* Fast interrupt */
 102
 103 #ifdef BCMDBG_ARMRST
 104 #define TR_ARMRST       0xF                     /* Debug facility to trap Arm reset */
 105 #endif
 106
 107 /* used to fill an overlay region with nop's */
 108 #define NOP_UINT32      0x46c046c0
 109
 110 #endif  /* __ARM_ARCH_4T__ */
 111
 112 #if defined(__ARM_ARCH_7M__)
 113 /* cortex-m3 */
 114 /* Interrupt enable/disable register */
 115 #define INTEN_REG1      0xe000e100
 116 #define INTDIS_REG1     0xe000e180
 117
 118 /* CPUID */
 119 #define CM3_CPUID       0xe000ed00
 120 #define CM3_VTOFF       0xe000ed08
 121 #define CM3_SYSCTRL     0xe000ed10
 122 #define CM3_CFGCTRL     0xe000ed14
 123
 124 #define CM3_PFR0        0xe000ed40
 125 #define CM3_PFR1        0xe000ed44
 126 #define CM3_DFR0        0xe000ed48
 127 #define CM3_AFR0        0xe000ed4c
 128 #define CM3_MMFR0       0xe000ed50
 129 #define CM3_MMFR1       0xe000ed54
 130 #define CM3_MMFR2       0xe000ed58
 131 #define CM3_MMFR3       0xe000ed5c
 132 #define CM3_ISAR0       0xe000ed60
 133 #define CM3_ISAR1       0xe000ed64
 134 #define CM3_ISAR2       0xe000ed68
 135 #define CM3_ISAR3       0xe000ed6c
 136 #define CM3_ISAR4       0xe000ed70
 137 #define CM3_ISAR5       0xe000ed74
 138
 139 #define CM3_MPUTYPE     0xe000ed90
 140 #define CM3_MPUCTRL     0xe000ed94
 141 #define CM3_REGNUM      0xe000ed98
 142 #define CM3_REGBAR      0xe000ed9c
 143 #define CM3_REGASZ      0xe000eda0
 144 #define CM3_AL1BAR      0xe000eda4
 145 #define CM3_AL1ASZ      0xe000eda8
 146 #define CM3_AL2BAR      0xe000edac
 147 #define CM3_AL2ASZ      0xe000edb0
 148 #define CM3_AL3BAR      0xe000edb4
 149 #define CM3_AL3ASZ      0xe000edb8
 150
 151 /* Trap types */
 152 #define TR_RST          1                       /* Reset */
 153 #define TR_NMI          2                       /* NMI */
 154 #define TR_FAULT        3                       /* Hard Fault */
 155 #define TR_MM           4                       /* Memory Management */
 156 #define TR_BUS          5                       /* Bus Fault */
 157 #define TR_USAGE        6                       /* Usage Fault */
 158 #define TR_SVC          11                      /* SVCall */
 159 #define TR_DMON         12                      /* Debug Monitor */
 160 #define TR_PENDSV       14                      /* PendSV */
 161 #define TR_SYSTICK      15                      /* SysTick */
 162 #define TR_ISR          16                      /* External Interrupts start here */
 163
 164 #define TR_BAD          256                     /* Bad trap: Not used by CM3 */
 165
 166 /* Offsets of automatically saved registers from sp upon trap */
 167 #define CM3_TROFF_R0    0
 168 #define CM3_TROFF_R1    4
 169 #define CM3_TROFF_R2    8
 170 #define CM3_TROFF_R3    12
 171 #define CM3_TROFF_R12   16
 172 #define CM3_TROFF_LR    20
 173 #define CM3_TROFF_PC    24
 174 #define CM3_TROFF_xPSR  28
 175
 176 /* used to fill an overlay region with nop's */
 177 #define NOP_UINT32      0x46c046c0
 178
 179 #endif  /* __ARM_ARCH_7M__ */
 180
 181 /* Pieces of a CPU Id */
 182 #define CID_IMPL        0xff000000              /* Implementor: 0x41 for ARM Ltd. */
 183 #define CID_VARIANT     0x00f00000
 184 #define CID_ARCH        0x000f0000
 185 #define CID_PART        0x0000fff0
 186 #define CID_REV         0x0000000f
 187 #define CID_MASK        (CID_IMPL | CID_ARCH | CID_PART)
 188
 189 #endif  /* _ARMINC_H */