release/src-rt/include/aidmp.h

   1 /*
   2  * Broadcom AMBA Interconnect definitions.
   3  *
   4  * Copyright (C) 2010, Broadcom Corporation. All Rights Reserved.
   5  *
   6  * Permission to use, copy, modify, and/or distribute this software for any
   7  * purpose with or without fee is hereby granted, provided that the above
   8  * copyright notice and this permission notice appear in all copies.
   9  *
  10  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  11  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  12  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
  13  * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  14  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
  15  * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
  16  * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  17  *
  18  * $Id: aidmp.h,v 13.4 2009-09-03 04:21:25 Exp $
  19  */
  20
  21 #ifndef _AIDMP_H
  22 #define _AIDMP_H
  23
  24 /* Manufacturer Ids */
  25 #define MFGID_ARM               0x43b
  26 #define MFGID_BRCM              0x4bf
  27 #define MFGID_MIPS              0x4a7
  28
  29 /* Component Classes */
  30 #define CC_SIM                  0
  31 #define CC_EROM                 1
  32 #define CC_CORESIGHT            9
  33 #define CC_VERIF                0xb
  34 #define CC_OPTIMO               0xd
  35 #define CC_GEN                  0xe
  36 #define CC_PRIMECELL            0xf
  37
  38 /* Enumeration ROM registers */
  39 #define ER_EROMENTRY            0x000
  40 #define ER_REMAPCONTROL         0xe00
  41 #define ER_REMAPSELECT          0xe04
  42 #define ER_MASTERSELECT         0xe10
  43 #define ER_ITCR                 0xf00
  44 #define ER_ITIP                 0xf04
  45
  46 /* Erom entries */
  47 #define ER_TAG                  0xe
  48 #define ER_TAG1                 0x6
  49 #define ER_VALID                1
  50 #define ER_CI                   0
  51 #define ER_MP                   2
  52 #define ER_ADD                  4
  53 #define ER_END                  0xe
  54 #define ER_BAD                  0xffffffff
  55
  56 /* EROM CompIdentA */
  57 #define CIA_MFG_MASK            0xfff00000
  58 #define CIA_MFG_SHIFT           20
  59 #define CIA_CID_MASK            0x000fff00
  60 #define CIA_CID_SHIFT           8
  61 #define CIA_CCL_MASK            0x000000f0
  62 #define CIA_CCL_SHIFT           4
  63
  64 /* EROM CompIdentB */
  65 #define CIB_REV_MASK            0xff000000
  66 #define CIB_REV_SHIFT           24
  67 #define CIB_NSW_MASK            0x00f80000
  68 #define CIB_NSW_SHIFT           19
  69 #define CIB_NMW_MASK            0x0007c000
  70 #define CIB_NMW_SHIFT           14
  71 #define CIB_NSP_MASK            0x00003e00
  72 #define CIB_NSP_SHIFT           9
  73 #define CIB_NMP_MASK            0x000001f0
  74 #define CIB_NMP_SHIFT           4
  75
  76 /* EROM MasterPortDesc */
  77 #define MPD_MUI_MASK            0x0000ff00
  78 #define MPD_MUI_SHIFT           8
  79 #define MPD_MP_MASK             0x000000f0
  80 #define MPD_MP_SHIFT            4
  81
  82 /* EROM AddrDesc */
  83 #define AD_ADDR_MASK            0xfffff000
  84 #define AD_SP_MASK              0x00000f00
  85 #define AD_SP_SHIFT             8
  86 #define AD_ST_MASK              0x000000c0
  87 #define AD_ST_SHIFT             6
  88 #define AD_ST_SLAVE             0x00000000
  89 #define AD_ST_BRIDGE            0x00000040
  90 #define AD_ST_SWRAP             0x00000080
  91 #define AD_ST_MWRAP             0x000000c0
  92 #define AD_SZ_MASK              0x00000030
  93 #define AD_SZ_SHIFT             4
  94 #define AD_SZ_4K                0x00000000
  95 #define AD_SZ_8K                0x00000010
  96 #define AD_SZ_16K               0x00000020
  97 #define AD_SZ_SZD               0x00000030
  98 #define AD_AG32                 0x00000008
  99 #define AD_ADDR_ALIGN           0x00000fff
 100 #define AD_SZ_BASE              0x00001000      /* 4KB */
 101
 102 /* EROM SizeDesc */
 103 #define SD_SZ_MASK              0xfffff000
 104 #define SD_SG32                 0x00000008
 105 #define SD_SZ_ALIGN             0x00000fff
 106
 107
 108 #ifndef _LANGUAGE_ASSEMBLY
 109
 110 typedef volatile struct _aidmp {
 111         uint32  oobselina30;    /* 0x000 */
 112         uint32  oobselina74;    /* 0x004 */
 113         uint32  PAD[6];
 114         uint32  oobselinb30;    /* 0x020 */
 115         uint32  oobselinb74;    /* 0x024 */
 116         uint32  PAD[6];
 117         uint32  oobselinc30;    /* 0x040 */
 118         uint32  oobselinc74;    /* 0x044 */
 119         uint32  PAD[6];
 120         uint32  oobselind30;    /* 0x060 */
 121         uint32  oobselind74;    /* 0x064 */
 122         uint32  PAD[38];
 123         uint32  oobselouta30;   /* 0x100 */
 124         uint32  oobselouta74;   /* 0x104 */
 125         uint32  PAD[6];
 126         uint32  oobseloutb30;   /* 0x120 */
 127         uint32  oobseloutb74;   /* 0x124 */
 128         uint32  PAD[6];
 129         uint32  oobseloutc30;   /* 0x140 */
 130         uint32  oobseloutc74;   /* 0x144 */
 131         uint32  PAD[6];
 132         uint32  oobseloutd30;   /* 0x160 */
 133         uint32  oobseloutd74;   /* 0x164 */
 134         uint32  PAD[38];
 135         uint32  oobsynca;       /* 0x200 */
 136         uint32  oobseloutaen;   /* 0x204 */
 137         uint32  PAD[6];
 138         uint32  oobsyncb;       /* 0x220 */
 139         uint32  oobseloutben;   /* 0x224 */
 140         uint32  PAD[6];
 141         uint32  oobsyncc;       /* 0x240 */
 142         uint32  oobseloutcen;   /* 0x244 */
 143         uint32  PAD[6];
 144         uint32  oobsyncd;       /* 0x260 */
 145         uint32  oobseloutden;   /* 0x264 */
 146         uint32  PAD[38];
 147         uint32  oobaextwidth;   /* 0x300 */
 148         uint32  oobainwidth;    /* 0x304 */
 149         uint32  oobaoutwidth;   /* 0x308 */
 150         uint32  PAD[5];
 151         uint32  oobbextwidth;   /* 0x320 */
 152         uint32  oobbinwidth;    /* 0x324 */
 153         uint32  oobboutwidth;   /* 0x328 */
 154         uint32  PAD[5];
 155         uint32  oobcextwidth;   /* 0x340 */
 156         uint32  oobcinwidth;    /* 0x344 */
 157         uint32  oobcoutwidth;   /* 0x348 */
 158         uint32  PAD[5];
 159         uint32  oobdextwidth;   /* 0x360 */
 160         uint32  oobdinwidth;    /* 0x364 */
 161         uint32  oobdoutwidth;   /* 0x368 */
 162         uint32  PAD[37];
 163         uint32  ioctrlset;      /* 0x400 */
 164         uint32  ioctrlclear;    /* 0x404 */
 165         uint32  ioctrl;         /* 0x408 */
 166         uint32  PAD[61];
 167         uint32  iostatus;       /* 0x500 */
 168         uint32  PAD[127];
 169         uint32  ioctrlwidth;    /* 0x700 */
 170         uint32  iostatuswidth;  /* 0x704 */
 171         uint32  PAD[62];
 172         uint32  resetctrl;      /* 0x800 */
 173         uint32  resetstatus;    /* 0x804 */
 174         uint32  resetreadid;    /* 0x808 */
 175         uint32  resetwriteid;   /* 0x80c */
 176         uint32  PAD[60];
 177         uint32  errlogctrl;     /* 0x900 */
 178         uint32  errlogdone;     /* 0x904 */
 179         uint32  errlogstatus;   /* 0x908 */
 180         uint32  errlogaddrlo;   /* 0x90c */
 181         uint32  errlogaddrhi;   /* 0x910 */
 182         uint32  errlogid;       /* 0x914 */
 183         uint32  errloguser;     /* 0x918 */
 184         uint32  errlogflags;    /* 0x91c */
 185         uint32  PAD[56];
 186         uint32  intstatus;      /* 0xa00 */
 187         uint32  PAD[255];
 188         uint32  config;         /* 0xe00 */
 189         uint32  PAD[63];
 190         uint32  itcr;           /* 0xf00 */
 191         uint32  PAD[3];
 192         uint32  itipooba;       /* 0xf10 */
 193         uint32  itipoobb;       /* 0xf14 */
 194         uint32  itipoobc;       /* 0xf18 */
 195         uint32  itipoobd;       /* 0xf1c */
 196         uint32  PAD[4];
 197         uint32  itipoobaout;    /* 0xf30 */
 198         uint32  itipoobbout;    /* 0xf34 */
 199         uint32  itipoobcout;    /* 0xf38 */
 200         uint32  itipoobdout;    /* 0xf3c */
 201         uint32  PAD[4];
 202         uint32  itopooba;       /* 0xf50 */
 203         uint32  itopoobb;       /* 0xf54 */
 204         uint32  itopoobc;       /* 0xf58 */
 205         uint32  itopoobd;       /* 0xf5c */
 206         uint32  PAD[4];
 207         uint32  itopoobain;     /* 0xf70 */
 208         uint32  itopoobbin;     /* 0xf74 */
 209         uint32  itopoobcin;     /* 0xf78 */
 210         uint32  itopoobdin;     /* 0xf7c */
 211         uint32  PAD[4];
 212         uint32  itopreset;      /* 0xf90 */
 213         uint32  PAD[15];
 214         uint32  peripherialid4; /* 0xfd0 */
 215         uint32  peripherialid5; /* 0xfd4 */
 216         uint32  peripherialid6; /* 0xfd8 */
 217         uint32  peripherialid7; /* 0xfdc */
 218         uint32  peripherialid0; /* 0xfe0 */
 219         uint32  peripherialid1; /* 0xfe4 */
 220         uint32  peripherialid2; /* 0xfe8 */
 221         uint32  peripherialid3; /* 0xfec */
 222         uint32  componentid0;   /* 0xff0 */
 223         uint32  componentid1;   /* 0xff4 */
 224         uint32  componentid2;   /* 0xff8 */
 225         uint32  componentid3;   /* 0xffc */
 226 } aidmp_t;
 227
 228 #endif /* _LANGUAGE_ASSEMBLY */
 229
 230 /* Out-of-band Router registers */
 231 #define OOB_BUSCONFIG           0x020
 232 #define OOB_STATUSA             0x100
 233 #define OOB_STATUSB             0x104
 234 #define OOB_STATUSC             0x108
 235 #define OOB_STATUSD             0x10c
 236 #define OOB_ENABLEA0            0x200
 237 #define OOB_ENABLEA1            0x204
 238 #define OOB_ENABLEA2            0x208
 239 #define OOB_ENABLEA3            0x20c
 240 #define OOB_ENABLEB0            0x280
 241 #define OOB_ENABLEB1            0x284
 242 #define OOB_ENABLEB2            0x288
 243 #define OOB_ENABLEB3            0x28c
 244 #define OOB_ENABLEC0            0x300
 245 #define OOB_ENABLEC1            0x304
 246 #define OOB_ENABLEC2            0x308
 247 #define OOB_ENABLEC3            0x30c
 248 #define OOB_ENABLED0            0x380
 249 #define OOB_ENABLED1            0x384
 250 #define OOB_ENABLED2            0x388
 251 #define OOB_ENABLED3            0x38c
 252 #define OOB_ITCR                0xf00
 253 #define OOB_ITIPOOBA            0xf10
 254 #define OOB_ITIPOOBB            0xf14
 255 #define OOB_ITIPOOBC            0xf18
 256 #define OOB_ITIPOOBD            0xf1c
 257 #define OOB_ITOPOOBA            0xf30
 258 #define OOB_ITOPOOBB            0xf34
 259 #define OOB_ITOPOOBC            0xf38
 260 #define OOB_ITOPOOBD            0xf3c
 261
 262 /* DMP wrapper registers */
 263 #define AI_OOBSELINA30          0x000
 264 #define AI_OOBSELINA74          0x004
 265 #define AI_OOBSELINB30          0x020
 266 #define AI_OOBSELINB74          0x024
 267 #define AI_OOBSELINC30          0x040
 268 #define AI_OOBSELINC74          0x044
 269 #define AI_OOBSELIND30          0x060
 270 #define AI_OOBSELIND74          0x064
 271 #define AI_OOBSELOUTA30         0x100
 272 #define AI_OOBSELOUTA74         0x104
 273 #define AI_OOBSELOUTB30         0x120
 274 #define AI_OOBSELOUTB74         0x124
 275 #define AI_OOBSELOUTC30         0x140
 276 #define AI_OOBSELOUTC74         0x144
 277 #define AI_OOBSELOUTD30         0x160
 278 #define AI_OOBSELOUTD74         0x164
 279 #define AI_OOBSYNCA             0x200
 280 #define AI_OOBSELOUTAEN         0x204
 281 #define AI_OOBSYNCB             0x220
 282 #define AI_OOBSELOUTBEN         0x224
 283 #define AI_OOBSYNCC             0x240
 284 #define AI_OOBSELOUTCEN         0x244
 285 #define AI_OOBSYNCD             0x260
 286 #define AI_OOBSELOUTDEN         0x264
 287 #define AI_OOBAEXTWIDTH         0x300
 288 #define AI_OOBAINWIDTH          0x304
 289 #define AI_OOBAOUTWIDTH         0x308
 290 #define AI_OOBBEXTWIDTH         0x320
 291 #define AI_OOBBINWIDTH          0x324
 292 #define AI_OOBBOUTWIDTH         0x328
 293 #define AI_OOBCEXTWIDTH         0x340
 294 #define AI_OOBCINWIDTH          0x344
 295 #define AI_OOBCOUTWIDTH         0x348
 296 #define AI_OOBDEXTWIDTH         0x360
 297 #define AI_OOBDINWIDTH          0x364
 298 #define AI_OOBDOUTWIDTH         0x368
 299
 300 #if     defined(IL_BIGENDIAN) && defined(BCMHND74K)
 301 /* Selective swapped defines for those registers we need in
 302  * big-endian code.
 303  */
 304 #define AI_IOCTRLSET            0x404
 305 #define AI_IOCTRLCLEAR          0x400
 306 #define AI_IOCTRL               0x40c
 307 #define AI_IOSTATUS             0x504
 308 #define AI_RESETCTRL            0x804
 309 #define AI_RESETSTATUS          0x800
 310
 311 #else   /* !IL_BIGENDIAN || !BCMHND74K */
 312
 313 #define AI_IOCTRLSET            0x400
 314 #define AI_IOCTRLCLEAR          0x404
 315 #define AI_IOCTRL               0x408
 316 #define AI_IOSTATUS             0x500
 317 #define AI_RESETCTRL            0x800
 318 #define AI_RESETSTATUS          0x804
 319
 320 #endif  /* IL_BIGENDIAN && BCMHND74K */
 321
 322 #define AI_IOCTRLWIDTH          0x700
 323 #define AI_IOSTATUSWIDTH        0x704
 324
 325 #define AI_RESETREADID          0x808
 326 #define AI_RESETWRITEID         0x80c
 327 #define AI_ERRLOGCTRL           0xa00
 328 #define AI_ERRLOGDONE           0xa04
 329 #define AI_ERRLOGSTATUS         0xa08
 330 #define AI_ERRLOGADDRLO         0xa0c
 331 #define AI_ERRLOGADDRHI         0xa10
 332 #define AI_ERRLOGID             0xa14
 333 #define AI_ERRLOGUSER           0xa18
 334 #define AI_ERRLOGFLAGS          0xa1c
 335 #define AI_INTSTATUS            0xa00
 336 #define AI_CONFIG               0xe00
 337 #define AI_ITCR                 0xf00
 338 #define AI_ITIPOOBA             0xf10
 339 #define AI_ITIPOOBB             0xf14
 340 #define AI_ITIPOOBC             0xf18
 341 #define AI_ITIPOOBD             0xf1c
 342 #define AI_ITIPOOBAOUT          0xf30
 343 #define AI_ITIPOOBBOUT          0xf34
 344 #define AI_ITIPOOBCOUT          0xf38
 345 #define AI_ITIPOOBDOUT          0xf3c
 346 #define AI_ITOPOOBA             0xf50
 347 #define AI_ITOPOOBB             0xf54
 348 #define AI_ITOPOOBC             0xf58
 349 #define AI_ITOPOOBD             0xf5c
 350 #define AI_ITOPOOBAIN           0xf70
 351 #define AI_ITOPOOBBIN           0xf74
 352 #define AI_ITOPOOBCIN           0xf78
 353 #define AI_ITOPOOBDIN           0xf7c
 354 #define AI_ITOPRESET            0xf90
 355 #define AI_PERIPHERIALID4       0xfd0
 356 #define AI_PERIPHERIALID5       0xfd4
 357 #define AI_PERIPHERIALID6       0xfd8
 358 #define AI_PERIPHERIALID7       0xfdc
 359 #define AI_PERIPHERIALID0       0xfe0
 360 #define AI_PERIPHERIALID1       0xfe4
 361 #define AI_PERIPHERIALID2       0xfe8
 362 #define AI_PERIPHERIALID3       0xfec
 363 #define AI_COMPONENTID0         0xff0
 364 #define AI_COMPONENTID1         0xff4
 365 #define AI_COMPONENTID2         0xff8
 366 #define AI_COMPONENTID3         0xffc
 367
 368 /* resetctrl */
 369 #define AIRC_RESET              1
 370
 371 /* config */
 372 #define AICFG_OOB               0x00000020
 373 #define AICFG_IOS               0x00000010
 374 #define AICFG_IOC               0x00000008
 375 #define AICFG_TO                0x00000004
 376 #define AICFG_ERRL              0x00000002
 377 #define AICFG_RST               0x00000001
 378
 379 /* bit defines for AI_OOBSELOUTB74 reg */
 380 #define OOB_SEL_OUTEN_B_5       15
 381 #define OOB_SEL_OUTEN_B_6       23
 382
 383 #endif  /* _AIDMP_H */