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[tinycc.git] / arm-gen.c
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1 /*
2 * ARMv4 code generator for TCC
4 * Copyright (c) 2003 Daniel Glöckner
5 * Copyright (c) 2012 Thomas Preud'homme
7 * Based on i386-gen.c by Fabrice Bellard
9 * This library is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU Lesser General Public
11 * License as published by the Free Software Foundation; either
12 * version 2 of the License, or (at your option) any later version.
14 * This library is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * Lesser General Public License for more details.
19 * You should have received a copy of the GNU Lesser General Public
20 * License along with this library; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
24 #ifdef TARGET_DEFS_ONLY
26 #ifdef TCC_ARM_EABI
27 #ifndef TCC_ARM_VFP /* Avoid useless warning */
28 #define TCC_ARM_VFP
29 #endif
30 #endif
32 /* number of available registers */
33 #ifdef TCC_ARM_VFP
34 #define NB_REGS 13
35 #else
36 #define NB_REGS 9
37 #endif
39 #ifndef TCC_ARM_VERSION
40 # define TCC_ARM_VERSION 5
41 #endif
43 /* a register can belong to several classes. The classes must be
44 sorted from more general to more precise (see gv2() code which does
45 assumptions on it). */
46 #define RC_INT 0x0001 /* generic integer register */
47 #define RC_FLOAT 0x0002 /* generic float register */
48 #define RC_R0 0x0004
49 #define RC_R1 0x0008
50 #define RC_R2 0x0010
51 #define RC_R3 0x0020
52 #define RC_R12 0x0040
53 #define RC_F0 0x0080
54 #define RC_F1 0x0100
55 #define RC_F2 0x0200
56 #define RC_F3 0x0400
57 #ifdef TCC_ARM_VFP
58 #define RC_F4 0x0800
59 #define RC_F5 0x1000
60 #define RC_F6 0x2000
61 #define RC_F7 0x4000
62 #endif
63 #define RC_IRET RC_R0 /* function return: integer register */
64 #define RC_LRET RC_R1 /* function return: second integer register */
65 #define RC_FRET RC_F0 /* function return: float register */
67 /* pretty names for the registers */
68 enum {
69 TREG_R0 = 0,
70 TREG_R1,
71 TREG_R2,
72 TREG_R3,
73 TREG_R12,
74 TREG_F0,
75 TREG_F1,
76 TREG_F2,
77 TREG_F3,
78 #ifdef TCC_ARM_VFP
79 TREG_F4,
80 TREG_F5,
81 TREG_F6,
82 TREG_F7,
83 #endif
86 #ifdef TCC_ARM_VFP
87 #define T2CPR(t) (((t) & VT_BTYPE) != VT_FLOAT ? 0x100 : 0)
88 #endif
90 /* return registers for function */
91 #define REG_IRET TREG_R0 /* single word int return register */
92 #define REG_LRET TREG_R1 /* second word return register (for long long) */
93 #define REG_FRET TREG_F0 /* float return register */
95 #ifdef TCC_ARM_EABI
96 #define TOK___divdi3 TOK___aeabi_ldivmod
97 #define TOK___moddi3 TOK___aeabi_ldivmod
98 #define TOK___udivdi3 TOK___aeabi_uldivmod
99 #define TOK___umoddi3 TOK___aeabi_uldivmod
100 #endif
102 /* defined if function parameters must be evaluated in reverse order */
103 #define INVERT_FUNC_PARAMS
105 /* defined if structures are passed as pointers. Otherwise structures
106 are directly pushed on stack. */
107 /* #define FUNC_STRUCT_PARAM_AS_PTR */
109 /* pointer size, in bytes */
110 #define PTR_SIZE 4
112 /* long double size and alignment, in bytes */
113 #ifdef TCC_ARM_VFP
114 #define LDOUBLE_SIZE 8
115 #endif
117 #ifndef LDOUBLE_SIZE
118 #define LDOUBLE_SIZE 8
119 #endif
121 #ifdef TCC_ARM_EABI
122 #define LDOUBLE_ALIGN 8
123 #else
124 #define LDOUBLE_ALIGN 4
125 #endif
127 /* maximum alignment (for aligned attribute support) */
128 #define MAX_ALIGN 8
130 #define CHAR_IS_UNSIGNED
132 /******************************************************/
133 /* ELF defines */
135 #define EM_TCC_TARGET EM_ARM
137 /* relocation type for 32 bit data relocation */
138 #define R_DATA_32 R_ARM_ABS32
139 #define R_DATA_PTR R_ARM_ABS32
140 #define R_JMP_SLOT R_ARM_JUMP_SLOT
141 #define R_COPY R_ARM_COPY
143 #define ELF_START_ADDR 0x00008000
144 #define ELF_PAGE_SIZE 0x1000
146 /******************************************************/
147 #else /* ! TARGET_DEFS_ONLY */
148 /******************************************************/
149 #include "tcc.h"
151 ST_DATA const int reg_classes[NB_REGS] = {
152 /* r0 */ RC_INT | RC_R0,
153 /* r1 */ RC_INT | RC_R1,
154 /* r2 */ RC_INT | RC_R2,
155 /* r3 */ RC_INT | RC_R3,
156 /* r12 */ RC_INT | RC_R12,
157 /* f0 */ RC_FLOAT | RC_F0,
158 /* f1 */ RC_FLOAT | RC_F1,
159 /* f2 */ RC_FLOAT | RC_F2,
160 /* f3 */ RC_FLOAT | RC_F3,
161 #ifdef TCC_ARM_VFP
162 /* d4/s8 */ RC_FLOAT | RC_F4,
163 /* d5/s10 */ RC_FLOAT | RC_F5,
164 /* d6/s12 */ RC_FLOAT | RC_F6,
165 /* d7/s14 */ RC_FLOAT | RC_F7,
166 #endif
169 static int func_sub_sp_offset, last_itod_magic;
170 static int leaffunc;
172 #if defined(TCC_ARM_EABI) && defined(TCC_ARM_VFP)
173 static CType float_type, double_type, func_float_type, func_double_type;
174 ST_FUNC void arm_init_types(void)
176 float_type.t = VT_FLOAT;
177 double_type.t = VT_DOUBLE;
178 func_float_type.t = VT_FUNC;
179 func_float_type.ref = sym_push(SYM_FIELD, &float_type, FUNC_CDECL, FUNC_OLD);
180 func_double_type.t = VT_FUNC;
181 func_double_type.ref = sym_push(SYM_FIELD, &double_type, FUNC_CDECL, FUNC_OLD);
183 #else
184 #define func_float_type func_old_type
185 #define func_double_type func_old_type
186 #define func_ldouble_type func_old_type
187 ST_FUNC void arm_init_types(void) {}
188 #endif
190 static int two2mask(int a,int b) {
191 return (reg_classes[a]|reg_classes[b])&~(RC_INT|RC_FLOAT);
194 static int regmask(int r) {
195 return reg_classes[r]&~(RC_INT|RC_FLOAT);
198 /******************************************************/
200 void o(uint32_t i)
202 /* this is a good place to start adding big-endian support*/
203 int ind1;
205 ind1 = ind + 4;
206 if (!cur_text_section)
207 tcc_error("compiler error! This happens f.ex. if the compiler\n"
208 "can't evaluate constant expressions outside of a function.");
209 if (ind1 > cur_text_section->data_allocated)
210 section_realloc(cur_text_section, ind1);
211 cur_text_section->data[ind++] = i&255;
212 i>>=8;
213 cur_text_section->data[ind++] = i&255;
214 i>>=8;
215 cur_text_section->data[ind++] = i&255;
216 i>>=8;
217 cur_text_section->data[ind++] = i;
220 static uint32_t stuff_const(uint32_t op, uint32_t c)
222 int try_neg=0;
223 uint32_t nc = 0, negop = 0;
225 switch(op&0x1F00000)
227 case 0x800000: //add
228 case 0x400000: //sub
229 try_neg=1;
230 negop=op^0xC00000;
231 nc=-c;
232 break;
233 case 0x1A00000: //mov
234 case 0x1E00000: //mvn
235 try_neg=1;
236 negop=op^0x400000;
237 nc=~c;
238 break;
239 case 0x200000: //xor
240 if(c==~0)
241 return (op&0xF010F000)|((op>>16)&0xF)|0x1E00000;
242 break;
243 case 0x0: //and
244 if(c==~0)
245 return (op&0xF010F000)|((op>>16)&0xF)|0x1A00000;
246 case 0x1C00000: //bic
247 try_neg=1;
248 negop=op^0x1C00000;
249 nc=~c;
250 break;
251 case 0x1800000: //orr
252 if(c==~0)
253 return (op&0xFFF0FFFF)|0x1E00000;
254 break;
256 do {
257 uint32_t m;
258 int i;
259 if(c<256) /* catch undefined <<32 */
260 return op|c;
261 for(i=2;i<32;i+=2) {
262 m=(0xff>>i)|(0xff<<(32-i));
263 if(!(c&~m))
264 return op|(i<<7)|(c<<i)|(c>>(32-i));
266 op=negop;
267 c=nc;
268 } while(try_neg--);
269 return 0;
273 //only add,sub
274 void stuff_const_harder(uint32_t op, uint32_t v) {
275 uint32_t x;
276 x=stuff_const(op,v);
277 if(x)
278 o(x);
279 else {
280 uint32_t a[16], nv, no, o2, n2;
281 int i,j,k;
282 a[0]=0xff;
283 o2=(op&0xfff0ffff)|((op&0xf000)<<4);;
284 for(i=1;i<16;i++)
285 a[i]=(a[i-1]>>2)|(a[i-1]<<30);
286 for(i=0;i<12;i++)
287 for(j=i<4?i+12:15;j>=i+4;j--)
288 if((v&(a[i]|a[j]))==v) {
289 o(stuff_const(op,v&a[i]));
290 o(stuff_const(o2,v&a[j]));
291 return;
293 no=op^0xC00000;
294 n2=o2^0xC00000;
295 nv=-v;
296 for(i=0;i<12;i++)
297 for(j=i<4?i+12:15;j>=i+4;j--)
298 if((nv&(a[i]|a[j]))==nv) {
299 o(stuff_const(no,nv&a[i]));
300 o(stuff_const(n2,nv&a[j]));
301 return;
303 for(i=0;i<8;i++)
304 for(j=i+4;j<12;j++)
305 for(k=i<4?i+12:15;k>=j+4;k--)
306 if((v&(a[i]|a[j]|a[k]))==v) {
307 o(stuff_const(op,v&a[i]));
308 o(stuff_const(o2,v&a[j]));
309 o(stuff_const(o2,v&a[k]));
310 return;
312 no=op^0xC00000;
313 nv=-v;
314 for(i=0;i<8;i++)
315 for(j=i+4;j<12;j++)
316 for(k=i<4?i+12:15;k>=j+4;k--)
317 if((nv&(a[i]|a[j]|a[k]))==nv) {
318 o(stuff_const(no,nv&a[i]));
319 o(stuff_const(n2,nv&a[j]));
320 o(stuff_const(n2,nv&a[k]));
321 return;
323 o(stuff_const(op,v&a[0]));
324 o(stuff_const(o2,v&a[4]));
325 o(stuff_const(o2,v&a[8]));
326 o(stuff_const(o2,v&a[12]));
330 ST_FUNC uint32_t encbranch(int pos, int addr, int fail)
332 addr-=pos+8;
333 addr/=4;
334 if(addr>=0x1000000 || addr<-0x1000000) {
335 if(fail)
336 tcc_error("FIXME: function bigger than 32MB");
337 return 0;
339 return 0x0A000000|(addr&0xffffff);
342 int decbranch(int pos)
344 int x;
345 x=*(uint32_t *)(cur_text_section->data + pos);
346 x&=0x00ffffff;
347 if(x&0x800000)
348 x-=0x1000000;
349 return x*4+pos+8;
352 /* output a symbol and patch all calls to it */
353 void gsym_addr(int t, int a)
355 uint32_t *x;
356 int lt;
357 while(t) {
358 x=(uint32_t *)(cur_text_section->data + t);
359 t=decbranch(lt=t);
360 if(a==lt+4)
361 *x=0xE1A00000; // nop
362 else {
363 *x &= 0xff000000;
364 *x |= encbranch(lt,a,1);
369 void gsym(int t)
371 gsym_addr(t, ind);
374 #ifdef TCC_ARM_VFP
375 static uint32_t vfpr(int r)
377 if(r<TREG_F0 || r>TREG_F7)
378 tcc_error("compiler error! register %i is no vfp register",r);
379 return r-5;
381 #else
382 static uint32_t fpr(int r)
384 if(r<TREG_F0 || r>TREG_F3)
385 tcc_error("compiler error! register %i is no fpa register",r);
386 return r-5;
388 #endif
390 static uint32_t intr(int r)
392 if(r==4)
393 return 12;
394 if((r<0 || r>4) && r!=14)
395 tcc_error("compiler error! register %i is no int register",r);
396 return r;
399 static void calcaddr(uint32_t *base, int *off, int *sgn, int maxoff, unsigned shift)
401 if(*off>maxoff || *off&((1<<shift)-1)) {
402 uint32_t x, y;
403 x=0xE280E000;
404 if(*sgn)
405 x=0xE240E000;
406 x|=(*base)<<16;
407 *base=14; // lr
408 y=stuff_const(x,*off&~maxoff);
409 if(y) {
410 o(y);
411 *off&=maxoff;
412 return;
414 y=stuff_const(x,(*off+maxoff)&~maxoff);
415 if(y) {
416 o(y);
417 *sgn=!*sgn;
418 *off=((*off+maxoff)&~maxoff)-*off;
419 return;
421 stuff_const_harder(x,*off&~maxoff);
422 *off&=maxoff;
426 static uint32_t mapcc(int cc)
428 switch(cc)
430 case TOK_ULT:
431 return 0x30000000; /* CC/LO */
432 case TOK_UGE:
433 return 0x20000000; /* CS/HS */
434 case TOK_EQ:
435 return 0x00000000; /* EQ */
436 case TOK_NE:
437 return 0x10000000; /* NE */
438 case TOK_ULE:
439 return 0x90000000; /* LS */
440 case TOK_UGT:
441 return 0x80000000; /* HI */
442 case TOK_Nset:
443 return 0x40000000; /* MI */
444 case TOK_Nclear:
445 return 0x50000000; /* PL */
446 case TOK_LT:
447 return 0xB0000000; /* LT */
448 case TOK_GE:
449 return 0xA0000000; /* GE */
450 case TOK_LE:
451 return 0xD0000000; /* LE */
452 case TOK_GT:
453 return 0xC0000000; /* GT */
455 tcc_error("unexpected condition code");
456 return 0xE0000000; /* AL */
459 static int negcc(int cc)
461 switch(cc)
463 case TOK_ULT:
464 return TOK_UGE;
465 case TOK_UGE:
466 return TOK_ULT;
467 case TOK_EQ:
468 return TOK_NE;
469 case TOK_NE:
470 return TOK_EQ;
471 case TOK_ULE:
472 return TOK_UGT;
473 case TOK_UGT:
474 return TOK_ULE;
475 case TOK_Nset:
476 return TOK_Nclear;
477 case TOK_Nclear:
478 return TOK_Nset;
479 case TOK_LT:
480 return TOK_GE;
481 case TOK_GE:
482 return TOK_LT;
483 case TOK_LE:
484 return TOK_GT;
485 case TOK_GT:
486 return TOK_LE;
488 tcc_error("unexpected condition code");
489 return TOK_NE;
492 /* load 'r' from value 'sv' */
493 void load(int r, SValue *sv)
495 int v, ft, fc, fr, sign;
496 uint32_t op;
497 SValue v1;
499 fr = sv->r;
500 ft = sv->type.t;
501 fc = sv->c.ul;
503 if(fc>=0)
504 sign=0;
505 else {
506 sign=1;
507 fc=-fc;
510 v = fr & VT_VALMASK;
511 if (fr & VT_LVAL) {
512 uint32_t base = 0xB; // fp
513 if(v == VT_LLOCAL) {
514 v1.type.t = VT_PTR;
515 v1.r = VT_LOCAL | VT_LVAL;
516 v1.c.ul = sv->c.ul;
517 load(base=14 /* lr */, &v1);
518 fc=sign=0;
519 v=VT_LOCAL;
520 } else if(v == VT_CONST) {
521 v1.type.t = VT_PTR;
522 v1.r = fr&~VT_LVAL;
523 v1.c.ul = sv->c.ul;
524 v1.sym=sv->sym;
525 load(base=14, &v1);
526 fc=sign=0;
527 v=VT_LOCAL;
528 } else if(v < VT_CONST) {
529 base=intr(v);
530 fc=sign=0;
531 v=VT_LOCAL;
533 if(v == VT_LOCAL) {
534 if(is_float(ft)) {
535 calcaddr(&base,&fc,&sign,1020,2);
536 #ifdef TCC_ARM_VFP
537 op=0xED100A00; /* flds */
538 if(!sign)
539 op|=0x800000;
540 if ((ft & VT_BTYPE) != VT_FLOAT)
541 op|=0x100; /* flds -> fldd */
542 o(op|(vfpr(r)<<12)|(fc>>2)|(base<<16));
543 #else
544 op=0xED100100;
545 if(!sign)
546 op|=0x800000;
547 #if LDOUBLE_SIZE == 8
548 if ((ft & VT_BTYPE) != VT_FLOAT)
549 op|=0x8000;
550 #else
551 if ((ft & VT_BTYPE) == VT_DOUBLE)
552 op|=0x8000;
553 else if ((ft & VT_BTYPE) == VT_LDOUBLE)
554 op|=0x400000;
555 #endif
556 o(op|(fpr(r)<<12)|(fc>>2)|(base<<16));
557 #endif
558 } else if((ft & (VT_BTYPE|VT_UNSIGNED)) == VT_BYTE
559 || (ft & VT_BTYPE) == VT_SHORT) {
560 calcaddr(&base,&fc,&sign,255,0);
561 op=0xE1500090;
562 if ((ft & VT_BTYPE) == VT_SHORT)
563 op|=0x20;
564 if ((ft & VT_UNSIGNED) == 0)
565 op|=0x40;
566 if(!sign)
567 op|=0x800000;
568 o(op|(intr(r)<<12)|(base<<16)|((fc&0xf0)<<4)|(fc&0xf));
569 } else {
570 calcaddr(&base,&fc,&sign,4095,0);
571 op=0xE5100000;
572 if(!sign)
573 op|=0x800000;
574 if ((ft & VT_BTYPE) == VT_BYTE || (ft & VT_BTYPE) == VT_BOOL)
575 op|=0x400000;
576 o(op|(intr(r)<<12)|fc|(base<<16));
578 return;
580 } else {
581 if (v == VT_CONST) {
582 op=stuff_const(0xE3A00000|(intr(r)<<12),sv->c.ul);
583 if (fr & VT_SYM || !op) {
584 o(0xE59F0000|(intr(r)<<12));
585 o(0xEA000000);
586 if(fr & VT_SYM)
587 greloc(cur_text_section, sv->sym, ind, R_ARM_ABS32);
588 o(sv->c.ul);
589 } else
590 o(op);
591 return;
592 } else if (v == VT_LOCAL) {
593 op=stuff_const(0xE28B0000|(intr(r)<<12),sv->c.ul);
594 if (fr & VT_SYM || !op) {
595 o(0xE59F0000|(intr(r)<<12));
596 o(0xEA000000);
597 if(fr & VT_SYM) // needed ?
598 greloc(cur_text_section, sv->sym, ind, R_ARM_ABS32);
599 o(sv->c.ul);
600 o(0xE08B0000|(intr(r)<<12)|intr(r));
601 } else
602 o(op);
603 return;
604 } else if(v == VT_CMP) {
605 o(mapcc(sv->c.ul)|0x3A00001|(intr(r)<<12));
606 o(mapcc(negcc(sv->c.ul))|0x3A00000|(intr(r)<<12));
607 return;
608 } else if (v == VT_JMP || v == VT_JMPI) {
609 int t;
610 t = v & 1;
611 o(0xE3A00000|(intr(r)<<12)|t);
612 o(0xEA000000);
613 gsym(sv->c.ul);
614 o(0xE3A00000|(intr(r)<<12)|(t^1));
615 return;
616 } else if (v < VT_CONST) {
617 if(is_float(ft))
618 #ifdef TCC_ARM_VFP
619 o(0xEEB00A40|(vfpr(r)<<12)|vfpr(v)|T2CPR(ft)); /* fcpyX */
620 #else
621 o(0xEE008180|(fpr(r)<<12)|fpr(v));
622 #endif
623 else
624 o(0xE1A00000|(intr(r)<<12)|intr(v));
625 return;
628 tcc_error("load unimplemented!");
631 /* store register 'r' in lvalue 'v' */
632 void store(int r, SValue *sv)
634 SValue v1;
635 int v, ft, fc, fr, sign;
636 uint32_t op;
638 fr = sv->r;
639 ft = sv->type.t;
640 fc = sv->c.ul;
642 if(fc>=0)
643 sign=0;
644 else {
645 sign=1;
646 fc=-fc;
649 v = fr & VT_VALMASK;
650 if (fr & VT_LVAL || fr == VT_LOCAL) {
651 uint32_t base = 0xb;
652 if(v < VT_CONST) {
653 base=intr(v);
654 v=VT_LOCAL;
655 fc=sign=0;
656 } else if(v == VT_CONST) {
657 v1.type.t = ft;
658 v1.r = fr&~VT_LVAL;
659 v1.c.ul = sv->c.ul;
660 v1.sym=sv->sym;
661 load(base=14, &v1);
662 fc=sign=0;
663 v=VT_LOCAL;
665 if(v == VT_LOCAL) {
666 if(is_float(ft)) {
667 calcaddr(&base,&fc,&sign,1020,2);
668 #ifdef TCC_ARM_VFP
669 op=0xED000A00; /* fsts */
670 if(!sign)
671 op|=0x800000;
672 if ((ft & VT_BTYPE) != VT_FLOAT)
673 op|=0x100; /* fsts -> fstd */
674 o(op|(vfpr(r)<<12)|(fc>>2)|(base<<16));
675 #else
676 op=0xED000100;
677 if(!sign)
678 op|=0x800000;
679 #if LDOUBLE_SIZE == 8
680 if ((ft & VT_BTYPE) != VT_FLOAT)
681 op|=0x8000;
682 #else
683 if ((ft & VT_BTYPE) == VT_DOUBLE)
684 op|=0x8000;
685 if ((ft & VT_BTYPE) == VT_LDOUBLE)
686 op|=0x400000;
687 #endif
688 o(op|(fpr(r)<<12)|(fc>>2)|(base<<16));
689 #endif
690 return;
691 } else if((ft & VT_BTYPE) == VT_SHORT) {
692 calcaddr(&base,&fc,&sign,255,0);
693 op=0xE14000B0;
694 if(!sign)
695 op|=0x800000;
696 o(op|(intr(r)<<12)|(base<<16)|((fc&0xf0)<<4)|(fc&0xf));
697 } else {
698 calcaddr(&base,&fc,&sign,4095,0);
699 op=0xE5000000;
700 if(!sign)
701 op|=0x800000;
702 if ((ft & VT_BTYPE) == VT_BYTE || (ft & VT_BTYPE) == VT_BOOL)
703 op|=0x400000;
704 o(op|(intr(r)<<12)|fc|(base<<16));
706 return;
709 tcc_error("store unimplemented");
712 static void gadd_sp(int val)
714 stuff_const_harder(0xE28DD000,val);
717 /* 'is_jmp' is '1' if it is a jump */
718 static void gcall_or_jmp(int is_jmp)
720 int r;
721 if ((vtop->r & (VT_VALMASK | VT_LVAL)) == VT_CONST) {
722 uint32_t x;
723 /* constant case */
724 x=encbranch(ind,ind+vtop->c.ul,0);
725 if(x) {
726 if (vtop->r & VT_SYM) {
727 /* relocation case */
728 greloc(cur_text_section, vtop->sym, ind, R_ARM_PC24);
729 } else
730 put_elf_reloc(symtab_section, cur_text_section, ind, R_ARM_PC24, 0);
731 o(x|(is_jmp?0xE0000000:0xE1000000));
732 } else {
733 if(!is_jmp)
734 o(0xE28FE004); // add lr,pc,#4
735 o(0xE51FF004); // ldr pc,[pc,#-4]
736 if (vtop->r & VT_SYM)
737 greloc(cur_text_section, vtop->sym, ind, R_ARM_ABS32);
738 o(vtop->c.ul);
740 } else {
741 /* otherwise, indirect call */
742 r = gv(RC_INT);
743 if(!is_jmp)
744 o(0xE1A0E00F); // mov lr,pc
745 o(0xE1A0F000|intr(r)); // mov pc,r
749 #ifdef TCC_ARM_HARDFLOAT
750 /* Return whether a structure is an homogeneous float aggregate or not.
751 The answer is true if all the elements of the structure are of the same
752 primitive float type and there is less than 4 elements.
754 type: the type corresponding to the structure to be tested */
755 static int is_hgen_float_aggr(CType *type)
757 if ((type->t & VT_BTYPE) == VT_STRUCT) {
758 struct Sym *ref;
759 int btype, nb_fields = 0;
761 ref = type->ref->next;
762 btype = ref->type.t & VT_BTYPE;
763 if (btype == VT_FLOAT || btype == VT_DOUBLE) {
764 for(; ref && btype == (ref->type.t & VT_BTYPE); ref = ref->next, nb_fields++);
765 return !ref && nb_fields <= 4;
768 return 0;
771 struct avail_regs {
772 signed char avail[3]; /* 3 holes max with only float and double alignments */
773 int first_hole; /* first available hole */
774 int last_hole; /* last available hole (none if equal to first_hole) */
775 int first_free_reg; /* next free register in the sequence, hole excluded */
778 #define AVAIL_REGS_INITIALIZER (struct avail_regs) { { 0, 0, 0}, 0, 0, 0 }
780 /* Find suitable registers for a VFP Co-Processor Register Candidate (VFP CPRC
781 param) according to the rules described in the procedure call standard for
782 the ARM architecture (AAPCS). If found, the registers are assigned to this
783 VFP CPRC parameter. Registers are allocated in sequence unless a hole exists
784 and the parameter is a single float.
786 avregs: opaque structure to keep track of available VFP co-processor regs
787 align: alignment contraints for the param, as returned by type_size()
788 size: size of the parameter, as returned by type_size() */
789 int assign_vfpreg(struct avail_regs *avregs, int align, int size)
791 int first_reg = 0;
793 if (avregs->first_free_reg == -1)
794 return -1;
795 if (align >> 3) { /* double alignment */
796 first_reg = avregs->first_free_reg;
797 /* alignment contraint not respected so use next reg and record hole */
798 if (first_reg & 1)
799 avregs->avail[avregs->last_hole++] = first_reg++;
800 } else { /* no special alignment (float or array of float) */
801 /* if single float and a hole is available, assign the param to it */
802 if (size == 4 && avregs->first_hole != avregs->last_hole)
803 return avregs->avail[avregs->first_hole++];
804 else
805 first_reg = avregs->first_free_reg;
807 if (first_reg + size / 4 <= 16) {
808 avregs->first_free_reg = first_reg + size / 4;
809 return first_reg;
811 avregs->first_free_reg = -1;
812 return -1;
814 #endif
816 /* Return the number of registers needed to return the struct, or 0 if
817 returning via struct pointer. */
818 ST_FUNC int gfunc_sret(CType *vt, CType *ret, int *ret_align) {
819 #ifdef TCC_ARM_EABI
820 int size, align;
821 size = type_size(vt, &align);
822 #ifdef TCC_ARM_HARDFLOAT
823 if (is_float(vt->t) || is_hgen_float_aggr(vt)) {
824 *ret_align = 8;
825 ret->ref = NULL;
826 ret->t = VT_DOUBLE;
827 return (size + 7) >> 3;
828 } else
829 #endif
830 if (size > 4) {
831 return 0;
832 } else {
833 *ret_align = 4;
834 ret->ref = NULL;
835 ret->t = VT_INT;
836 return 1;
838 #else
839 return 0;
840 #endif
843 /* Parameters are classified according to how they are copied to their final
844 destination for the function call. Because the copying is performed class
845 after class according to the order in the union below, it is important that
846 some constraints about the order of the members of this union are respected:
847 - CORE_STRUCT_CLASS must come after STACK_CLASS;
848 - CORE_CLASS must come after STACK_CLASS, CORE_STRUCT_CLASS and
849 VFP_STRUCT_CLASS;
850 - VFP_STRUCT_CLASS must come after VFP_CLASS.
851 See the comment for the main loop in copy_params() for the reason. */
852 enum reg_class {
853 STACK_CLASS = 0,
854 CORE_STRUCT_CLASS,
855 VFP_CLASS,
856 VFP_STRUCT_CLASS,
857 CORE_CLASS,
858 NB_CLASSES
861 struct param_plan {
862 int start; /* first reg or addr used depending on the class */
863 int end; /* last reg used or next free addr depending on the class */
864 SValue *sval; /* pointer to SValue on the value stack */
865 struct param_plan *prev; /* previous element in this class */
868 struct plan {
869 struct param_plan *pplans; /* array of all the param plans */
870 struct param_plan *clsplans[NB_CLASSES]; /* per class lists of param plans */
873 #define add_param_plan(plan,pplan,class) \
874 do { \
875 pplan.prev = plan->clsplans[class]; \
876 plan->pplans[plan ## _nb] = pplan; \
877 plan->clsplans[class] = &plan->pplans[plan ## _nb++]; \
878 } while(0)
880 /* Assign parameters to registers and stack with alignment according to the
881 rules in the procedure call standard for the ARM architecture (AAPCS).
882 The overall assignment is recorded in an array of per parameter structures
883 called parameter plans. The parameter plans are also further organized in a
884 number of linked lists, one per class of parameter (see the comment for the
885 definition of union reg_class).
887 nb_args: number of parameters of the function for which a call is generated
888 variadic: whether the function is a variadic function or not
889 plan: the structure where the overall assignment is recorded
890 todo: a bitmap that record which core registers hold a parameter
892 Returns the amount of stack space needed for parameter passing
894 Note: this function allocated an array in plan->pplans with tcc_malloc. It
895 is the responsability of the caller to free this array once used (ie not
896 before copy_params). */
897 static int assign_regs(int nb_args, int variadic, struct plan *plan, int *todo)
899 int i, size, align;
900 int ncrn /* next core register number */, nsaa /* next stacked argument address*/;
901 int plan_nb = 0;
902 struct param_plan pplan;
903 #ifdef TCC_ARM_HARDFLOAT
904 struct avail_regs avregs = AVAIL_REGS_INITIALIZER;
905 #endif
907 ncrn = nsaa = 0;
908 *todo = 0;
909 plan->pplans = tcc_malloc(nb_args * sizeof(*plan->pplans));
910 memset(plan->clsplans, 0, sizeof(plan->clsplans));
911 for(i = nb_args; i-- ;) {
912 int j, start_vfpreg = 0;
913 size = type_size(&vtop[-i].type, &align);
914 switch(vtop[-i].type.t & VT_BTYPE) {
915 case VT_STRUCT:
916 case VT_FLOAT:
917 case VT_DOUBLE:
918 case VT_LDOUBLE:
919 #ifdef TCC_ARM_HARDFLOAT
920 if (!variadic) {
921 int is_hfa = 0; /* Homogeneous float aggregate */
923 if (is_float(vtop[-i].type.t)
924 || (is_hfa = is_hgen_float_aggr(&vtop[-i].type))) {
925 int end_vfpreg;
927 start_vfpreg = assign_vfpreg(&avregs, align, size);
928 end_vfpreg = start_vfpreg + ((size - 1) >> 2);
929 if (start_vfpreg >= 0) {
930 pplan = (struct param_plan) {start_vfpreg, end_vfpreg, &vtop[-i]};
931 if (is_hfa)
932 add_param_plan(plan, pplan, VFP_STRUCT_CLASS);
933 else
934 add_param_plan(plan, pplan, VFP_CLASS);
935 continue;
936 } else
937 break;
940 #endif
941 ncrn = (ncrn + (align-1)/4) & -(align/4);
942 size = (size + 3) & -4;
943 if (ncrn + size/4 <= 4 || (ncrn < 4 && start_vfpreg != -1)) {
944 /* The parameter is allocated both in core register and on stack. As
945 * such, it can be of either class: it would either be the last of
946 * CORE_STRUCT_CLASS or the first of STACK_CLASS. */
947 for (j = ncrn; j < 4 && j < ncrn + size / 4; j++)
948 *todo|=(1<<j);
949 pplan = (struct param_plan) {ncrn, j, &vtop[-i]};
950 add_param_plan(plan, pplan, CORE_STRUCT_CLASS);
951 ncrn += size/4;
952 if (ncrn > 4)
953 nsaa = (ncrn - 4) * 4;
954 } else {
955 ncrn = 4;
956 break;
958 continue;
959 default:
960 if (ncrn < 4) {
961 int is_long = (vtop[-i].type.t & VT_BTYPE) == VT_LLONG;
963 if (is_long) {
964 ncrn = (ncrn + 1) & -2;
965 if (ncrn == 4)
966 break;
968 pplan = (struct param_plan) {ncrn, ncrn, &vtop[-i]};
969 ncrn++;
970 if (is_long)
971 pplan.end = ncrn++;
972 add_param_plan(plan, pplan, CORE_CLASS);
973 continue;
976 nsaa = (nsaa + (align - 1)) & ~(align - 1);
977 pplan = (struct param_plan) {nsaa, nsaa + size, &vtop[-i]};
978 add_param_plan(plan, pplan, STACK_CLASS);
979 nsaa += size; /* size already rounded up before */
981 return nsaa;
984 #undef add_param_plan
986 /* Copy parameters to their final destination (core reg, VFP reg or stack) for
987 function call.
989 nb_args: number of parameters the function take
990 plan: the overall assignment plan for parameters
991 todo: a bitmap indicating what core reg will hold a parameter
993 Returns the number of SValue added by this function on the value stack */
994 static int copy_params(int nb_args, struct plan *plan, int todo)
996 int size, align, r, i, nb_extra_sval = 0;
997 struct param_plan *pplan;
999 /* Several constraints require parameters to be copied in a specific order:
1000 - structures are copied to the stack before being loaded in a reg;
1001 - floats loaded to an odd numbered VFP reg are first copied to the
1002 preceding even numbered VFP reg and then moved to the next VFP reg.
1004 It is thus important that:
1005 - structures assigned to core regs must be copied after parameters
1006 assigned to the stack but before structures assigned to VFP regs because
1007 a structure can lie partly in core registers and partly on the stack;
1008 - parameters assigned to the stack and all structures be copied before
1009 parameters assigned to a core reg since copying a parameter to the stack
1010 require using a core reg;
1011 - parameters assigned to VFP regs be copied before structures assigned to
1012 VFP regs as the copy might use an even numbered VFP reg that already
1013 holds part of a structure. */
1014 for(i = 0; i < NB_CLASSES; i++) {
1015 for(pplan = plan->clsplans[i]; pplan; pplan = pplan->prev) {
1016 vpushv(pplan->sval);
1017 pplan->sval->r = pplan->sval->r2 = VT_CONST; /* disable entry */
1018 switch(i) {
1019 case STACK_CLASS:
1020 case CORE_STRUCT_CLASS:
1021 case VFP_STRUCT_CLASS:
1022 if ((pplan->sval->type.t & VT_BTYPE) == VT_STRUCT) {
1023 int padding = 0;
1024 size = type_size(&pplan->sval->type, &align);
1025 /* align to stack align size */
1026 size = (size + 3) & ~3;
1027 if (i == STACK_CLASS && pplan->prev)
1028 padding = pplan->start - pplan->prev->end;
1029 size += padding; /* Add padding if any */
1030 /* allocate the necessary size on stack */
1031 gadd_sp(-size);
1032 /* generate structure store */
1033 r = get_reg(RC_INT);
1034 o(0xE28D0000|(intr(r)<<12)|padding); /* add r, sp, padding */
1035 vset(&vtop->type, r | VT_LVAL, 0);
1036 vswap();
1037 vstore(); /* memcpy to current sp + potential padding */
1039 /* Homogeneous float aggregate are loaded to VFP registers
1040 immediately since there is no way of loading data in multiple
1041 non consecutive VFP registers as what is done for other
1042 structures (see the use of todo). */
1043 if (i == VFP_STRUCT_CLASS) {
1044 int first = pplan->start, nb = pplan->end - first + 1;
1045 /* vpop.32 {pplan->start, ..., pplan->end} */
1046 o(0xECBD0A00|(first&1)<<22|(first>>1)<<12|nb);
1047 /* No need to write the register used to a SValue since VFP regs
1048 cannot be used for gcall_or_jmp */
1050 } else {
1051 if (is_float(pplan->sval->type.t)) {
1052 #ifdef TCC_ARM_VFP
1053 r = vfpr(gv(RC_FLOAT)) << 12;
1054 if ((pplan->sval->type.t & VT_BTYPE) == VT_FLOAT)
1055 size = 4;
1056 else {
1057 size = 8;
1058 r |= 0x101; /* vpush.32 -> vpush.64 */
1060 o(0xED2D0A01 + r); /* vpush */
1061 #else
1062 r = fpr(gv(RC_FLOAT)) << 12;
1063 if ((pplan->sval->type.t & VT_BTYPE) == VT_FLOAT)
1064 size = 4;
1065 else if ((pplan->sval->type.t & VT_BTYPE) == VT_DOUBLE)
1066 size = 8;
1067 else
1068 size = LDOUBLE_SIZE;
1070 if (size == 12)
1071 r |= 0x400000;
1072 else if(size == 8)
1073 r|=0x8000;
1075 o(0xED2D0100|r|(size>>2)); /* some kind of vpush for FPA */
1076 #endif
1077 } else {
1078 /* simple type (currently always same size) */
1079 /* XXX: implicit cast ? */
1080 size=4;
1081 if ((pplan->sval->type.t & VT_BTYPE) == VT_LLONG) {
1082 lexpand_nr();
1083 size = 8;
1084 r = gv(RC_INT);
1085 o(0xE52D0004|(intr(r)<<12)); /* push r */
1086 vtop--;
1088 r = gv(RC_INT);
1089 o(0xE52D0004|(intr(r)<<12)); /* push r */
1091 if (i == STACK_CLASS && pplan->prev)
1092 gadd_sp(pplan->prev->end - pplan->start); /* Add padding if any */
1094 break;
1096 case VFP_CLASS:
1097 gv(regmask(TREG_F0 + (pplan->start >> 1)));
1098 if (pplan->start & 1) { /* Must be in upper part of double register */
1099 o(0xEEF00A40|((pplan->start>>1)<<12)|(pplan->start>>1)); /* vmov.f32 s(n+1), sn */
1100 vtop->r = VT_CONST; /* avoid being saved on stack by gv for next float */
1102 break;
1104 case CORE_CLASS:
1105 if ((pplan->sval->type.t & VT_BTYPE) == VT_LLONG) {
1106 lexpand_nr();
1107 gv(regmask(pplan->end));
1108 pplan->sval->r2 = vtop->r;
1109 vtop--;
1111 gv(regmask(pplan->start));
1112 /* Mark register as used so that gcall_or_jmp use another one
1113 (regs >=4 are free as never used to pass parameters) */
1114 pplan->sval->r = vtop->r;
1115 break;
1117 vtop--;
1121 /* Manually free remaining registers since next parameters are loaded
1122 * manually, without the help of gv(int). */
1123 save_regs(nb_args);
1125 if(todo) {
1126 o(0xE8BD0000|todo); /* pop {todo} */
1127 for(pplan = plan->clsplans[CORE_STRUCT_CLASS]; pplan; pplan = pplan->prev) {
1128 int r;
1129 pplan->sval->r = pplan->start;
1130 /* An SValue can only pin 2 registers at best (r and r2) but a structure
1131 can occupy more than 2 registers. Thus, we need to push on the value
1132 stack some fake parameter to have on SValue for each registers used
1133 by a structure (r2 is not used). */
1134 for (r = pplan->start + 1; r <= pplan->end; r++) {
1135 if (todo & (1 << r)) {
1136 nb_extra_sval++;
1137 vpushi(0);
1138 vtop->r = r;
1143 return nb_extra_sval;
1146 /* Generate function call. The function address is pushed first, then
1147 all the parameters in call order. This functions pops all the
1148 parameters and the function address. */
1149 void gfunc_call(int nb_args)
1151 int r, args_size;
1152 int variadic;
1153 int todo;
1154 struct plan plan;
1156 variadic = (vtop[-nb_args].type.ref->c == FUNC_ELLIPSIS);
1157 /* cannot let cpu flags if other instruction are generated. Also avoid leaving
1158 VT_JMP anywhere except on the top of the stack because it would complicate
1159 the code generator. */
1160 r = vtop->r & VT_VALMASK;
1161 if (r == VT_CMP || (r & ~1) == VT_JMP)
1162 gv(RC_INT);
1164 args_size = assign_regs(nb_args, variadic, &plan, &todo);
1166 #ifdef TCC_ARM_EABI
1167 if (args_size & 7) { /* Stack must be 8 byte aligned at fct call for EABI */
1168 args_size = (args_size + 7) & ~7;
1169 o(0xE24DD004); /* sub sp, sp, #4 */
1171 #endif
1173 nb_args += copy_params(nb_args, &plan, todo);
1174 tcc_free(plan.pplans);
1176 /* Move fct SValue on top as required by gcall_or_jmp */
1177 vrotb(nb_args + 1);
1178 gcall_or_jmp(0);
1179 if (args_size)
1180 gadd_sp(args_size); /* pop all parameters passed on the stack */
1181 #ifdef TCC_ARM_EABI
1182 #ifdef TCC_ARM_VFP
1183 #ifdef TCC_ARM_HARDFLOAT
1184 if(variadic && is_float(vtop->type.ref->type.t)) {
1185 #else
1186 rf(is_float(vtop->type.ref->type.t)) {
1187 #endif
1188 if((vtop->type.ref->type.t & VT_BTYPE) == VT_FLOAT) {
1189 o(0xEE000A10); /*vmov s0, r0 */
1190 } else {
1191 o(0xEE000B10); /* vmov.32 d0[0], r0 */
1192 o(0xEE201B10); /* vmov.32 d0[1], r1 */
1195 #endif
1196 #endif
1197 vtop -= nb_args + 1; /* Pop all params and fct address from value stack */
1198 leaffunc = 0; /* we are calling a function, so we aren't in a leaf function */
1201 /* generate function prolog of type 't' */
1202 void gfunc_prolog(CType *func_type)
1204 Sym *sym,*sym2;
1205 int n,nf,size,align, variadic, struct_ret = 0;
1206 #ifdef TCC_ARM_HARDFLOAT
1207 struct avail_regs avregs = AVAIL_REGS_INITIALIZER;
1208 #endif
1210 sym = func_type->ref;
1211 func_vt = sym->type;
1213 n = nf = 0;
1214 variadic = (func_type->ref->c == FUNC_ELLIPSIS);
1215 if((func_vt.t & VT_BTYPE) == VT_STRUCT
1216 #ifdef TCC_ARM_HARDFLOAT
1217 && (variadic || !is_hgen_float_aggr(&func_vt))
1218 #endif
1219 && type_size(&func_vt,&align) > 4)
1221 n++;
1222 struct_ret = 1;
1223 func_vc = 12; /* Offset from fp of the place to store the result */
1225 for(sym2=sym->next;sym2 && (n<4 || nf<16);sym2=sym2->next) {
1226 size = type_size(&sym2->type, &align);
1227 #ifdef TCC_ARM_HARDFLOAT
1228 if (!variadic && (is_float(sym2->type.t)
1229 || is_hgen_float_aggr(&sym2->type))) {
1230 int tmpnf = assign_vfpreg(&avregs, align, size);
1231 tmpnf += (size + 3) / 4;
1232 nf = (tmpnf > nf) ? tmpnf : nf;
1233 } else
1234 #endif
1235 if (n < 4)
1236 n += (size + 3) / 4;
1238 o(0xE1A0C00D); /* mov ip,sp */
1239 if(variadic)
1240 n=4;
1241 if(n) {
1242 if(n>4)
1243 n=4;
1244 #ifdef TCC_ARM_EABI
1245 n=(n+1)&-2;
1246 #endif
1247 o(0xE92D0000|((1<<n)-1)); /* save r0-r4 on stack if needed */
1249 if (nf) {
1250 if (nf>16)
1251 nf=16;
1252 nf=(nf+1)&-2; /* nf => HARDFLOAT => EABI */
1253 o(0xED2D0A00|nf); /* save s0-s15 on stack if needed */
1255 o(0xE92D5800); /* save fp, ip, lr */
1256 o(0xE1A0B00D); /* mov fp, sp */
1257 func_sub_sp_offset = ind;
1258 o(0xE1A00000); /* nop, leave space for stack adjustment in epilogue */
1260 int addr, pn = struct_ret, sn = 0; /* pn=core, sn=stack */
1262 #ifdef TCC_ARM_HARDFLOAT
1263 func_vc += nf * 4;
1264 avregs = AVAIL_REGS_INITIALIZER;
1265 #endif
1266 while ((sym = sym->next)) {
1267 CType *type;
1268 type = &sym->type;
1269 size = type_size(type, &align);
1270 size = (size + 3) >> 2;
1271 align = (align + 3) & ~3;
1272 #ifdef TCC_ARM_HARDFLOAT
1273 if (!variadic && (is_float(sym->type.t)
1274 || is_hgen_float_aggr(&sym->type))) {
1275 int fpn = assign_vfpreg(&avregs, align, size << 2);
1276 if (fpn >= 0) {
1277 addr = fpn * 4;
1278 } else
1279 goto from_stack;
1280 } else
1281 #endif
1282 if (pn < 4) {
1283 #ifdef TCC_ARM_EABI
1284 pn = (pn + (align-1)/4) & -(align/4);
1285 #endif
1286 addr = (nf + pn) * 4;
1287 pn += size;
1288 if (!sn && pn > 4)
1289 sn = (pn - 4);
1290 } else {
1291 #ifdef TCC_ARM_HARDFLOAT
1292 from_stack:
1293 #endif
1294 #ifdef TCC_ARM_EABI
1295 sn = (sn + (align-1)/4) & -(align/4);
1296 #endif
1297 addr = (n + nf + sn) * 4;
1298 sn += size;
1300 sym_push(sym->v & ~SYM_FIELD, type, VT_LOCAL | lvalue_type(type->t), addr+12);
1303 last_itod_magic=0;
1304 leaffunc = 1;
1305 loc = 0;
1308 /* generate function epilog */
1309 void gfunc_epilog(void)
1311 uint32_t x;
1312 int diff;
1313 #ifdef TCC_ARM_EABI
1314 /* Useless but harmless copy of the float result into main register(s) in case
1315 of variadic function in the hardfloat variant */
1316 if(is_float(func_vt.t)) {
1317 if((func_vt.t & VT_BTYPE) == VT_FLOAT)
1318 o(0xEE100A10); /* fmrs r0, s0 */
1319 else {
1320 o(0xEE100B10); /* fmrdl r0, d0 */
1321 o(0xEE301B10); /* fmrdh r1, d0 */
1324 #endif
1325 o(0xE89BA800); /* restore fp, sp, pc */
1326 diff = (-loc + 3) & -4;
1327 #ifdef TCC_ARM_EABI
1328 if(!leaffunc)
1329 diff = ((diff + 11) & -8) - 4;
1330 #endif
1331 if(diff > 0) {
1332 x=stuff_const(0xE24BD000, diff); /* sub sp,fp,# */
1333 if(x)
1334 *(uint32_t *)(cur_text_section->data + func_sub_sp_offset) = x;
1335 else {
1336 int addr;
1337 addr=ind;
1338 o(0xE59FC004); /* ldr ip,[pc+4] */
1339 o(0xE04BD00C); /* sub sp,fp,ip */
1340 o(0xE1A0F00E); /* mov pc,lr */
1341 o(diff);
1342 *(uint32_t *)(cur_text_section->data + func_sub_sp_offset) = 0xE1000000|encbranch(func_sub_sp_offset,addr,1);
1347 /* generate a jump to a label */
1348 int gjmp(int t)
1350 int r;
1351 r=ind;
1352 o(0xE0000000|encbranch(r,t,1));
1353 return r;
1356 /* generate a jump to a fixed address */
1357 void gjmp_addr(int a)
1359 gjmp(a);
1362 /* generate a test. set 'inv' to invert test. Stack entry is popped */
1363 int gtst(int inv, int t)
1365 int v, r;
1366 uint32_t op;
1367 v = vtop->r & VT_VALMASK;
1368 r=ind;
1369 if (v == VT_CMP) {
1370 op=mapcc(inv?negcc(vtop->c.i):vtop->c.i);
1371 op|=encbranch(r,t,1);
1372 o(op);
1373 t=r;
1374 } else if (v == VT_JMP || v == VT_JMPI) {
1375 if ((v & 1) == inv) {
1376 if(!vtop->c.i)
1377 vtop->c.i=t;
1378 else {
1379 uint32_t *x;
1380 int p,lp;
1381 if(t) {
1382 p = vtop->c.i;
1383 do {
1384 p = decbranch(lp=p);
1385 } while(p);
1386 x = (uint32_t *)(cur_text_section->data + lp);
1387 *x &= 0xff000000;
1388 *x |= encbranch(lp,t,1);
1390 t = vtop->c.i;
1392 } else {
1393 t = gjmp(t);
1394 gsym(vtop->c.i);
1396 } else {
1397 if (is_float(vtop->type.t)) {
1398 r=gv(RC_FLOAT);
1399 #ifdef TCC_ARM_VFP
1400 o(0xEEB50A40|(vfpr(r)<<12)|T2CPR(vtop->type.t)); /* fcmpzX */
1401 o(0xEEF1FA10); /* fmstat */
1402 #else
1403 o(0xEE90F118|(fpr(r)<<16));
1404 #endif
1405 vtop->r = VT_CMP;
1406 vtop->c.i = TOK_NE;
1407 return gtst(inv, t);
1408 } else if ((vtop->r & (VT_VALMASK | VT_LVAL | VT_SYM)) == VT_CONST) {
1409 /* constant jmp optimization */
1410 if ((vtop->c.i != 0) != inv)
1411 t = gjmp(t);
1412 } else {
1413 v = gv(RC_INT);
1414 o(0xE3300000|(intr(v)<<16));
1415 vtop->r = VT_CMP;
1416 vtop->c.i = TOK_NE;
1417 return gtst(inv, t);
1420 vtop--;
1421 return t;
1424 /* generate an integer binary operation */
1425 void gen_opi(int op)
1427 int c, func = 0;
1428 uint32_t opc = 0, r, fr;
1429 unsigned short retreg = REG_IRET;
1431 c=0;
1432 switch(op) {
1433 case '+':
1434 opc = 0x8;
1435 c=1;
1436 break;
1437 case TOK_ADDC1: /* add with carry generation */
1438 opc = 0x9;
1439 c=1;
1440 break;
1441 case '-':
1442 opc = 0x4;
1443 c=1;
1444 break;
1445 case TOK_SUBC1: /* sub with carry generation */
1446 opc = 0x5;
1447 c=1;
1448 break;
1449 case TOK_ADDC2: /* add with carry use */
1450 opc = 0xA;
1451 c=1;
1452 break;
1453 case TOK_SUBC2: /* sub with carry use */
1454 opc = 0xC;
1455 c=1;
1456 break;
1457 case '&':
1458 opc = 0x0;
1459 c=1;
1460 break;
1461 case '^':
1462 opc = 0x2;
1463 c=1;
1464 break;
1465 case '|':
1466 opc = 0x18;
1467 c=1;
1468 break;
1469 case '*':
1470 gv2(RC_INT, RC_INT);
1471 r = vtop[-1].r;
1472 fr = vtop[0].r;
1473 vtop--;
1474 o(0xE0000090|(intr(r)<<16)|(intr(r)<<8)|intr(fr));
1475 return;
1476 case TOK_SHL:
1477 opc = 0;
1478 c=2;
1479 break;
1480 case TOK_SHR:
1481 opc = 1;
1482 c=2;
1483 break;
1484 case TOK_SAR:
1485 opc = 2;
1486 c=2;
1487 break;
1488 case '/':
1489 case TOK_PDIV:
1490 func=TOK___divsi3;
1491 c=3;
1492 break;
1493 case TOK_UDIV:
1494 func=TOK___udivsi3;
1495 c=3;
1496 break;
1497 case '%':
1498 #ifdef TCC_ARM_EABI
1499 func=TOK___aeabi_idivmod;
1500 retreg=REG_LRET;
1501 #else
1502 func=TOK___modsi3;
1503 #endif
1504 c=3;
1505 break;
1506 case TOK_UMOD:
1507 #ifdef TCC_ARM_EABI
1508 func=TOK___aeabi_uidivmod;
1509 retreg=REG_LRET;
1510 #else
1511 func=TOK___umodsi3;
1512 #endif
1513 c=3;
1514 break;
1515 case TOK_UMULL:
1516 gv2(RC_INT, RC_INT);
1517 r=intr(vtop[-1].r2=get_reg(RC_INT));
1518 c=vtop[-1].r;
1519 vtop[-1].r=get_reg_ex(RC_INT,regmask(c));
1520 vtop--;
1521 o(0xE0800090|(r<<16)|(intr(vtop->r)<<12)|(intr(c)<<8)|intr(vtop[1].r));
1522 return;
1523 default:
1524 opc = 0x15;
1525 c=1;
1526 break;
1528 switch(c) {
1529 case 1:
1530 if((vtop[-1].r & (VT_VALMASK | VT_LVAL | VT_SYM)) == VT_CONST) {
1531 if(opc == 4 || opc == 5 || opc == 0xc) {
1532 vswap();
1533 opc|=2; // sub -> rsb
1536 if ((vtop->r & VT_VALMASK) == VT_CMP ||
1537 (vtop->r & (VT_VALMASK & ~1)) == VT_JMP)
1538 gv(RC_INT);
1539 vswap();
1540 c=intr(gv(RC_INT));
1541 vswap();
1542 opc=0xE0000000|(opc<<20)|(c<<16);
1543 if((vtop->r & (VT_VALMASK | VT_LVAL | VT_SYM)) == VT_CONST) {
1544 uint32_t x;
1545 x=stuff_const(opc|0x2000000,vtop->c.i);
1546 if(x) {
1547 r=intr(vtop[-1].r=get_reg_ex(RC_INT,regmask(vtop[-1].r)));
1548 o(x|(r<<12));
1549 goto done;
1552 fr=intr(gv(RC_INT));
1553 r=intr(vtop[-1].r=get_reg_ex(RC_INT,two2mask(vtop->r,vtop[-1].r)));
1554 o(opc|(r<<12)|fr);
1555 done:
1556 vtop--;
1557 if (op >= TOK_ULT && op <= TOK_GT) {
1558 vtop->r = VT_CMP;
1559 vtop->c.i = op;
1561 break;
1562 case 2:
1563 opc=0xE1A00000|(opc<<5);
1564 if ((vtop->r & VT_VALMASK) == VT_CMP ||
1565 (vtop->r & (VT_VALMASK & ~1)) == VT_JMP)
1566 gv(RC_INT);
1567 vswap();
1568 r=intr(gv(RC_INT));
1569 vswap();
1570 opc|=r;
1571 if ((vtop->r & (VT_VALMASK | VT_LVAL | VT_SYM)) == VT_CONST) {
1572 fr=intr(vtop[-1].r=get_reg_ex(RC_INT,regmask(vtop[-1].r)));
1573 c = vtop->c.i & 0x1f;
1574 o(opc|(c<<7)|(fr<<12));
1575 } else {
1576 fr=intr(gv(RC_INT));
1577 c=intr(vtop[-1].r=get_reg_ex(RC_INT,two2mask(vtop->r,vtop[-1].r)));
1578 o(opc|(c<<12)|(fr<<8)|0x10);
1580 vtop--;
1581 break;
1582 case 3:
1583 vpush_global_sym(&func_old_type, func);
1584 vrott(3);
1585 gfunc_call(2);
1586 vpushi(0);
1587 vtop->r = retreg;
1588 break;
1589 default:
1590 tcc_error("gen_opi %i unimplemented!",op);
1594 #ifdef TCC_ARM_VFP
1595 static int is_zero(int i)
1597 if((vtop[i].r & (VT_VALMASK | VT_LVAL | VT_SYM)) != VT_CONST)
1598 return 0;
1599 if (vtop[i].type.t == VT_FLOAT)
1600 return (vtop[i].c.f == 0.f);
1601 else if (vtop[i].type.t == VT_DOUBLE)
1602 return (vtop[i].c.d == 0.0);
1603 return (vtop[i].c.ld == 0.l);
1606 /* generate a floating point operation 'v = t1 op t2' instruction. The
1607 * two operands are guaranted to have the same floating point type */
1608 void gen_opf(int op)
1610 uint32_t x;
1611 int fneg=0,r;
1612 x=0xEE000A00|T2CPR(vtop->type.t);
1613 switch(op) {
1614 case '+':
1615 if(is_zero(-1))
1616 vswap();
1617 if(is_zero(0)) {
1618 vtop--;
1619 return;
1621 x|=0x300000;
1622 break;
1623 case '-':
1624 x|=0x300040;
1625 if(is_zero(0)) {
1626 vtop--;
1627 return;
1629 if(is_zero(-1)) {
1630 x|=0x810000; /* fsubX -> fnegX */
1631 vswap();
1632 vtop--;
1633 fneg=1;
1635 break;
1636 case '*':
1637 x|=0x200000;
1638 break;
1639 case '/':
1640 x|=0x800000;
1641 break;
1642 default:
1643 if(op < TOK_ULT || op > TOK_GT) {
1644 tcc_error("unknown fp op %x!",op);
1645 return;
1647 if(is_zero(-1)) {
1648 vswap();
1649 switch(op) {
1650 case TOK_LT: op=TOK_GT; break;
1651 case TOK_GE: op=TOK_ULE; break;
1652 case TOK_LE: op=TOK_GE; break;
1653 case TOK_GT: op=TOK_ULT; break;
1656 x|=0xB40040; /* fcmpX */
1657 if(op!=TOK_EQ && op!=TOK_NE)
1658 x|=0x80; /* fcmpX -> fcmpeX */
1659 if(is_zero(0)) {
1660 vtop--;
1661 o(x|0x10000|(vfpr(gv(RC_FLOAT))<<12)); /* fcmp(e)X -> fcmp(e)zX */
1662 } else {
1663 x|=vfpr(gv(RC_FLOAT));
1664 vswap();
1665 o(x|(vfpr(gv(RC_FLOAT))<<12));
1666 vtop--;
1668 o(0xEEF1FA10); /* fmstat */
1670 switch(op) {
1671 case TOK_LE: op=TOK_ULE; break;
1672 case TOK_LT: op=TOK_ULT; break;
1673 case TOK_UGE: op=TOK_GE; break;
1674 case TOK_UGT: op=TOK_GT; break;
1677 vtop->r = VT_CMP;
1678 vtop->c.i = op;
1679 return;
1681 r=gv(RC_FLOAT);
1682 x|=vfpr(r);
1683 r=regmask(r);
1684 if(!fneg) {
1685 int r2;
1686 vswap();
1687 r2=gv(RC_FLOAT);
1688 x|=vfpr(r2)<<16;
1689 r|=regmask(r2);
1691 vtop->r=get_reg_ex(RC_FLOAT,r);
1692 if(!fneg)
1693 vtop--;
1694 o(x|(vfpr(vtop->r)<<12));
1697 #else
1698 static uint32_t is_fconst()
1700 long double f;
1701 uint32_t r;
1702 if((vtop->r & (VT_VALMASK | VT_LVAL | VT_SYM)) != VT_CONST)
1703 return 0;
1704 if (vtop->type.t == VT_FLOAT)
1705 f = vtop->c.f;
1706 else if (vtop->type.t == VT_DOUBLE)
1707 f = vtop->c.d;
1708 else
1709 f = vtop->c.ld;
1710 if(!ieee_finite(f))
1711 return 0;
1712 r=0x8;
1713 if(f<0.0) {
1714 r=0x18;
1715 f=-f;
1717 if(f==0.0)
1718 return r;
1719 if(f==1.0)
1720 return r|1;
1721 if(f==2.0)
1722 return r|2;
1723 if(f==3.0)
1724 return r|3;
1725 if(f==4.0)
1726 return r|4;
1727 if(f==5.0)
1728 return r|5;
1729 if(f==0.5)
1730 return r|6;
1731 if(f==10.0)
1732 return r|7;
1733 return 0;
1736 /* generate a floating point operation 'v = t1 op t2' instruction. The
1737 two operands are guaranted to have the same floating point type */
1738 void gen_opf(int op)
1740 uint32_t x, r, r2, c1, c2;
1741 //fputs("gen_opf\n",stderr);
1742 vswap();
1743 c1 = is_fconst();
1744 vswap();
1745 c2 = is_fconst();
1746 x=0xEE000100;
1747 #if LDOUBLE_SIZE == 8
1748 if ((vtop->type.t & VT_BTYPE) != VT_FLOAT)
1749 x|=0x80;
1750 #else
1751 if ((vtop->type.t & VT_BTYPE) == VT_DOUBLE)
1752 x|=0x80;
1753 else if ((vtop->type.t & VT_BTYPE) == VT_LDOUBLE)
1754 x|=0x80000;
1755 #endif
1756 switch(op)
1758 case '+':
1759 if(!c2) {
1760 vswap();
1761 c2=c1;
1763 vswap();
1764 r=fpr(gv(RC_FLOAT));
1765 vswap();
1766 if(c2) {
1767 if(c2>0xf)
1768 x|=0x200000; // suf
1769 r2=c2&0xf;
1770 } else {
1771 r2=fpr(gv(RC_FLOAT));
1773 break;
1774 case '-':
1775 if(c2) {
1776 if(c2<=0xf)
1777 x|=0x200000; // suf
1778 r2=c2&0xf;
1779 vswap();
1780 r=fpr(gv(RC_FLOAT));
1781 vswap();
1782 } else if(c1 && c1<=0xf) {
1783 x|=0x300000; // rsf
1784 r2=c1;
1785 r=fpr(gv(RC_FLOAT));
1786 vswap();
1787 } else {
1788 x|=0x200000; // suf
1789 vswap();
1790 r=fpr(gv(RC_FLOAT));
1791 vswap();
1792 r2=fpr(gv(RC_FLOAT));
1794 break;
1795 case '*':
1796 if(!c2 || c2>0xf) {
1797 vswap();
1798 c2=c1;
1800 vswap();
1801 r=fpr(gv(RC_FLOAT));
1802 vswap();
1803 if(c2 && c2<=0xf)
1804 r2=c2;
1805 else
1806 r2=fpr(gv(RC_FLOAT));
1807 x|=0x100000; // muf
1808 break;
1809 case '/':
1810 if(c2 && c2<=0xf) {
1811 x|=0x400000; // dvf
1812 r2=c2;
1813 vswap();
1814 r=fpr(gv(RC_FLOAT));
1815 vswap();
1816 } else if(c1 && c1<=0xf) {
1817 x|=0x500000; // rdf
1818 r2=c1;
1819 r=fpr(gv(RC_FLOAT));
1820 vswap();
1821 } else {
1822 x|=0x400000; // dvf
1823 vswap();
1824 r=fpr(gv(RC_FLOAT));
1825 vswap();
1826 r2=fpr(gv(RC_FLOAT));
1828 break;
1829 default:
1830 if(op >= TOK_ULT && op <= TOK_GT) {
1831 x|=0xd0f110; // cmfe
1832 /* bug (intention?) in Linux FPU emulator
1833 doesn't set carry if equal */
1834 switch(op) {
1835 case TOK_ULT:
1836 case TOK_UGE:
1837 case TOK_ULE:
1838 case TOK_UGT:
1839 tcc_error("unsigned comparision on floats?");
1840 break;
1841 case TOK_LT:
1842 op=TOK_Nset;
1843 break;
1844 case TOK_LE:
1845 op=TOK_ULE; /* correct in unordered case only if AC bit in FPSR set */
1846 break;
1847 case TOK_EQ:
1848 case TOK_NE:
1849 x&=~0x400000; // cmfe -> cmf
1850 break;
1852 if(c1 && !c2) {
1853 c2=c1;
1854 vswap();
1855 switch(op) {
1856 case TOK_Nset:
1857 op=TOK_GT;
1858 break;
1859 case TOK_GE:
1860 op=TOK_ULE;
1861 break;
1862 case TOK_ULE:
1863 op=TOK_GE;
1864 break;
1865 case TOK_GT:
1866 op=TOK_Nset;
1867 break;
1870 vswap();
1871 r=fpr(gv(RC_FLOAT));
1872 vswap();
1873 if(c2) {
1874 if(c2>0xf)
1875 x|=0x200000;
1876 r2=c2&0xf;
1877 } else {
1878 r2=fpr(gv(RC_FLOAT));
1880 vtop[-1].r = VT_CMP;
1881 vtop[-1].c.i = op;
1882 } else {
1883 tcc_error("unknown fp op %x!",op);
1884 return;
1887 if(vtop[-1].r == VT_CMP)
1888 c1=15;
1889 else {
1890 c1=vtop->r;
1891 if(r2&0x8)
1892 c1=vtop[-1].r;
1893 vtop[-1].r=get_reg_ex(RC_FLOAT,two2mask(vtop[-1].r,c1));
1894 c1=fpr(vtop[-1].r);
1896 vtop--;
1897 o(x|(r<<16)|(c1<<12)|r2);
1899 #endif
1901 /* convert integers to fp 't' type. Must handle 'int', 'unsigned int'
1902 and 'long long' cases. */
1903 ST_FUNC void gen_cvt_itof1(int t)
1905 uint32_t r, r2;
1906 int bt;
1907 bt=vtop->type.t & VT_BTYPE;
1908 if(bt == VT_INT || bt == VT_SHORT || bt == VT_BYTE) {
1909 #ifndef TCC_ARM_VFP
1910 uint32_t dsize = 0;
1911 #endif
1912 r=intr(gv(RC_INT));
1913 #ifdef TCC_ARM_VFP
1914 r2=vfpr(vtop->r=get_reg(RC_FLOAT));
1915 o(0xEE000A10|(r<<12)|(r2<<16)); /* fmsr */
1916 r2|=r2<<12;
1917 if(!(vtop->type.t & VT_UNSIGNED))
1918 r2|=0x80; /* fuitoX -> fsituX */
1919 o(0xEEB80A40|r2|T2CPR(t)); /* fYitoX*/
1920 #else
1921 r2=fpr(vtop->r=get_reg(RC_FLOAT));
1922 if((t & VT_BTYPE) != VT_FLOAT)
1923 dsize=0x80; /* flts -> fltd */
1924 o(0xEE000110|dsize|(r2<<16)|(r<<12)); /* flts */
1925 if((vtop->type.t & (VT_UNSIGNED|VT_BTYPE)) == (VT_UNSIGNED|VT_INT)) {
1926 uint32_t off = 0;
1927 o(0xE3500000|(r<<12)); /* cmp */
1928 r=fpr(get_reg(RC_FLOAT));
1929 if(last_itod_magic) {
1930 off=ind+8-last_itod_magic;
1931 off/=4;
1932 if(off>255)
1933 off=0;
1935 o(0xBD1F0100|(r<<12)|off); /* ldflts */
1936 if(!off) {
1937 o(0xEA000000); /* b */
1938 last_itod_magic=ind;
1939 o(0x4F800000); /* 4294967296.0f */
1941 o(0xBE000100|dsize|(r2<<16)|(r2<<12)|r); /* adflt */
1943 #endif
1944 return;
1945 } else if(bt == VT_LLONG) {
1946 int func;
1947 CType *func_type = 0;
1948 if((t & VT_BTYPE) == VT_FLOAT) {
1949 func_type = &func_float_type;
1950 if(vtop->type.t & VT_UNSIGNED)
1951 func=TOK___floatundisf;
1952 else
1953 func=TOK___floatdisf;
1954 #if LDOUBLE_SIZE != 8
1955 } else if((t & VT_BTYPE) == VT_LDOUBLE) {
1956 func_type = &func_ldouble_type;
1957 if(vtop->type.t & VT_UNSIGNED)
1958 func=TOK___floatundixf;
1959 else
1960 func=TOK___floatdixf;
1961 } else if((t & VT_BTYPE) == VT_DOUBLE) {
1962 #else
1963 } else if((t & VT_BTYPE) == VT_DOUBLE || (t & VT_BTYPE) == VT_LDOUBLE) {
1964 #endif
1965 func_type = &func_double_type;
1966 if(vtop->type.t & VT_UNSIGNED)
1967 func=TOK___floatundidf;
1968 else
1969 func=TOK___floatdidf;
1971 if(func_type) {
1972 vpush_global_sym(func_type, func);
1973 vswap();
1974 gfunc_call(1);
1975 vpushi(0);
1976 vtop->r=TREG_F0;
1977 return;
1980 tcc_error("unimplemented gen_cvt_itof %x!",vtop->type.t);
1983 /* convert fp to int 't' type */
1984 void gen_cvt_ftoi(int t)
1986 uint32_t r, r2;
1987 int u, func = 0;
1988 u=t&VT_UNSIGNED;
1989 t&=VT_BTYPE;
1990 r2=vtop->type.t & VT_BTYPE;
1991 if(t==VT_INT) {
1992 #ifdef TCC_ARM_VFP
1993 r=vfpr(gv(RC_FLOAT));
1994 u=u?0:0x10000;
1995 o(0xEEBC0AC0|(r<<12)|r|T2CPR(r2)|u); /* ftoXizY */
1996 r2=intr(vtop->r=get_reg(RC_INT));
1997 o(0xEE100A10|(r<<16)|(r2<<12));
1998 return;
1999 #else
2000 if(u) {
2001 if(r2 == VT_FLOAT)
2002 func=TOK___fixunssfsi;
2003 #if LDOUBLE_SIZE != 8
2004 else if(r2 == VT_LDOUBLE)
2005 func=TOK___fixunsxfsi;
2006 else if(r2 == VT_DOUBLE)
2007 #else
2008 else if(r2 == VT_LDOUBLE || r2 == VT_DOUBLE)
2009 #endif
2010 func=TOK___fixunsdfsi;
2011 } else {
2012 r=fpr(gv(RC_FLOAT));
2013 r2=intr(vtop->r=get_reg(RC_INT));
2014 o(0xEE100170|(r2<<12)|r);
2015 return;
2017 #endif
2018 } else if(t == VT_LLONG) { // unsigned handled in gen_cvt_ftoi1
2019 if(r2 == VT_FLOAT)
2020 func=TOK___fixsfdi;
2021 #if LDOUBLE_SIZE != 8
2022 else if(r2 == VT_LDOUBLE)
2023 func=TOK___fixxfdi;
2024 else if(r2 == VT_DOUBLE)
2025 #else
2026 else if(r2 == VT_LDOUBLE || r2 == VT_DOUBLE)
2027 #endif
2028 func=TOK___fixdfdi;
2030 if(func) {
2031 vpush_global_sym(&func_old_type, func);
2032 vswap();
2033 gfunc_call(1);
2034 vpushi(0);
2035 if(t == VT_LLONG)
2036 vtop->r2 = REG_LRET;
2037 vtop->r = REG_IRET;
2038 return;
2040 tcc_error("unimplemented gen_cvt_ftoi!");
2043 /* convert from one floating point type to another */
2044 void gen_cvt_ftof(int t)
2046 #ifdef TCC_ARM_VFP
2047 if(((vtop->type.t & VT_BTYPE) == VT_FLOAT) != ((t & VT_BTYPE) == VT_FLOAT)) {
2048 uint32_t r = vfpr(gv(RC_FLOAT));
2049 o(0xEEB70AC0|(r<<12)|r|T2CPR(vtop->type.t));
2051 #else
2052 /* all we have to do on i386 and FPA ARM is to put the float in a register */
2053 gv(RC_FLOAT);
2054 #endif
2057 /* computed goto support */
2058 void ggoto(void)
2060 gcall_or_jmp(1);
2061 vtop--;
2064 /* Save the stack pointer onto the stack and return the location of its address */
2065 ST_FUNC void gen_vla_sp_save(int addr) {
2066 tcc_error("variable length arrays unsupported for this target");
2069 /* Restore the SP from a location on the stack */
2070 ST_FUNC void gen_vla_sp_restore(int addr) {
2071 tcc_error("variable length arrays unsupported for this target");
2074 /* Subtract from the stack pointer, and push the resulting value onto the stack */
2075 ST_FUNC void gen_vla_alloc(CType *type, int align) {
2076 tcc_error("variable length arrays unsupported for this target");
2079 /* end of ARM code generator */
2080 /*************************************************************/
2081 #endif
2082 /*************************************************************/