added local bound generation
[tinycc.git] / i386-gen.c
blobdd9d4c4c29cfb436f738a6fa7c2e3715fadba916
1 /*
2 * X86 code generator for TCC
3 *
4 * Copyright (c) 2001 Fabrice Bellard
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 /* number of available registers */
22 #define NB_REGS 4
24 /* a register can belong to several classes */
25 #define RC_INT 0x0001 /* generic integer register */
26 #define RC_FLOAT 0x0002 /* generic float register */
27 #define RC_EAX 0x0004
28 #define RC_FRET 0x0008 /* function return: float register */
29 #define RC_ECX 0x0010
30 #define RC_EDX 0x0020
31 #define RC_IRET RC_EAX /* function return: integer register */
32 #define RC_LRET RC_EDX /* function return: second integer register */
34 /* pretty names for the registers */
35 enum {
36 REG_EAX = 0,
37 REG_ECX,
38 REG_EDX,
39 REG_ST0,
42 int reg_classes[NB_REGS] = {
43 /* eax */ RC_INT | RC_IRET,
44 /* ecx */ RC_INT | RC_ECX,
45 /* edx */ RC_INT | RC_EDX,
46 /* st0 */ RC_FLOAT | RC_FRET,
49 /* return registers for function */
50 #define REG_IRET REG_EAX /* single word int return register */
51 #define REG_LRET REG_EDX /* second word return register (for long long) */
52 #define REG_FRET REG_ST0 /* float return register */
54 /* defined if function parameters must be evaluated in reverse order */
55 #define INVERT_FUNC_PARAMS
57 /* defined if structures are passed as pointers. Otherwise structures
58 are directly pushed on stack. */
59 //#define FUNC_STRUCT_PARAM_AS_PTR
61 /* pointer size, in bytes */
62 #define PTR_SIZE 4
64 /* long double size and alignment, in bytes */
65 #define LDOUBLE_SIZE 12
66 #define LDOUBLE_ALIGN 4
68 /* function call context */
69 typedef struct GFuncContext {
70 int args_size;
71 } GFuncContext;
73 /******************************************************/
75 static int *func_sub_sp_ptr;
77 void g(int c)
79 *(char *)ind++ = c;
82 void o(int c)
84 while (c) {
85 g(c);
86 c = c / 256;
90 void gen_le32(int c)
92 g(c);
93 g(c >> 8);
94 g(c >> 16);
95 g(c >> 24);
98 /* patch relocation entry with value 'val' */
99 void greloc_patch1(Reloc *p, int val)
101 switch(p->type) {
102 case RELOC_ADDR32:
103 *(int *)p->addr = val;
104 break;
105 case RELOC_REL32:
106 *(int *)p->addr = val - p->addr - 4;
107 break;
111 /* output a symbol and patch all calls to it */
112 void gsym_addr(t, a)
114 int n;
115 while (t) {
116 n = *(int *)t; /* next value */
117 *(int *)t = a - t - 4;
118 t = n;
122 void gsym(t)
124 gsym_addr(t, ind);
127 /* psym is used to put an instruction with a data field which is a
128 reference to a symbol. It is in fact the same as oad ! */
129 #define psym oad
131 /* instruction + 4 bytes data. Return the address of the data */
132 int oad(int c, int s)
134 o(c);
135 *(int *)ind = s;
136 s = ind;
137 ind = ind + 4;
138 return s;
141 /* output constant with relocation if 'r & VT_FORWARD' is true */
142 void gen_addr32(int r, int c)
144 if (!(r & VT_FORWARD)) {
145 gen_le32(c);
146 } else {
147 greloc((Sym *)c, ind, RELOC_ADDR32);
148 gen_le32(0);
152 /* generate a modrm reference. 'op_reg' contains the addtionnal 3
153 opcode bits */
154 void gen_modrm(int op_reg, int r, int c)
156 op_reg = op_reg << 3;
157 if ((r & VT_VALMASK) == VT_CONST) {
158 /* constant memory reference */
159 o(0x05 | op_reg);
160 gen_addr32(r, c);
161 } else if ((r & VT_VALMASK) == VT_LOCAL) {
162 /* currently, we use only ebp as base */
163 if (c == (char)c) {
164 /* short reference */
165 o(0x45 | op_reg);
166 g(c);
167 } else {
168 oad(0x85 | op_reg, c);
170 } else {
171 g(0x00 | op_reg | (r & VT_VALMASK));
176 /* load 'r' from value 'sv' */
177 void load(int r, SValue *sv)
179 int v, t, ft, fc, fr;
180 SValue v1;
182 fr = sv->r;
183 ft = sv->t;
184 fc = sv->c.ul;
186 v = fr & VT_VALMASK;
187 if (fr & VT_LVAL) {
188 if (v == VT_LLOCAL) {
189 v1.t = VT_INT;
190 v1.r = VT_LOCAL | VT_LVAL;
191 v1.c.ul = fc;
192 load(r, &v1);
193 fr = r;
195 if ((ft & VT_BTYPE) == VT_FLOAT) {
196 o(0xd9); /* flds */
197 r = 0;
198 } else if ((ft & VT_BTYPE) == VT_DOUBLE) {
199 o(0xdd); /* fldl */
200 r = 0;
201 } else if ((ft & VT_BTYPE) == VT_LDOUBLE) {
202 o(0xdb); /* fldt */
203 r = 5;
204 } else if ((ft & VT_TYPE) == VT_BYTE)
205 o(0xbe0f); /* movsbl */
206 else if ((ft & VT_TYPE) == (VT_BYTE | VT_UNSIGNED))
207 o(0xb60f); /* movzbl */
208 else if ((ft & VT_TYPE) == VT_SHORT)
209 o(0xbf0f); /* movswl */
210 else if ((ft & VT_TYPE) == (VT_SHORT | VT_UNSIGNED))
211 o(0xb70f); /* movzwl */
212 else
213 o(0x8b); /* movl */
214 gen_modrm(r, fr, fc);
215 } else {
216 if (v == VT_CONST) {
217 o(0xb8 + r); /* mov $xx, r */
218 gen_addr32(fr, fc);
219 } else if (v == VT_LOCAL) {
220 o(0x8d); /* lea xxx(%ebp), r */
221 gen_modrm(r, VT_LOCAL, fc);
222 } else if (v == VT_CMP) {
223 oad(0xb8 + r, 0); /* mov $0, r */
224 o(0x0f); /* setxx %br */
225 o(fc);
226 o(0xc0 + r);
227 } else if (v == VT_JMP || v == VT_JMPI) {
228 t = v & 1;
229 oad(0xb8 + r, t); /* mov $1, r */
230 oad(0xe9, 5); /* jmp after */
231 gsym(fc);
232 oad(0xb8 + r, t ^ 1); /* mov $0, r */
233 } else if (v != r) {
234 o(0x89);
235 o(0xc0 + r + v * 8); /* mov v, r */
240 /* store register 'r' in lvalue 'v' */
241 void store(int r, SValue *v)
243 int fr, bt, ft, fc;
245 ft = v->t;
246 fc = v->c.ul;
247 fr = v->r & VT_VALMASK;
248 bt = ft & VT_BTYPE;
249 /* XXX: incorrect if float reg to reg */
250 if (bt == VT_FLOAT) {
251 o(0xd9); /* fsts */
252 r = 2;
253 } else if (bt == VT_DOUBLE) {
254 o(0xdd); /* fstpl */
255 r = 2;
256 } else if (bt == VT_LDOUBLE) {
257 o(0xc0d9); /* fld %st(0) */
258 o(0xdb); /* fstpt */
259 r = 7;
260 } else {
261 if (bt == VT_SHORT)
262 o(0x66);
263 if (bt == VT_BYTE)
264 o(0x88);
265 else
266 o(0x89);
268 if (fr == VT_CONST ||
269 fr == VT_LOCAL ||
270 (v->r & VT_LVAL)) {
271 gen_modrm(r, v->r, fc);
272 } else if (fr != r) {
273 o(0xc0 + fr + r * 8); /* mov r, fr */
277 /* start function call and return function call context */
278 void gfunc_start(GFuncContext *c)
280 c->args_size = 0;
283 /* push function parameter which is in (vtop->t, vtop->c). Stack entry
284 is then popped. */
285 void gfunc_param(GFuncContext *c)
287 int size, align, r;
289 if ((vtop->t & VT_BTYPE) == VT_STRUCT) {
290 size = type_size(vtop->t, &align);
291 /* align to stack align size */
292 size = (size + 3) & ~3;
293 /* allocate the necessary size on stack */
294 oad(0xec81, size); /* sub $xxx, %esp */
295 /* generate structure store */
296 r = get_reg(RC_INT);
297 o(0x89); /* mov %esp, r */
298 o(0xe0 + r);
299 vset(VT_INT, r, 0);
300 vswap();
301 vstore();
302 c->args_size += size;
303 } else if (is_float(vtop->t)) {
304 gv(RC_FLOAT); /* only one float register */
305 if ((vtop->t & VT_BTYPE) == VT_FLOAT)
306 size = 4;
307 else if ((vtop->t & VT_BTYPE) == VT_DOUBLE)
308 size = 8;
309 else
310 size = 12;
311 oad(0xec81, size); /* sub $xxx, %esp */
312 if (size == 12)
313 o(0x7cdb);
314 else
315 o(0x5cd9 + size - 4); /* fstp[s|l] 0(%esp) */
316 g(0x24);
317 g(0x00);
318 c->args_size += size;
319 } else {
320 /* simple type (currently always same size) */
321 /* XXX: implicit cast ? */
322 r = gv(RC_INT);
323 if ((vtop->t & VT_BTYPE) == VT_LLONG) {
324 size = 8;
325 o(0x50 + vtop->r2); /* push r */
326 } else {
327 size = 4;
329 o(0x50 + r); /* push r */
330 c->args_size += size;
332 vtop--;
335 /* generate function call with address in (vtop->t, vtop->c) and free function
336 context. Stack entry is popped */
337 void gfunc_call(GFuncContext *c)
339 int r;
340 if ((vtop->r & (VT_VALMASK | VT_LVAL)) == VT_CONST) {
341 /* constant case */
342 /* forward reference */
343 if (vtop->r & VT_FORWARD) {
344 greloc(vtop->c.sym, ind + 1, RELOC_REL32);
345 oad(0xe8, 0);
346 } else {
347 oad(0xe8, vtop->c.ul - ind - 5);
349 } else {
350 /* otherwise, indirect call */
351 r = gv(RC_INT);
352 o(0xff); /* call *r */
353 o(0xd0 + r);
355 if (c->args_size)
356 oad(0xc481, c->args_size); /* add $xxx, %esp */
357 vtop--;
360 /* generate function prolog of type 't' */
361 void gfunc_prolog(int t)
363 int addr, align, size, u;
364 Sym *sym;
366 sym = sym_find((unsigned)t >> VT_STRUCT_SHIFT);
367 addr = 8;
368 /* if the function returns a structure, then add an
369 implicit pointer parameter */
370 func_vt = sym->t;
371 if ((func_vt & VT_BTYPE) == VT_STRUCT) {
372 func_vc = addr;
373 addr += 4;
375 /* define parameters */
376 while ((sym = sym->next) != NULL) {
377 u = sym->t;
378 sym_push(sym->v & ~SYM_FIELD, u,
379 VT_LOCAL | VT_LVAL, addr);
380 size = type_size(u, &align);
381 size = (size + 3) & ~3;
382 #ifdef FUNC_STRUCT_PARAM_AS_PTR
383 /* structs are passed as pointer */
384 if ((u & VT_BTYPE) == VT_STRUCT) {
385 size = 4;
387 #endif
388 addr += size;
390 o(0xe58955); /* push %ebp, mov %esp, %ebp */
391 func_sub_sp_ptr = (int *)oad(0xec81, 0); /* sub $xxx, %esp */
394 /* generate function epilog */
395 void gfunc_epilog(void)
397 o(0xc3c9); /* leave, ret */
398 *func_sub_sp_ptr = (-loc + 3) & -4; /* align local size to word &
399 save local variables */
402 int gjmp(int t)
404 return psym(0xe9, t);
407 /* generate a test. set 'inv' to invert test. Stack entry is popped */
408 int gtst(int inv, int t)
410 int v, *p;
411 v = vtop->r & VT_VALMASK;
412 if (v == VT_CMP) {
413 /* fast case : can jump directly since flags are set */
414 g(0x0f);
415 t = psym((vtop->c.i - 16) ^ inv, t);
416 } else if (v == VT_JMP || v == VT_JMPI) {
417 /* && or || optimization */
418 if ((v & 1) == inv) {
419 /* insert vtop->c jump list in t */
420 p = &vtop->c.i;
421 while (*p != 0)
422 p = (int *)*p;
423 *p = t;
424 t = vtop->c.i;
425 } else {
426 t = gjmp(t);
427 gsym(vtop->c.i);
429 } else {
430 if (is_float(vtop->t)) {
431 vpushi(0);
432 gen_op(TOK_NE);
434 if ((vtop->r & (VT_VALMASK | VT_LVAL | VT_FORWARD)) == VT_CONST) {
435 /* constant jmp optimization */
436 if ((vtop->c.i != 0) != inv)
437 t = gjmp(t);
438 } else {
439 v = gv(RC_INT);
440 o(0x85);
441 o(0xc0 + v * 9);
442 g(0x0f);
443 t = psym(0x85 ^ inv, t);
446 vtop--;
447 return t;
450 /* generate an integer binary operation */
451 void gen_opi(int op)
453 int r, fr, opc, c;
455 switch(op) {
456 case '+':
457 case TOK_ADDC1: /* add with carry generation */
458 opc = 0;
459 gen_op8:
460 vswap();
461 r = gv(RC_INT);
462 vswap();
463 if ((vtop->r & (VT_VALMASK | VT_LVAL | VT_FORWARD)) == VT_CONST) {
464 /* constant case */
465 c = vtop->c.i;
466 if (c == (char)c) {
467 /* XXX: generate inc and dec for smaller code ? */
468 o(0x83);
469 o(0xc0 | (opc << 3) | r);
470 g(c);
471 } else {
472 o(0x81);
473 oad(0xc0 | (opc << 3) | r, c);
475 } else {
476 fr = gv(RC_INT);
477 o((opc << 3) | 0x01);
478 o(0xc0 + r + fr * 8);
480 vtop--;
481 if (op >= TOK_ULT && op <= TOK_GT) {
482 vtop--;
483 vset(VT_INT, VT_CMP, op);
485 break;
486 case '-':
487 case TOK_SUBC1: /* sub with carry generation */
488 opc = 5;
489 goto gen_op8;
490 case TOK_ADDC2: /* add with carry use */
491 opc = 2;
492 goto gen_op8;
493 case TOK_SUBC2: /* sub with carry use */
494 opc = 3;
495 goto gen_op8;
496 case '&':
497 opc = 4;
498 goto gen_op8;
499 case '^':
500 opc = 6;
501 goto gen_op8;
502 case '|':
503 opc = 1;
504 goto gen_op8;
505 case '*':
506 vswap();
507 r = gv(RC_INT);
508 vswap();
509 fr = gv(RC_INT);
510 vtop--;
511 o(0xaf0f); /* imul fr, r */
512 o(0xc0 + fr + r * 8);
513 break;
514 case TOK_SHL:
515 opc = 4;
516 goto gen_shift;
517 case TOK_SHR:
518 opc = 5;
519 goto gen_shift;
520 case TOK_SAR:
521 opc = 7;
522 gen_shift:
523 vswap();
524 r = gv(RC_INT);
525 vswap();
526 opc = 0xc0 | (opc << 3);
527 if ((vtop->r & (VT_VALMASK | VT_LVAL | VT_FORWARD)) == VT_CONST) {
528 /* constant case */
529 c = vtop->c.i & 0x1f;
530 o(0xc1); /* shl/shr/sar $xxx, r */
531 o(opc | r);
532 g(c);
533 } else {
534 /* we generate the shift in ecx */
535 gv(RC_ECX);
536 /* the first op may have been spilled, so we reload it if
537 needed */
538 vswap();
539 r = gv(RC_INT);
540 vswap();
541 o(0xd3); /* shl/shr/sar %cl, r */
542 o(opc | r);
544 vtop--;
545 vtop->r = r;
546 break;
547 case '/':
548 case TOK_UDIV:
549 case TOK_PDIV:
550 case '%':
551 case TOK_UMOD:
552 case TOK_UMULL:
553 vswap();
554 r = gv(RC_EAX); /* first operand must be in eax */
555 vswap();
556 /* XXX: need better constraint */
557 fr = gv(RC_ECX); /* second operand in ecx */
558 vswap();
559 r = gv(RC_EAX); /* reload first operand if flushed */
560 vswap();
561 vtop--;
562 save_reg(REG_EDX);
563 if (op == TOK_UMULL) {
564 o(0xf7); /* mul fr */
565 o(0xe0 + fr);
566 vtop->r2 = REG_EDX;
567 r = REG_EAX;
568 } else {
569 if (op == TOK_UDIV || op == TOK_UMOD) {
570 o(0xf7d231); /* xor %edx, %edx, div fr, %eax */
571 o(0xf0 + fr);
572 } else {
573 o(0xf799); /* cltd, idiv fr, %eax */
574 o(0xf8 + fr);
576 if (op == '%' || op == TOK_UMOD)
577 r = REG_EDX;
578 else
579 r = REG_EAX;
581 vtop->r = r;
582 break;
583 default:
584 opc = 7;
585 goto gen_op8;
589 /* generate a floating point operation 'v = t1 op t2' instruction. The
590 two operands are guaranted to have the same floating point type */
591 /* NOTE: currently floats can only be lvalues */
592 void gen_opf(int op)
594 int a, ft, fc, swapped;
596 /* convert constants to memory references */
597 if ((vtop[-1].r & (VT_VALMASK | VT_LVAL)) == VT_CONST) {
598 vswap();
599 gv(RC_FLOAT);
600 vswap();
602 if ((vtop[0].r & (VT_VALMASK | VT_LVAL)) == VT_CONST)
603 gv(RC_FLOAT);
605 /* must put at least one value in the floating point register */
606 if ((vtop[-1].r & VT_LVAL) &&
607 (vtop[0].r & VT_LVAL)) {
608 vswap();
609 gv(RC_FLOAT);
610 vswap();
612 if (op >= TOK_ULT && op <= TOK_GT) {
613 /* load on stack second operand */
614 load(REG_ST0, vtop);
615 if (op == TOK_GE || op == TOK_GT)
616 o(0xc9d9); /* fxch %st(1) */
617 o(0xe9da); /* fucompp */
618 o(0xe0df); /* fnstsw %ax */
619 if (op == TOK_EQ) {
620 o(0x45e480); /* and $0x45, %ah */
621 o(0x40fC80); /* cmp $0x40, %ah */
622 } else if (op == TOK_NE) {
623 o(0x45e480); /* and $0x45, %ah */
624 o(0x40f480); /* xor $0x40, %ah */
625 op = TOK_NE;
626 } else if (op == TOK_GE || op == TOK_LE) {
627 o(0x05c4f6); /* test $0x05, %ah */
628 op = TOK_EQ;
629 } else {
630 o(0x45c4f6); /* test $0x45, %ah */
631 op = TOK_EQ;
633 vtop--;
634 vtop->r = VT_CMP;
635 vtop->c.i = op;
636 } else {
637 swapped = 0;
638 /* swap the stack if needed so that t1 is the register and t2 is
639 the memory reference */
640 if (vtop[-1].r & VT_LVAL) {
641 vswap();
642 swapped = 1;
644 /* no memory reference possible for long double operations */
645 if ((vtop->t & VT_BTYPE) == VT_LDOUBLE) {
646 load(REG_ST0, vtop);
647 swapped = !swapped;
650 switch(op) {
651 default:
652 case '+':
653 a = 0;
654 break;
655 case '-':
656 a = 4;
657 if (swapped)
658 a++;
659 break;
660 case '*':
661 a = 1;
662 break;
663 case '/':
664 a = 6;
665 if (swapped)
666 a++;
667 break;
669 ft = vtop->t;
670 fc = vtop->c.ul;
671 if ((ft & VT_BTYPE) == VT_LDOUBLE) {
672 o(0xde); /* fxxxp %st, %st(1) */
673 o(0xc1 + (a << 3));
674 } else {
675 if ((ft & VT_BTYPE) == VT_DOUBLE)
676 o(0xdc);
677 else
678 o(0xd8);
679 gen_modrm(a, vtop->r, fc);
681 vtop--;
685 /* FPU control word for rounding to nearest mode */
686 /* XXX: should move that into tcc lib support code ! */
687 static unsigned short __tcc_fpu_control = 0x137f;
688 /* FPU control word for round to zero mode for int convertion */
689 static unsigned short __tcc_int_fpu_control = 0x137f | 0x0c00;
691 /* convert integers to fp 't' type. Must handle 'int', 'unsigned int'
692 and 'long long' cases. */
693 void gen_cvt_itof(int t)
695 gv(RC_INT);
696 if ((vtop->t & VT_BTYPE) == VT_LLONG) {
697 /* signed long long to float/double/long double (unsigned case
698 is handled generically) */
699 o(0x50 + vtop->r2); /* push r2 */
700 o(0x50 + (vtop->r & VT_VALMASK)); /* push r */
701 o(0x242cdf); /* fildll (%esp) */
702 o(0x08c483); /* add $8, %esp */
703 } else if ((vtop->t & (VT_BTYPE | VT_UNSIGNED)) ==
704 (VT_INT | VT_UNSIGNED)) {
705 /* unsigned int to float/double/long double */
706 o(0x6a); /* push $0 */
707 g(0x00);
708 o(0x50 + (vtop->r & VT_VALMASK)); /* push r */
709 o(0x242cdf); /* fildll (%esp) */
710 o(0x08c483); /* add $8, %esp */
711 } else {
712 /* int to float/double/long double */
713 o(0x50 + (vtop->r & VT_VALMASK)); /* push r */
714 o(0x2404db); /* fildl (%esp) */
715 o(0x04c483); /* add $4, %esp */
717 vtop->r = REG_ST0;
720 /* convert fp to int 't' type */
721 /* XXX: handle long long case */
722 void gen_cvt_ftoi(int t)
724 int r, r2, size;
726 gv(RC_FLOAT);
727 if (t != VT_INT)
728 size = 8;
729 else
730 size = 4;
732 oad(0x2dd9, (int)&__tcc_int_fpu_control); /* ldcw xxx */
733 oad(0xec81, size); /* sub $xxx, %esp */
734 if (size == 4)
735 o(0x1cdb); /* fistpl */
736 else
737 o(0x3cdf); /* fistpll */
738 o(0x24);
739 oad(0x2dd9, (int)&__tcc_fpu_control); /* ldcw xxx */
740 r = get_reg(RC_INT);
741 o(0x58 + r); /* pop r */
742 if (size == 8) {
743 if (t == VT_LLONG) {
744 vtop->r = r; /* mark reg as used */
745 r2 = get_reg(RC_INT);
746 o(0x58 + r2); /* pop r2 */
747 vtop->r2 = r2;
748 } else {
749 o(0x04c483); /* add $4, %esp */
752 vtop->r = r;
755 /* convert from one floating point type to another */
756 void gen_cvt_ftof(int t)
758 /* all we have to do on i386 is to put the float in a register */
759 gv(RC_FLOAT);
762 /* end of X86 code generator */
763 /*************************************************************/