2 * x86-64 code generator for TCC
4 * Copyright (c) 2008 Shinichiro Hamaji
6 * Based on i386-gen.c by Fabrice Bellard
8 * This library is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU Lesser General Public
10 * License as published by the Free Software Foundation; either
11 * version 2 of the License, or (at your option) any later version.
13 * This library is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * Lesser General Public License for more details.
18 * You should have received a copy of the GNU Lesser General Public
19 * License along with this library; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 #ifdef TARGET_DEFS_ONLY
25 /* number of available registers */
29 /* a register can belong to several classes. The classes must be
30 sorted from more general to more precise (see gv2() code which does
31 assumptions on it). */
32 #define RC_INT 0x0001 /* generic integer register */
33 #define RC_FLOAT 0x0002 /* generic float register */
37 #define RC_ST0 0x0020 /* only for long double */
40 #define RC_XMM0 0x0100
41 #define RC_XMM1 0x0200
42 #define RC_XMM2 0x0400
43 #define RC_XMM3 0x0800
44 #define RC_XMM4 0x1000
45 #define RC_XMM5 0x2000
46 #define RC_XMM6 0x4000
47 #define RC_XMM7 0x8000
48 #define RC_RSI 0x10000
49 #define RC_RDI 0x20000
50 #define RC_INT1 0x40000 /* function_pointer */
51 #define RC_INT2 0x80000
52 #define RC_RBX 0x100000
53 #define RC_R10 0x200000
54 #define RC_R11 0x400000
55 #define RC_R12 0x800000
56 #define RC_R13 0x1000000
57 #define RC_R14 0x2000000
58 #define RC_R15 0x4000000
59 #define RC_IRET RC_RAX /* function return: integer register */
60 #define RC_LRET RC_RDX /* function return: second integer register */
61 #define RC_FRET RC_XMM0 /* function return: float register */
62 #define RC_QRET RC_XMM1 /* function return: second float register */
63 #define RC_MASK (RC_INT|RC_INT1|RC_INT2|RC_FLOAT)
65 /* pretty names for the registers */
91 #define REX_BASE(reg) (((reg) >> 3) & 1)
92 #define REG_VALUE(reg) ((reg) & 7)
95 /* return registers for function */
96 #define REG_IRET TREG_RAX /* single word int return register */
97 #define REG_LRET TREG_RDX /* second word return register (for long long) */
98 #define REG_FRET TREG_XMM0 /* float return register */
99 #define REG_QRET TREG_XMM1 /* second float return register */
101 /* defined if function parameters must be evaluated in reverse order */
102 #define INVERT_FUNC_PARAMS
104 /* pointer size, in bytes */
107 /* long double size and alignment, in bytes */
108 #define LDOUBLE_SIZE 16
109 #define LDOUBLE_ALIGN 16
110 /* maximum alignment (for aligned attribute support) */
113 /******************************************************/
116 #define EM_TCC_TARGET EM_X86_64
118 /* relocation type for 32 bit data relocation */
119 #define R_DATA_32 R_X86_64_32
120 #define R_DATA_PTR R_X86_64_64
121 #define R_JMP_SLOT R_X86_64_JUMP_SLOT
122 #define R_COPY R_X86_64_COPY
124 #define ELF_START_ADDR 0x400000
125 #define ELF_PAGE_SIZE 0x200000
127 /******************************************************/
128 #else /* ! TARGET_DEFS_ONLY */
129 /******************************************************/
133 ST_DATA
const int reg_classes
[NB_REGS
] = {
134 /* eax */ RC_INT
|RC_RAX
|RC_INT2
,
135 /* ecx */ RC_INT
|RC_RCX
|RC_INT2
,
136 /* edx */ RC_INT
|RC_RDX
,
137 RC_INT
|RC_INT1
|RC_INT2
|RC_RBX
,
142 RC_INT
|RC_R8
|RC_INT2
,
143 RC_INT
|RC_R9
|RC_INT2
,
144 RC_INT
|RC_INT1
|RC_INT2
|RC_R10
,
145 RC_INT
|RC_INT1
|RC_INT2
|RC_R11
,
146 RC_INT
|RC_INT1
|RC_INT2
|RC_R12
,
147 RC_INT
|RC_INT1
|RC_INT2
|RC_R13
,
148 RC_INT
|RC_INT1
|RC_INT2
|RC_R14
,
149 RC_INT
|RC_INT1
|RC_INT2
|RC_R15
,
150 /* xmm0 */ RC_FLOAT
| RC_XMM0
,
160 static unsigned long func_sub_sp_offset
;
161 static int func_ret_sub
;
163 /* XXX: make it faster ? */
168 if (ind1
> cur_text_section
->data_allocated
)
169 section_realloc(cur_text_section
, ind1
);
170 cur_text_section
->data
[ind
] = c
;
174 void o(unsigned int c
)
196 void gen_le64(int64_t c
)
208 void orex(int ll
, int r
, int r2
, int b
)
210 if ((r
& VT_VALMASK
) >= VT_CONST
)
212 if ((r2
& VT_VALMASK
) >= VT_CONST
)
214 if (ll
|| REX_BASE(r
) || REX_BASE(r2
))
215 o(0x40 | REX_BASE(r
) | (REX_BASE(r2
) << 2) | (ll
<< 3));
219 /* output a symbol and patch all calls to it */
220 void gsym_addr(int t
, int a
)
224 ptr
= (int *)(cur_text_section
->data
+ t
);
225 n
= *ptr
; /* next value */
236 /* psym is used to put an instruction with a data field which is a
237 reference to a symbol. It is in fact the same as oad ! */
240 static int is64_type(int t
)
242 return ((t
& VT_BTYPE
) == VT_PTR
||
243 (t
& VT_BTYPE
) == VT_FUNC
||
244 (t
& VT_BTYPE
) == VT_LLONG
);
247 /* instruction + 4 bytes data. Return the address of the data */
248 ST_FUNC
int oad(int c
, int s
)
254 if (ind1
> cur_text_section
->data_allocated
)
255 section_realloc(cur_text_section
, ind1
);
256 *(int *)(cur_text_section
->data
+ ind
) = s
;
262 ST_FUNC
void gen_addr32(int r
, Sym
*sym
, int c
)
265 greloc(cur_text_section
, sym
, ind
, R_X86_64_32
);
269 /* output constant with relocation if 'r & VT_SYM' is true */
270 ST_FUNC
void gen_addr64(int r
, Sym
*sym
, int64_t c
)
273 greloc(cur_text_section
, sym
, ind
, R_X86_64_64
);
277 /* output constant with relocation if 'r & VT_SYM' is true */
278 ST_FUNC
void gen_addrpc32(int r
, Sym
*sym
, int c
)
281 greloc(cur_text_section
, sym
, ind
, R_X86_64_PC32
);
285 /* output got address with relocation */
286 static void gen_gotpcrel(int r
, Sym
*sym
, int c
)
288 #ifndef TCC_TARGET_PE
291 greloc(cur_text_section
, sym
, ind
, R_X86_64_GOTPCREL
);
292 sr
= cur_text_section
->reloc
;
293 rel
= (ElfW(Rela
) *)(sr
->data
+ sr
->data_offset
- sizeof(ElfW(Rela
)));
296 printf("picpic: %s %x %x | %02x %02x %02x\n", get_tok_str(sym
->v
, NULL
), c
, r
,
297 cur_text_section
->data
[ind
-3],
298 cur_text_section
->data
[ind
-2],
299 cur_text_section
->data
[ind
-1]
301 greloc(cur_text_section
, sym
, ind
, R_X86_64_PC32
);
305 /* we use add c, %xxx for displacement */
307 o(0xc0 + REG_VALUE(r
));
312 static void gen_modrm_impl(int op_reg
, int fr
, Sym
*sym
, int c
, int flag
)
314 int r
= fr
& VT_VALMASK
;
315 op_reg
= REG_VALUE(op_reg
) << 3;
317 /* constant memory reference */
319 if (flag
& FLAG_GOT
) {
320 gen_gotpcrel(fr
, sym
, c
);
322 gen_addrpc32(fr
, sym
, c
);
324 } else if (r
== VT_LOCAL
) {
325 /* currently, we use only ebp as base */
327 /* short reference */
331 oad(0x85 | op_reg
, c
);
335 /* short reference */
336 g(0x40 | op_reg
| REG_VALUE(fr
));
341 g(0x80 | op_reg
| REG_VALUE(fr
));
347 g(0x00 | op_reg
| REG_VALUE(fr
));
353 /* generate a modrm reference. 'op_reg' contains the addtionnal 3
355 static void gen_modrm(int op_reg
, int r
, Sym
*sym
, int c
)
357 gen_modrm_impl(op_reg
, r
, sym
, c
, 0);
360 /* generate a modrm reference. 'op_reg' contains the addtionnal 3
362 static void gen_modrm64(int opcode
, int op_reg
, int r
, Sym
*sym
, int c
)
365 if((op_reg
& TREG_MEM
) && !(sym
->type
.t
& VT_STATIC
))
367 orex(1, r
, op_reg
, opcode
);
368 gen_modrm_impl(op_reg
, r
, sym
, c
, flag
);
372 /* load 'r' from value 'sv' */
373 void load(int r
, SValue
*sv
)
375 int v
, t
, ft
, fc
, fr
, ll
;
380 sv
= pe_getimport(sv
, &v2
);
384 ft
= sv
->type
.t
& ~VT_DEFSIGN
;
388 #ifndef TCC_TARGET_PE
389 /* we use indirect access via got */
390 if ((fr
& VT_VALMASK
) == VT_CONST
&& (fr
& VT_SYM
) &&
391 (fr
& VT_LVAL
) && !(sv
->sym
->type
.t
& VT_STATIC
)) {
392 /* use the result register as a temporal register */
395 /* we cannot use float registers as a temporal register */
396 tr
= get_reg(RC_INT
) | TREG_MEM
;
400 gen_modrm64(0x8b, tr
, fr
, sv
->sym
, 0);
401 /* load from the temporal register */
408 if (v
== VT_LLOCAL
) {
410 v1
.r
= VT_LOCAL
| VT_LVAL
;
413 if (!(reg_classes
[fr
] & RC_INT
))
414 fr
= get_reg(RC_INT
);
419 if ((ft
& VT_BTYPE
) == VT_FLOAT
) {
420 b
= 0x100ff3; /* movss */
421 } else if ((ft
& VT_BTYPE
) == VT_DOUBLE
) {
422 b
= 0x100ff2; /* movds */
423 } else if ((ft
& VT_BTYPE
) == VT_LDOUBLE
) {
424 b
= 0xdb, r
= 5; /* fldt */
425 } else if ((ft
& VT_TYPE
) == VT_BYTE
|| (ft
& VT_TYPE
) == VT_BOOL
) {
426 b
= 0xbe0f; /* movsbl */
427 } else if ((ft
& VT_TYPE
) == (VT_BYTE
| VT_UNSIGNED
)) {
428 b
= 0xb60f; /* movzbl */
429 } else if ((ft
& VT_TYPE
) == VT_SHORT
) {
430 b
= 0xbf0f; /* movswl */
431 } else if ((ft
& VT_TYPE
) == (VT_SHORT
| VT_UNSIGNED
)) {
432 b
= 0xb70f; /* movzwl */
434 assert(((ft
& VT_BTYPE
) == VT_INT
) || ((ft
& VT_BTYPE
) == VT_LLONG
)
435 || ((ft
& VT_BTYPE
) == VT_PTR
) || ((ft
& VT_BTYPE
) == VT_ENUM
)
436 || ((ft
& VT_BTYPE
) == VT_FUNC
));
440 gen_modrm(r
, fr
, sv
->sym
, fc
);
446 o(0x05 + REG_VALUE(r
) * 8); /* lea xx(%rip), r */
447 gen_addrpc32(fr
, sv
->sym
, fc
);
449 if (sv
->sym
->type
.t
& VT_STATIC
) {
451 o(0x05 + REG_VALUE(r
) * 8); /* lea xx(%rip), r */
452 gen_addrpc32(fr
, sv
->sym
, fc
);
455 o(0x05 + REG_VALUE(r
) * 8); /* mov xx(%rip), r */
456 gen_gotpcrel(r
, sv
->sym
, fc
);
460 orex(ll
,r
,0, 0xb8 + REG_VALUE(r
)); /* mov $xx, r */
466 } else if (v
== VT_LOCAL
) {
467 orex(1,0,r
,0x8d); /* lea xxx(%ebp), r */
468 gen_modrm(r
, VT_LOCAL
, sv
->sym
, fc
);
469 } else if (v
== VT_CMP
) {
470 orex(0, r
, 0, 0xb8 + REG_VALUE(r
));
471 if ((fc
& ~0x100) == TOK_NE
){
472 gen_le32(1);/* mov $0, r */
474 gen_le32(0);/* mov $1, r */
478 /* This was a float compare. If the parity bit is
479 set the result was unordered, meaning false for everything
480 except TOK_NE, and true for TOK_NE. */
481 o(0x037a + (REX_BASE(r
) << 8));/* jp 3*/
483 orex(0,r
,0, 0x0f); /* setxx %br */
485 o(0xc0 + REG_VALUE(r
));
486 } else if (v
== VT_JMP
|| v
== VT_JMPI
) {
489 oad(0xb8 + REG_VALUE(r
), t
); /* mov $1, r */
490 o(0x05eb + (REX_BASE(r
) << 8)); /* jmp after */
493 oad(0xb8 + REG_VALUE(r
), t
^ 1); /* mov $0, r */
495 if (reg_classes
[r
] & RC_FLOAT
) {
497 /* gen_cvt_ftof(VT_DOUBLE); */
498 o(0xf0245cdd); /* fstpl -0x10(%rsp) */
499 /* movsd -0x10(%rsp),%xmm0 */
501 o(0xf02444 + REG_VALUE(r
)*8);
502 }else if(reg_classes
[v
] & RC_FLOAT
){
504 o(0xc0 + REG_VALUE(v
) + REG_VALUE(r
)*8);
507 } else if (r
== TREG_ST0
) {
508 assert(reg_classes
[v
] & RC_FLOAT
);
509 /* gen_cvt_ftof(VT_LDOUBLE); */
510 /* movsd %xmm0,-0x10(%rsp) */
512 o(0xf02444 + REG_VALUE(v
)*8);
513 o(0xf02444dd); /* fldl -0x10(%rsp) */
516 orex(1,fr
,r
,0x8d); /* lea xxx(%ebp), r */
517 gen_modrm(r
, fr
, sv
->sym
, fc
);
520 o(0xc0 + REG_VALUE(v
) + REG_VALUE(r
) * 8); /* mov v, r */
527 /* store register 'r' in lvalue 'v' */
528 void store(int r
, SValue
*sv
)
530 int fr
, bt
, ft
, fc
, ll
, v
;
534 sv
= pe_getimport(sv
, &v2
);
536 ft
= sv
->type
.t
& ~VT_DEFSIGN
;
543 //#ifndef TCC_TARGET_PE
544 /* we need to access the variable via got */
545 // if (fr == VT_CONST && (v->r & VT_SYM)) {
546 /* mov xx(%rip), %r11 */
548 // gen_gotpcrel(TREG_R11, v->sym, v->c.ul);
549 //pic = is64_type(bt) ? 0x49 : 0x41;
553 /* XXX: incorrect if float reg to reg */
554 if (bt
== VT_FLOAT
) {
555 orex(0, fr
, r
, 0x110ff3); /* movss */
556 } else if (bt
== VT_DOUBLE
) {
557 orex(0, fr
, r
, 0x110ff2);/* movds */
558 } else if (bt
== VT_LDOUBLE
) {
559 o(0xc0d9); /* fld %st(0) */
560 orex(0, fr
, r
, 0xdb);/* fstpt */
565 if (bt
== VT_BYTE
|| bt
== VT_BOOL
)
566 orex(ll
, fr
, r
, 0x88);
568 orex(ll
, fr
, r
, 0x89);
571 if (v
== VT_CONST
|| v
== VT_LOCAL
|| (fr
& VT_LVAL
)) {
572 gen_modrm(r
, fr
, sv
->sym
, fc
);
574 /* XXX: don't we really come here? */
576 o(0xc0 + REG_VALUE(v
) + REG_VALUE(r
)*8); /* mov r, fr */
580 /* 'is_jmp' is '1' if it is a jump */
581 static void gcall_or_jmp(int is_jmp
)
584 if ((vtop
->r
& (VT_VALMASK
| VT_LVAL
)) == VT_CONST
) {
586 if (vtop
->r
& VT_SYM
) {
587 /* relocation case */
588 greloc(cur_text_section
, vtop
->sym
,
589 ind
+ 1, R_X86_64_PLT32
);
591 /* put an empty PC32 relocation */
592 put_elf_reloc(symtab_section
, cur_text_section
,
593 ind
+ 1, R_X86_64_PC32
, 0);
595 oad(0xe8 + is_jmp
, vtop
->c
.ul
- 4); /* call/jmp im */
597 /* otherwise, indirect call */
598 r
= get_reg(RC_INT1
);
600 orex(0, r
, 0, 0xff); /* REX call/jmp *r */
601 o(0xd0 + REG_VALUE(r
) + (is_jmp
<< 4));
605 void struct_copy(SValue
*d
, SValue
*s
, SValue
*c
)
613 o(0xa4f3);// rep movsb
616 void gen_putz(SValue
*d
, int size
)
624 o(0xb8 + REG_VALUE(TREG_RCX
)); /* mov $xx, r */
630 /* Generate function call. The function address is pushed first, then
631 all the parameters in call order. This functions pops all the
632 parameters and the function address. */
633 void gen_offs_sp(int b
, int r
, int off
)
640 o(0x2404 | (REG_VALUE(r
) << 3));
641 }else if (off
== (char)off
) {
642 o(0x2444 | (REG_VALUE(r
) << 3));
645 o(0x2484 | (REG_VALUE(r
) << 3));
650 static int func_scratch
;
656 static const uint8_t arg_regs
[REGN
] = {
657 TREG_RCX
, TREG_RDX
, TREG_R8
, TREG_R9
660 /* Prepare arguments in R10 and R11 rather than RCX and RDX
661 because gv() will not ever use these */
662 static int arg_prepare_reg(int idx
) {
663 if (idx
== 0 || idx
== 1)
664 /* idx=0: r10, idx=1: r11 */
667 return arg_regs
[idx
];
670 /* Return the number of registers needed to return the struct, or 0 if
671 returning via struct pointer. */
672 ST_FUNC
int gfunc_sret(CType
*vt
, int variadic
, CType
*ret
, int *ret_align
)
675 *ret_align
= 1; // Never have to re-align return values for x86-64
676 size
= type_size(vt
, &align
);
680 } else if (size
> 4) {
683 } else if (size
> 2) {
686 } else if (size
> 1) {
695 static int is_sse_float(int t
) {
698 return bt
== VT_DOUBLE
|| bt
== VT_FLOAT
;
701 int gfunc_arg_size(CType
*type
) {
703 if (type
->t
& (VT_ARRAY
|VT_BITFIELD
))
705 return type_size(type
, &align
);
708 void gfunc_call(int nb_args
)
710 int size
, r
, args_size
, i
, d
, bt
, struct_size
;
713 args_size
= (nb_args
< REGN
? REGN
: nb_args
) * PTR_SIZE
;
716 /* for struct arguments, we need to call memcpy and the function
717 call breaks register passing arguments we are preparing.
718 So, we process arguments which will be passed by stack first. */
719 struct_size
= args_size
;
720 for(i
= 0; i
< nb_args
; i
++) {
725 bt
= (sv
->type
.t
& VT_BTYPE
);
726 size
= gfunc_arg_size(&sv
->type
);
729 continue; /* arguments smaller than 8 bytes passed in registers or on stack */
731 if (bt
== VT_STRUCT
) {
732 /* align to stack align size */
733 size
= (size
+ 15) & ~15;
734 /* generate structure store */
736 gen_offs_sp(0x8d, r
, struct_size
);
739 /* generate memcpy call */
740 vset(&sv
->type
, r
| VT_LVAL
, 0);
744 } else if (bt
== VT_LDOUBLE
) {
746 gen_offs_sp(0xdb, 0x107, struct_size
);
751 if (func_scratch
< struct_size
)
752 func_scratch
= struct_size
;
755 struct_size
= args_size
;
757 for(i
= 0; i
< nb_args
; i
++) {
759 bt
= (vtop
->type
.t
& VT_BTYPE
);
761 size
= gfunc_arg_size(&vtop
->type
);
763 /* align to stack align size */
764 size
= (size
+ 15) & ~15;
767 gen_offs_sp(0x8d, d
, struct_size
);
768 gen_offs_sp(0x89, d
, arg
*8);
770 d
= arg_prepare_reg(arg
);
771 gen_offs_sp(0x8d, d
, struct_size
);
775 if (is_sse_float(vtop
->type
.t
)) {
776 gv(RC_XMM0
); /* only use one float register */
778 /* movq %xmm0, j*8(%rsp) */
779 gen_offs_sp(0xd60f66, 0x100, arg
*8);
781 /* movaps %xmm0, %xmmN */
783 o(0xc0 + (arg
<< 3));
784 d
= arg_prepare_reg(arg
);
785 /* mov %xmm0, %rxx */
788 o(0xc0 + REG_VALUE(d
));
791 if (bt
== VT_STRUCT
) {
792 vtop
->type
.ref
= NULL
;
793 vtop
->type
.t
= size
> 4 ? VT_LLONG
: size
> 2 ? VT_INT
794 : size
> 1 ? VT_SHORT
: VT_BYTE
;
799 gen_offs_sp(0x89, r
, arg
*8);
801 d
= arg_prepare_reg(arg
);
802 orex(1,d
,r
,0x89); /* mov */
803 o(0xc0 + REG_VALUE(r
) * 8 + REG_VALUE(d
));
811 /* Copy R10 and R11 into RCX and RDX, respectively */
813 o(0xd1894c); /* mov %r10, %rcx */
815 o(0xda894c); /* mov %r11, %rdx */
824 #define FUNC_PROLOG_SIZE 11
826 /* generate function prolog of type 't' */
827 void gfunc_prolog(CType
*func_type
)
829 int addr
, reg_param_index
, bt
, size
;
833 func_ret_sub
= func_scratch
= r_loc
= 0;
837 ind
+= FUNC_PROLOG_SIZE
;
838 func_sub_sp_offset
= ind
;
841 sym
= func_type
->ref
;
843 /* if the function returns a structure, then add an
844 implicit pointer parameter */
846 func_var
= (sym
->c
== FUNC_ELLIPSIS
);
847 size
= gfunc_arg_size(&func_vt
);
849 gen_modrm64(0x89, arg_regs
[reg_param_index
], VT_LOCAL
, NULL
, addr
);
855 /* define parameters */
856 while ((sym
= sym
->next
) != NULL
) {
858 bt
= type
->t
& VT_BTYPE
;
859 size
= gfunc_arg_size(type
);
861 if (reg_param_index
< REGN
) {
862 gen_modrm64(0x89, arg_regs
[reg_param_index
], VT_LOCAL
, NULL
, addr
);
864 sym_push(sym
->v
& ~SYM_FIELD
, type
, VT_LOCAL
| VT_LVAL
| VT_REF
, addr
);
866 if (reg_param_index
< REGN
) {
867 /* save arguments passed by register */
868 if ((bt
== VT_FLOAT
) || (bt
== VT_DOUBLE
)) {
869 o(0xd60f66); /* movq */
870 gen_modrm(reg_param_index
, VT_LOCAL
, NULL
, addr
);
872 gen_modrm64(0x89, arg_regs
[reg_param_index
], VT_LOCAL
, NULL
, addr
);
875 sym_push(sym
->v
& ~SYM_FIELD
, type
, VT_LOCAL
| VT_LVAL
, addr
);
881 while (reg_param_index
< REGN
) {
882 if (func_type
->ref
->c
== FUNC_ELLIPSIS
) {
883 gen_modrm64(0x89, arg_regs
[reg_param_index
], VT_LOCAL
, NULL
, addr
);
890 /* generate function epilog */
891 void gfunc_epilog(void)
896 if (func_ret_sub
== 0) {
901 g(func_ret_sub
>> 8);
905 ind
= func_sub_sp_offset
- FUNC_PROLOG_SIZE
;
906 /* align local size to word & save local variables */
907 v
= (func_scratch
+ -loc
+ 15) & -16;
910 Sym
*sym
= external_global_sym(TOK___chkstk
, &func_old_type
, 0);
911 oad(0xb8, v
); /* mov stacksize, %eax */
912 oad(0xe8, -4); /* call __chkstk, (does the stackframe too) */
913 greloc(cur_text_section
, sym
, ind
-4, R_X86_64_PC32
);
914 o(0x90); /* fill for FUNC_PROLOG_SIZE = 11 bytes */
916 o(0xe5894855); /* push %rbp, mov %rsp, %rbp */
917 o(0xec8148); /* sub rsp, stacksize */
921 cur_text_section
->data_offset
= saved_ind
;
922 pe_add_unwind_data(ind
, saved_ind
, v
);
923 ind
= cur_text_section
->data_offset
;
928 typedef enum X86_64_Mode
{
936 static X86_64_Mode
classify_x86_64_merge(X86_64_Mode a
, X86_64_Mode b
)
940 else if (a
== x86_64_mode_none
)
942 else if (b
== x86_64_mode_none
)
944 else if ((a
== x86_64_mode_memory
) || (b
== x86_64_mode_memory
))
945 return x86_64_mode_memory
;
946 else if ((a
== x86_64_mode_integer
) || (b
== x86_64_mode_integer
))
947 return x86_64_mode_integer
;
948 else if ((a
== x86_64_mode_x87
) || (b
== x86_64_mode_x87
))
949 return x86_64_mode_memory
;
951 return x86_64_mode_sse
;
954 static X86_64_Mode
classify_x86_64_inner(CType
*ty
)
959 switch (ty
->t
& VT_BTYPE
) {
960 case VT_VOID
: return x86_64_mode_none
;
970 case VT_ENUM
: return x86_64_mode_integer
;
974 case VT_DOUBLE
: return x86_64_mode_sse
;
976 case VT_LDOUBLE
: return x86_64_mode_x87
;
982 if (f
->next
&& (f
->c
== f
->next
->c
))
983 return x86_64_mode_memory
;
985 mode
= x86_64_mode_none
;
986 for (f
= f
->next
; f
; f
= f
->next
)
987 mode
= classify_x86_64_merge(mode
, classify_x86_64_inner(&f
->type
));
995 static X86_64_Mode
classify_x86_64_arg(CType
*ty
, CType
*ret
, int *psize
, int *palign
, int *reg_count
)
998 int size
, align
, ret_t
= 0;
1000 if (ty
->t
& (VT_BITFIELD
|VT_ARRAY
)) {
1005 mode
= x86_64_mode_integer
;
1007 size
= type_size(ty
, &align
);
1008 *psize
= (size
+ 7) & ~7;
1009 *palign
= (align
+ 7) & ~7;
1012 mode
= x86_64_mode_memory
;
1015 mode
= classify_x86_64_inner(ty
);
1017 case x86_64_mode_integer
:
1032 ret_t
|= (ty
->t
& VT_UNSIGNED
);
1034 case x86_64_mode_x87
:
1038 case x86_64_mode_sse
:
1044 ret_t
= (size
> 4) ? VT_DOUBLE
: VT_FLOAT
;
1049 break; /* nothing to be done for x86_64_mode_memory and x86_64_mode_none*/
1062 ST_FUNC
int classify_x86_64_va_arg(CType
*ty
)
1064 /* This definition must be synced with stdarg.h */
1065 enum __va_arg_type
{
1066 __va_gen_reg
, __va_float_reg
, __va_ld_reg
, __va_stack
1068 int size
, align
, reg_count
;
1069 X86_64_Mode mode
= classify_x86_64_arg(ty
, NULL
, &size
, &align
, ®_count
);
1071 default: return __va_stack
;
1072 case x86_64_mode_x87
: return __va_ld_reg
;
1073 case x86_64_mode_integer
: return __va_gen_reg
;
1074 case x86_64_mode_sse
: return __va_float_reg
;
1078 /* Return the number of registers needed to return the struct, or 0 if
1079 returning via struct pointer. */
1080 ST_FUNC
int gfunc_sret(CType
*vt
, int variadic
, CType
*ret
, int *ret_align
)
1082 int size
, align
, reg_count
;
1083 *ret_align
= 1; // Never have to re-align return values for x86-64
1084 return (classify_x86_64_arg(vt
, ret
, &size
, &align
, ®_count
) != x86_64_mode_memory
);
1088 static const uint8_t arg_regs
[REGN
] = {
1089 TREG_RDI
, TREG_RSI
, TREG_RDX
, TREG_RCX
, TREG_R8
, TREG_R9
1092 /* Generate function call. The function address is pushed first, then
1093 all the parameters in call order. This functions pops all the
1094 parameters and the function address. */
1095 void gfunc_call(int nb_args
)
1098 int size
, align
, args_size
, s
, e
, i
, reg_count
;
1099 int nb_reg_args
= 0;
1100 int nb_sse_args
= 0;
1101 int gen_reg
, sse_reg
;
1104 /* fetch cpu flag before the following sub will change the value */
1105 if (vtop
>= vstack
&& (vtop
->r
& VT_VALMASK
) == VT_CMP
)
1107 /* calculate the number of integer/float register arguments */
1108 for(i
= 0; i
< nb_args
; i
++) {
1109 mode
= classify_x86_64_arg(&vtop
[-i
].type
, NULL
, &size
, &align
, ®_count
);
1110 if (mode
== x86_64_mode_sse
)
1111 nb_sse_args
+= reg_count
;
1112 else if (mode
== x86_64_mode_integer
)
1113 nb_reg_args
+= reg_count
;
1117 gen_reg
= nb_reg_args
;
1118 sse_reg
= nb_sse_args
;
1119 /* for struct arguments, we need to call memcpy and the function
1120 call breaks register passing arguments we are preparing.
1121 So, we process arguments which will be passed by stack first. */
1122 for(i
= 0; i
< nb_args
; i
++) {
1123 mode
= classify_x86_64_arg(&vtop
[-i
].type
, NULL
, &size
, &align
, ®_count
);
1125 case x86_64_mode_x87
:
1126 if((vtop
[-i
].type
.t
& VT_BTYPE
) == VT_STRUCT
)
1129 args_size
= (args_size
+ 15) & ~15;
1130 case x86_64_mode_memory
:
1134 case x86_64_mode_sse
:
1135 sse_reg
-= reg_count
;
1136 if (sse_reg
+ reg_count
> 8)
1139 case x86_64_mode_integer
:
1140 gen_reg
-= reg_count
;
1141 if (gen_reg
+ reg_count
> REGN
)
1144 default: break; /* nothing to be done for x86_64_mode_none */
1148 args_size
= (args_size
+ 15) & ~15;
1149 if (func_scratch
< args_size
)
1150 func_scratch
= args_size
;
1152 gen_reg
= nb_reg_args
;
1153 sse_reg
= nb_sse_args
;
1154 for(s
= e
= 0; s
< nb_args
; s
= e
){
1155 int run_gen
, run_sse
, st_size
;
1159 for(i
= s
; i
< nb_args
; i
++) {
1160 mode
= classify_x86_64_arg(&vtop
[-i
].type
, NULL
, &size
, &align
, ®_count
);
1162 case x86_64_mode_x87
:
1163 if((vtop
[-i
].type
.t
& VT_BTYPE
) == VT_STRUCT
){
1169 case x86_64_mode_memory
:
1173 case x86_64_mode_sse
:
1174 sse_reg
-= reg_count
;
1175 if (sse_reg
+ reg_count
> 8)
1178 case x86_64_mode_integer
:
1179 gen_reg
-= reg_count
;
1180 if (gen_reg
+ reg_count
> REGN
)
1183 default: break; /* nothing to be done for x86_64_mode_none */
1188 st_size
= -st_size
& 15;// 16 - (size & 15)
1190 args_size
-= st_size
;
1194 for(i
= s
; i
< e
; i
++) {
1196 /* Swap argument to top, it will possibly be changed here,
1197 and might use more temps. All arguments must remain on the
1198 stack, so that get_reg can correctly evict some of them onto
1199 stack. We could use also use a vrott(nb_args) at the end
1200 of this loop, but this seems faster. */
1207 mode
= classify_x86_64_arg(&vtop
->type
, &type
, &size
, &align
, ®_count
);
1209 case x86_64_mode_x87
:
1210 /* ±ØÐë±£Ö¤ TREG_ST0 µÄΨһ */
1211 if((vtop
->type
.t
& VT_BTYPE
) == VT_STRUCT
){
1216 gen_offs_sp(0xdb, 0x107, args_size
);
1217 vtop
--;//ÊÍ·Å TREG_ST0
1221 gen_offs_sp(0xdb, 0x107, args_size
);
1222 vtop
->r
= VT_CONST
;//ÊÍ·Å TREG_ST0
1225 case x86_64_mode_memory
:
1227 vset(&char_pointer_type
, TREG_RSP
, args_size
);/* generate memcpy RSP */
1229 vtop
->type
= char_pointer_type
;
1232 struct_copy(&vtop
[-2], &vtop
[-1], &vtop
[0]);
1235 case x86_64_mode_sse
:
1236 sse_reg
-= reg_count
;
1237 if (sse_reg
+ reg_count
> 8){
1242 case x86_64_mode_integer
:
1243 gen_reg
-= reg_count
;
1244 if (gen_reg
+ reg_count
> REGN
){
1247 vset(&type
, TREG_RSP
| VT_LVAL
, args_size
);
1254 default: break; /* nothing to be done for x86_64_mode_none */
1266 gen_reg
= nb_reg_args
;
1267 sse_reg
= nb_sse_args
;
1268 for(i
= 0; i
< nb_args
; i
++) {
1270 mode
= classify_x86_64_arg(&vtop
->type
, &type
, &size
, &align
, ®_count
);
1271 /* Alter stack entry type so that gv() knows how to treat it */
1273 /* Alter stack entry type so that gv() knows how to treat it */
1274 if (mode
== x86_64_mode_sse
) {
1275 sse_reg
-= reg_count
;
1276 if (sse_reg
+ reg_count
<= 8) {
1277 if (reg_count
== 2) {
1278 ex_rc
= RC_XMM0
<< (sse_reg
+ 1);
1279 gv(RC_XMM0
<< sse_reg
);
1281 assert(reg_count
== 1);
1282 /* Load directly to register */
1283 gv(RC_XMM0
<< sse_reg
);
1286 } else if (mode
== x86_64_mode_integer
) {
1287 gen_reg
-= reg_count
;
1288 if (gen_reg
+ reg_count
<= REGN
) {
1289 if (reg_count
== 2) {
1290 d
= arg_regs
[gen_reg
+1];
1291 ex_rc
= reg_classes
[d
] & ~RC_MASK
;
1292 d
= arg_regs
[gen_reg
];
1293 gv(reg_classes
[d
] & ~RC_MASK
);
1295 assert(reg_count
== 1);
1296 d
= arg_regs
[gen_reg
];
1297 gv(reg_classes
[d
] & ~RC_MASK
);
1304 oad(0xb8, nb_sse_args
< 8 ? nb_sse_args
: 8); /* mov nb_sse_args, %eax */
1310 #define FUNC_PROLOG_SIZE 11
1312 static void push_arg_reg(int i
) {
1314 gen_modrm64(0x89, arg_regs
[i
], VT_LOCAL
, NULL
, loc
);
1317 /* generate function prolog of type 't' */
1318 void gfunc_prolog(CType
*func_type
)
1321 int i
, addr
, align
, size
, reg_count
;
1322 int param_addr
= 0, reg_param_index
, sse_param_index
;
1326 sym
= func_type
->ref
;
1327 addr
= PTR_SIZE
* 2;
1328 pop_stack
= loc
= 0;
1329 func_scratch
= r_loc
= 0;
1330 ind
+= FUNC_PROLOG_SIZE
;
1331 func_sub_sp_offset
= ind
;
1334 if (func_type
->ref
->c
== FUNC_ELLIPSIS
) {
1335 int seen_reg_num
, seen_sse_num
, seen_stack_size
;
1336 seen_reg_num
= seen_sse_num
= 0;
1337 /* frame pointer and return address */
1338 seen_stack_size
= PTR_SIZE
* 2;
1339 /* count the number of seen parameters */
1340 while ((sym
= sym
->next
) != NULL
) {
1342 mode
= classify_x86_64_arg(type
, NULL
, &size
, &align
, ®_count
);
1346 seen_stack_size
= ((seen_stack_size
+ align
- 1) & -align
) + size
;
1349 case x86_64_mode_integer
:
1350 if (seen_reg_num
+ reg_count
<= REGN
) {
1351 seen_reg_num
+= reg_count
;
1358 case x86_64_mode_sse
:
1359 if (seen_sse_num
+ reg_count
<= 8) {
1360 seen_sse_num
+= reg_count
;
1370 /* movl $0x????????, -0x10(%rbp) */
1372 gen_le32(seen_reg_num
* 8);
1373 /* movl $0x????????, -0xc(%rbp) */
1375 gen_le32(seen_sse_num
* 16 + 48);
1376 /* movl $0x????????, -0x8(%rbp) */
1378 gen_le32(seen_stack_size
);
1380 o(0xc084);/* test %al,%al */
1382 g(4*(8 - seen_sse_num
) + 3);
1384 /* save all register passing arguments */
1385 for (i
= 0; i
< 8; i
++) {
1387 o(0x290f);/* movaps %xmm1-7,-XXX(%rbp) */
1388 gen_modrm(7 - i
, VT_LOCAL
, NULL
, loc
);
1390 for (i
= 0; i
< (REGN
- seen_reg_num
); i
++) {
1391 push_arg_reg(REGN
-1 - i
);
1395 sym
= func_type
->ref
;
1396 reg_param_index
= 0;
1397 sse_param_index
= 0;
1399 /* if the function returns a structure, then add an
1400 implicit pointer parameter */
1401 func_vt
= sym
->type
;
1402 mode
= classify_x86_64_arg(&func_vt
, NULL
, &size
, &align
, ®_count
);
1403 if (mode
== x86_64_mode_memory
) {
1404 push_arg_reg(reg_param_index
);
1408 /* define parameters */
1409 while ((sym
= sym
->next
) != NULL
) {
1411 mode
= classify_x86_64_arg(type
, NULL
, &size
, &align
, ®_count
);
1413 case x86_64_mode_sse
:
1414 if (sse_param_index
+ reg_count
<= 8) {
1415 /* save arguments passed by register */
1416 loc
-= reg_count
* 8;
1418 for (i
= 0; i
< reg_count
; ++i
) {
1419 o(0xd60f66); /* movq */
1420 gen_modrm(sse_param_index
, VT_LOCAL
, NULL
, param_addr
+ i
*8);
1424 addr
= (addr
+ align
- 1) & -align
;
1427 sse_param_index
+= reg_count
;
1431 case x86_64_mode_memory
:
1432 case x86_64_mode_x87
:
1433 addr
= (addr
+ align
- 1) & -align
;
1438 case x86_64_mode_integer
: {
1439 if (reg_param_index
+ reg_count
<= REGN
) {
1440 /* save arguments passed by register */
1441 loc
-= reg_count
* 8;
1443 for (i
= 0; i
< reg_count
; ++i
) {
1444 gen_modrm64(0x89, arg_regs
[reg_param_index
], VT_LOCAL
, NULL
, param_addr
+ i
*8);
1448 addr
= (addr
+ align
- 1) & -align
;
1451 reg_param_index
+= reg_count
;
1455 default: break; /* nothing to be done for x86_64_mode_none */
1457 sym_push(sym
->v
& ~SYM_FIELD
, type
,
1458 VT_LOCAL
| VT_LVAL
, param_addr
);
1462 /* generate function epilog */
1463 void gfunc_epilog(void)
1467 o(0xc9); /* leave */
1468 if (func_ret_sub
== 0) {
1471 o(0xc2); /* ret n */
1473 g(func_ret_sub
>> 8);
1475 /* align local size to word & save local variables */
1476 v
= (func_scratch
-loc
+ 15) & -16;
1478 ind
= func_sub_sp_offset
- FUNC_PROLOG_SIZE
;
1479 o(0xe5894855); /* push %rbp, mov %rsp, %rbp */
1480 o(0xec8148); /* sub rsp, stacksize */
1487 /* generate a jump to a label */
1490 return psym(0xe9, t
);
1493 /* generate a jump to a fixed address */
1494 void gjmp_addr(int a
)
1502 oad(0xe9, a
- ind
- 5);
1506 /* generate a test. set 'inv' to invert test. Stack entry is popped */
1507 int gtst(int inv
, int t
)
1511 v
= vtop
->r
& VT_VALMASK
;
1513 /* fast case : can jump directly since flags are set */
1514 if (vtop
->c
.i
& 0x100)
1516 /* This was a float compare. If the parity flag is set
1517 the result was unordered. For anything except != this
1518 means false and we don't jump (anding both conditions).
1519 For != this means true (oring both).
1520 Take care about inverting the test. We need to jump
1521 to our target if the result was unordered and test wasn't NE,
1522 otherwise if unordered we don't want to jump. */
1523 vtop
->c
.i
&= ~0x100;
1524 if (!inv
== (vtop
->c
.i
!= TOK_NE
))
1525 o(0x067a); /* jp +6 */
1529 t
= psym(0x8a, t
); /* jp t */
1533 t
= psym((vtop
->c
.i
- 16) ^ inv
, t
);
1534 } else if (v
== VT_JMP
|| v
== VT_JMPI
) {
1535 /* && or || optimization */
1536 if ((v
& 1) == inv
) {
1537 /* insert vtop->c jump list in t */
1540 p
= (int *)(cur_text_section
->data
+ *p
);
1548 if (is_float(vtop
->type
.t
) ||
1549 (vtop
->type
.t
& VT_BTYPE
) == VT_LLONG
) {
1553 if ((vtop
->r
& (VT_VALMASK
| VT_LVAL
| VT_SYM
)) == VT_CONST
) {
1554 /* constant jmp optimization */
1555 if ((vtop
->c
.i
!= 0) != inv
)
1560 o(0xc0 + REG_VALUE(v
) * 9);
1562 t
= psym(0x85 ^ inv
, t
);
1569 /* generate an integer binary operation */
1570 void gen_opi(int op
)
1572 int r
, fr
, opc
, fc
, c
, ll
, uu
, cc
, tt2
;
1576 ll
= is64_type(vtop
[-1].type
.t
);
1577 cc
= (fr
& (VT_VALMASK
| VT_LVAL
| VT_SYM
)) == VT_CONST
;
1578 tt2
= (fr
& (VT_LVAL
| VT_LVAL_TYPE
)) == VT_LVAL
;
1582 case TOK_ADDC1
: /* add with carry generation */
1588 if (cc
&& (!ll
|| (int)vtop
->c
.ll
== vtop
->c
.ll
)) {
1592 /* XXX: generate inc and dec for smaller code ? */
1593 orex(ll
, r
, 0, 0x83);
1594 o(0xc0 + REG_VALUE(r
) + opc
*8);
1597 orex(ll
, r
, 0, 0x81);
1598 oad(0xc0 + REG_VALUE(r
) + opc
*8, c
);
1603 orex(ll
, fr
, r
, 0x03 + opc
*8);
1605 gen_modrm(r
, fr
, vtop
->sym
, fc
);
1607 o(0xc0 + REG_VALUE(fr
) + REG_VALUE(r
)*8);
1610 if (op
>= TOK_ULT
&& op
<= TOK_GT
) {
1616 case TOK_SUBC1
: /* sub with carry generation */
1619 case TOK_ADDC2
: /* add with carry use */
1622 case TOK_SUBC2
: /* sub with carry use */
1644 orex(ll
, fr
, r
, 0xf7);
1646 gen_modrm(opc
, fr
, vtop
->sym
, fc
);
1648 o(0xc0 + REG_VALUE(fr
) + opc
*8);
1650 orex(ll
, fr
, r
, 0xaf0f); /* imul fr, r */
1652 gen_modrm(r
, fr
, vtop
->sym
, fc
);
1654 o(0xc0 + REG_VALUE(fr
) + REG_VALUE(r
)*8);
1674 orex(ll
, r
, 0, 0xd1);
1675 o(0xc0 + REG_VALUE(r
) + opc
*8);
1677 orex(ll
, r
, 0, 0xc1); /* shl/shr/sar $xxx, r */
1678 o(0xc0 + REG_VALUE(r
) + opc
*8);
1679 g(c
& (ll
? 0x3f : 0x1f));
1682 /* we generate the shift in ecx */
1683 gv2(RC_INT
, RC_RCX
);
1685 orex(ll
, r
, 0, 0xd3); /* shl/shr/sar %cl, r */
1686 o(0xc0 + REG_VALUE(r
) + opc
*8);
1701 /* first operand must be in eax */
1702 /* XXX: need better constraint for second operand */
1704 gv2(RC_RAX
, RC_INT2
);
1712 orex(ll
, 0, 0, uu
? 0xd231 : 0x99); /* xor %edx,%edx : cdq RDX:RAX <- sign-extend of RAX. */
1713 orex(ll
, fr
, 0, 0xf7); /* div fr, %eax */
1715 gen_modrm(opc
, fr
, vtop
->sym
, fc
);
1717 o(0xc0 + REG_VALUE(fr
) + opc
*8);
1718 if (op
== '%' || op
== TOK_UMOD
)
1731 void gen_opl(int op
)
1736 /* generate a floating point operation 'v = t1 op t2' instruction. The
1737 two operands are guaranted to have the same floating point type */
1738 /* XXX: need to use ST1 too */
1739 void gen_opf(int op
)
1741 int a
, ft
, fc
, swapped
, fr
, r
;
1742 int float_type
= (vtop
->type
.t
& VT_BTYPE
) == VT_LDOUBLE
? RC_ST0
: RC_FLOAT
;
1744 /* convert constants to memory references */
1745 if ((vtop
[-1].r
& (VT_VALMASK
| VT_LVAL
)) == VT_CONST
) {
1750 if ((vtop
[0].r
& (VT_VALMASK
| VT_LVAL
)) == VT_CONST
)
1757 if ((ft
& VT_BTYPE
) == VT_LDOUBLE
) {
1758 /* swap the stack if needed so that t1 is the register and t2 is
1759 the memory reference */
1760 /* must put at least one value in the floating point register */
1761 if ((vtop
[-1].r
& VT_LVAL
) && (vtop
[0].r
& VT_LVAL
)) {
1766 if (vtop
[-1].r
& VT_LVAL
) {
1770 if (op
>= TOK_ULT
&& op
<= TOK_GT
) {
1771 /* load on stack second operand */
1772 load(TREG_ST0
, vtop
);
1773 save_reg(TREG_RAX
); /* eax is used by FP comparison code */
1774 if (op
== TOK_GE
|| op
== TOK_GT
)
1776 else if (op
== TOK_EQ
|| op
== TOK_NE
)
1779 o(0xc9d9); /* fxch %st(1) */
1780 if (op
== TOK_EQ
|| op
== TOK_NE
)
1781 o(0xe9da); /* fucompp */
1783 o(0xd9de); /* fcompp */
1784 o(0xe0df); /* fnstsw %ax */
1786 o(0x45e480); /* and $0x45, %ah */
1787 o(0x40fC80); /* cmp $0x40, %ah */
1788 } else if (op
== TOK_NE
) {
1789 o(0x45e480); /* and $0x45, %ah */
1790 o(0x40f480); /* xor $0x40, %ah */
1792 } else if (op
== TOK_GE
|| op
== TOK_LE
) {
1793 o(0x05c4f6); /* test $0x05, %ah */
1796 o(0x45c4f6); /* test $0x45, %ah */
1803 /* no memory reference possible for long double operations */
1804 load(TREG_ST0
, vtop
);
1825 o(0xde); /* fxxxp %st, %st(1) */
1835 if (op
>= TOK_ULT
&& op
<= TOK_GT
) {
1838 op
= TOK_ULE
; /* setae */
1847 op
= TOK_UGT
; /* seta */
1850 assert(!(vtop
[-1].r
& VT_LVAL
));
1851 if ((ft
& VT_BTYPE
) == VT_DOUBLE
)
1853 o(0x2e0f); /* ucomisd */
1855 gen_modrm(r
, fr
, vtop
->sym
, fc
);
1857 o(0xc0 + REG_VALUE(fr
) + REG_VALUE(r
)*8);
1860 vtop
->c
.i
= op
| 0x100;
1862 assert((vtop
->type
.t
& VT_BTYPE
) != VT_LDOUBLE
);
1863 /* no memory reference possible for long double operations */
1879 assert((ft
& VT_BTYPE
) != VT_LDOUBLE
);
1880 assert(!(vtop
[-1].r
& VT_LVAL
));
1881 if ((ft
& VT_BTYPE
) == VT_DOUBLE
) {
1889 gen_modrm(r
, fr
, vtop
->sym
, fc
);
1891 o(0xc0 + REG_VALUE(fr
) + REG_VALUE(r
)*8);
1897 /* convert integers to fp 't' type. Must handle 'int', 'unsigned int'
1898 and 'long long' cases. */
1899 void gen_cvt_itof(int t
)
1908 if (tbt
== VT_LDOUBLE
) {
1910 if ((ft
& VT_BTYPE
) == VT_LLONG
) {
1911 /* signed long long to float/double/long double (unsigned case
1912 is handled generically) */
1913 o(0x50 + REG_VALUE(r
)); /* push r */
1914 o(0x242cdf); /* fildll (%rsp) */
1915 o(0x08c48348); /* add $8, %rsp */
1916 } else if ((ft
& (VT_BTYPE
| VT_UNSIGNED
)) == (VT_INT
| VT_UNSIGNED
)) {
1917 /* unsigned int to float/double/long double */
1918 o(0x6a); /* push $0 */
1920 o(0x50 + REG_VALUE(r
)); /* push r */
1921 o(0x242cdf); /* fildll (%rsp) */
1922 o(0x10c48348); /* add $16, %rsp */
1924 /* int to float/double/long double */
1925 o(0x50 + REG_VALUE(r
)); /* push r */
1926 o(0x2404db); /* fildl (%rsp) */
1927 o(0x08c48348); /* add $8, %rsp */
1932 r_xmm
= get_reg(RC_FLOAT
);
1933 o(0xf2 + (tbt
== VT_FLOAT
));
1934 if ((ft
& (VT_BTYPE
| VT_UNSIGNED
)) == (VT_INT
| VT_UNSIGNED
) || bt
== VT_LLONG
) {
1938 o(0xc0 + REG_VALUE(r
) + REG_VALUE(r_xmm
)*8); /* cvtsi2sd or cvtsi2ss */
1943 /* convert from one floating point type to another */
1944 void gen_cvt_ftof(int t
)
1952 if(bt
== VT_LDOUBLE
)
1953 r
= get_reg(RC_FLOAT
);
1956 if (bt
== VT_FLOAT
) {
1957 if (tbt
== VT_DOUBLE
) {
1958 o(0x5a0f); /* cvtps2pd */
1959 o(0xc0 + REG_VALUE(r
) + REG_VALUE(r
) * 8);
1960 } else if (tbt
== VT_LDOUBLE
) {
1961 /* movss %xmm0-7,-0x10(%rsp) */
1963 o(0xf02444 + REG_VALUE(r
)*8);
1964 o(0xf02444d9); /* flds -0x10(%rsp) */
1967 } else if (bt
== VT_DOUBLE
) {
1968 if (tbt
== VT_FLOAT
) {
1969 o(0x5a0f66); /* cvtpd2ps */
1970 o(0xc0 + REG_VALUE(r
) + REG_VALUE(r
) * 8);
1971 } else if (tbt
== VT_LDOUBLE
) {
1972 /* movsd %xmm0-7,-0x10(%rsp) */
1974 o(0xf02444 + REG_VALUE(r
)*8);
1975 o(0xf02444dd); /* fldl -0x10(%rsp) */
1980 if (tbt
== VT_DOUBLE
) {
1981 o(0xf0245cdd); /* fstpl -0x10(%rsp) */
1982 /* movsd -0x10(%rsp),%xmm0-7 */
1984 o(0xf02444 + REG_VALUE(r
)*8);
1986 } else if (tbt
== VT_FLOAT
) {
1987 o(0xf0245cd9); /* fstps -0x10(%rsp) */
1988 /* movss -0x10(%rsp),%xmm0-7 */
1990 o(0xf02444 + REG_VALUE(r
)*8);
1996 /* convert fp to int 't' type */
1997 void gen_cvt_ftoi(int t
)
1999 int ft
, bt
, ll
, r
, r_xmm
;
2004 if (bt
== VT_LDOUBLE
) {
2005 gen_cvt_ftof(VT_DOUBLE
);
2008 r_xmm
= gv(RC_FLOAT
);
2009 if ((t
& VT_BTYPE
) == VT_INT
)
2013 r
= get_reg(RC_INT
);
2014 if (bt
== VT_FLOAT
) {
2016 } else if (bt
== VT_DOUBLE
) {
2021 orex(ll
, r
, r_xmm
, 0x2c0f); /* cvttss2si or cvttsd2si */
2022 o(0xc0 + REG_VALUE(r_xmm
) + (REG_VALUE(r
) << 3));
2026 /* computed goto support */
2033 /* Save the stack pointer onto the stack and return the location of its address */
2034 ST_FUNC
void gen_vla_sp_save(int addr
) {
2035 /* mov %rsp,addr(%rbp)*/
2036 gen_modrm64(0x89, TREG_RSP
, VT_LOCAL
, NULL
, addr
);
2039 /* Restore the SP from a location on the stack */
2040 ST_FUNC
void gen_vla_sp_restore(int addr
) {
2041 gen_modrm64(0x8b, TREG_RSP
, VT_LOCAL
, NULL
, addr
);
2044 /* Subtract from the stack pointer, and push the resulting value onto the stack */
2045 ST_FUNC
void gen_vla_alloc(CType
*type
, int align
) {
2046 #ifdef TCC_TARGET_PE
2047 /* alloca does more than just adjust %rsp on Windows */
2048 vpush_global_sym(&func_old_type
, TOK_alloca
);
2049 vswap(); /* Move alloca ref past allocation size */
2051 vset(type
, REG_IRET
, 0);
2054 r
= gv(RC_INT
); /* allocation size */
2057 o(0xe0 | REG_VALUE(r
));
2058 /* We align to 16 bytes rather than align */
2063 o(0xe0 | REG_VALUE(r
));
2070 /* end of x86-64 code generator */
2071 /*************************************************************/
2072 #endif /* ! TARGET_DEFS_ONLY */
2073 /******************************************************/