2 * A64 code generator for TCC
4 * Copyright (c) 2014-2015 Edmund Grimley Evans
6 * Copying and distribution of this file, with or without modification,
7 * are permitted in any medium without royalty provided the copyright
8 * notice and this notice are preserved. This file is offered as-is,
9 * without any warranty.
12 #ifdef TARGET_DEFS_ONLY
14 // Number of registers available to allocator:
15 #define NB_REGS 28 // x0-x18, x30, v0-v7
19 #define TREG_R(x) (x) // x = 0..18
21 #define TREG_F(x) (x + 20) // x = 0..7
23 // Register classes sorted from more general to more precise:
24 #define RC_INT (1 << 0)
25 #define RC_FLOAT (1 << 1)
26 #define RC_R(x) (1 << (2 + (x))) // x = 0..18
27 #define RC_R30 (1 << 21)
28 #define RC_F(x) (1 << (22 + (x))) // x = 0..7
30 #define RC_IRET (RC_R(0)) // int return register class
31 #define RC_FRET (RC_F(0)) // float return register class
33 #define REG_IRET (TREG_R(0)) // int return register number
34 #define REG_FRET (TREG_F(0)) // float return register number
38 #define LDOUBLE_SIZE 16
39 #define LDOUBLE_ALIGN 16
43 #define CHAR_IS_UNSIGNED
45 /******************************************************/
48 #define EM_TCC_TARGET EM_AARCH64
50 #define R_DATA_32 R_AARCH64_ABS32
51 #define R_DATA_PTR R_AARCH64_ABS64
52 #define R_JMP_SLOT R_AARCH64_JUMP_SLOT
53 #define R_COPY R_AARCH64_COPY
55 #define ELF_START_ADDR 0x00400000
56 #define ELF_PAGE_SIZE 0x1000
58 /******************************************************/
59 #else /* ! TARGET_DEFS_ONLY */
60 /******************************************************/
64 ST_DATA
const int reg_classes
[NB_REGS
] = {
84 RC_R30
, // not in RC_INT as we make special use of x30
95 #define IS_FREG(x) ((x) >= TREG_F(0))
97 static uint32_t intr(int r
)
99 assert(TREG_R(0) <= r
&& r
<= TREG_R30
);
100 return r
< TREG_R30
? r
: 30;
103 static uint32_t fltr(int r
)
105 assert(TREG_F(0) <= r
&& r
<= TREG_F(7));
106 return r
- TREG_F(0);
109 // Add an instruction to text section:
110 ST_FUNC
void o(unsigned int c
)
113 if (ind1
> cur_text_section
->data_allocated
)
114 section_realloc(cur_text_section
, ind1
);
115 *(uint32_t *)(cur_text_section
->data
+ ind
) = c
;
119 static int arm64_encode_bimm64(uint64_t x
)
129 if (x
>> 2 == (x
& (((uint64_t)1 << (64 - 2)) - 1)))
130 rep
= 2, x
&= ((uint64_t)1 << 2) - 1;
131 else if (x
>> 4 == (x
& (((uint64_t)1 << (64 - 4)) - 1)))
132 rep
= 4, x
&= ((uint64_t)1 << 4) - 1;
133 else if (x
>> 8 == (x
& (((uint64_t)1 << (64 - 8)) - 1)))
134 rep
= 8, x
&= ((uint64_t)1 << 8) - 1;
135 else if (x
>> 16 == (x
& (((uint64_t)1 << (64 - 16)) - 1)))
136 rep
= 16, x
&= ((uint64_t)1 << 16) - 1;
137 else if (x
>> 32 == (x
& (((uint64_t)1 << (64 - 32)) - 1)))
138 rep
= 32, x
&= ((uint64_t)1 << 32) - 1;
143 if (!(x
& (((uint64_t)1 << 32) - 1))) x
>>= 32, pos
+= 32;
144 if (!(x
& (((uint64_t)1 << 16) - 1))) x
>>= 16, pos
+= 16;
145 if (!(x
& (((uint64_t)1 << 8) - 1))) x
>>= 8, pos
+= 8;
146 if (!(x
& (((uint64_t)1 << 4) - 1))) x
>>= 4, pos
+= 4;
147 if (!(x
& (((uint64_t)1 << 2) - 1))) x
>>= 2, pos
+= 2;
148 if (!(x
& (((uint64_t)1 << 1) - 1))) x
>>= 1, pos
+= 1;
151 if (!(~x
& (((uint64_t)1 << 32) - 1))) x
>>= 32, len
+= 32;
152 if (!(~x
& (((uint64_t)1 << 16) - 1))) x
>>= 16, len
+= 16;
153 if (!(~x
& (((uint64_t)1 << 8) - 1))) x
>>= 8, len
+= 8;
154 if (!(~x
& (((uint64_t)1 << 4) - 1))) x
>>= 4, len
+= 4;
155 if (!(~x
& (((uint64_t)1 << 2) - 1))) x
>>= 2, len
+= 2;
156 if (!(~x
& (((uint64_t)1 << 1) - 1))) x
>>= 1, len
+= 1;
161 pos
= (pos
+ len
) & (rep
- 1);
164 return ((0x1000 & rep
<< 6) | (((rep
- 1) ^ 31) << 1 & 63) |
165 ((rep
- pos
) & (rep
- 1)) << 6 | (len
- 1));
168 static uint32_t arm64_movi(int r
, uint64_t x
)
173 return 0x52800000 | r
| x
<< 5; // movz w(r),#(x)
174 if (!(x
& ~(m
<< 16)))
175 return 0x52a00000 | r
| x
>> 11; // movz w(r),#(x >> 16),lsl #16
176 if (!(x
& ~(m
<< 32)))
177 return 0xd2c00000 | r
| x
>> 27; // movz x(r),#(x >> 32),lsl #32
178 if (!(x
& ~(m
<< 48)))
179 return 0xd2e00000 | r
| x
>> 43; // movz x(r),#(x >> 48),lsl #48
180 if ((x
& ~m
) == m
<< 16)
181 return (0x12800000 | r
|
182 (~x
<< 5 & 0x1fffe0)); // movn w(r),#(~x)
183 if ((x
& ~(m
<< 16)) == m
)
184 return (0x12a00000 | r
|
185 (~x
>> 11 & 0x1fffe0)); // movn w(r),#(~x >> 16),lsl #16
187 return (0x92800000 | r
|
188 (~x
<< 5 & 0x1fffe0)); // movn x(r),#(~x)
190 return (0x92a00000 | r
|
191 (~x
>> 11 & 0x1fffe0)); // movn x(r),#(~x >> 16),lsl #16
193 return (0x92c00000 | r
|
194 (~x
>> 27 & 0x1fffe0)); // movn x(r),#(~x >> 32),lsl #32
196 return (0x92e00000 | r
|
197 (~x
>> 43 & 0x1fffe0)); // movn x(r),#(~x >> 32),lsl #32
198 if (!(x
>> 32) && (e
= arm64_encode_bimm64(x
| x
<< 32)) >= 0)
199 return 0x320003e0 | r
| (uint32_t)e
<< 10; // movi w(r),#(x)
200 if ((e
= arm64_encode_bimm64(x
)) >= 0)
201 return 0xb20003e0 | r
| (uint32_t)e
<< 10; // movi x(r),#(x)
205 static void arm64_movimm(int r
, uint64_t x
)
208 if ((i
= arm64_movi(r
, x
)))
209 o(i
); // a single MOV
211 // MOVZ/MOVN and 1-3 MOVKs
213 uint32_t mov1
= 0xd2800000; // movz
215 for (i
= 0; i
< 64; i
+= 16) {
216 z
+= !(x
>> i
& 0xffff);
217 m
+= !(~x
>> i
& 0xffff);
221 mov1
= 0x92800000; // movn
223 for (i
= 0; i
< 64; i
+= 16)
224 if (x1
>> i
& 0xffff) {
225 o(mov1
| r
| (x1
>> i
& 0xffff) << 5 | i
<< 17);
226 // movz/movn x(r),#(*),lsl #(i)
229 for (i
+= 16; i
< 64; i
+= 16)
230 if (x1
>> i
& 0xffff)
231 o(0xf2800000 | r
| (x
>> i
& 0xffff) << 5 | i
<< 17);
232 // movk x(r),#(*),lsl #(i)
236 // Patch all branches in list pointed to by t to branch to a:
237 ST_FUNC
void gsym_addr(int t_
, int a_
)
242 uint32_t *ptr
= (uint32_t *)(cur_text_section
->data
+ t
);
243 uint32_t next
= *ptr
;
244 if (a
- t
+ 0x8000000 >= 0x10000000)
245 tcc_error("branch out of range");
246 *ptr
= (a
- t
== 4 ? 0xd503201f : // nop
247 0x14000000 | ((a
- t
) >> 2 & 0x3ffffff)); // b
252 // Patch all branches in list pointed to by t to branch to current location:
253 ST_FUNC
void gsym(int t
)
258 static int arm64_type_size(int t
)
260 switch (t
& VT_BTYPE
) {
261 case VT_INT
: return 2;
262 case VT_BYTE
: return 0;
263 case VT_SHORT
: return 1;
264 case VT_PTR
: return 3;
265 case VT_ENUM
: return 2;
266 case VT_FUNC
: return 3;
267 case VT_FLOAT
: return 2;
268 case VT_DOUBLE
: return 3;
269 case VT_LDOUBLE
: return 4;
270 case VT_BOOL
: return 0;
271 case VT_LLONG
: return 3;
277 static void arm64_spoff(int reg
, uint64_t off
)
279 uint32_t sub
= off
>> 63;
283 o(0x910003e0 | sub
<< 30 | reg
| off
<< 10);
284 // (add|sub) x(reg),sp,#(off)
286 arm64_movimm(30, off
); // use x30 for offset
287 o(0x8b3e63e0 | sub
<< 30 | reg
); // (add|sub) x(reg),sp,x30
291 static void arm64_ldrx(int sg
, int sz
, int dst
, int bas
, uint64_t off
)
295 if (!(off
& ~(0xfff << sz
)))
296 o(0x39400000 | dst
| bas
<< 5 | off
<< (10 - sz
) |
297 !!sg
<< 23 | sz
<< 30); // ldr(*) x(dst),[x(bas),#(off)]
298 else if (off
< 256 || -off
<= 256)
299 o(0x38400000 | dst
| bas
<< 5 | (off
& 511) << 12 |
300 !!sg
<< 23 | sz
<< 30); // ldur(*) x(dst),[x(bas),#(off)]
302 arm64_movimm(30, off
); // use x30 for offset
303 o(0x38206800 | dst
| bas
<< 5 | 30 << 16 |
304 (!!sg
+ 1) << 22 | sz
<< 30); // ldr(*) x(dst),[x(bas),x30]
308 static void arm64_ldrv(int sz
, int dst
, int bas
, uint64_t off
)
310 if (!(off
& ~(0xfff << sz
)))
311 o(0x3d400000 | dst
| bas
<< 5 | off
<< (10 - sz
) |
312 (sz
& 4) << 21 | (sz
& 3) << 30); // ldr (s|d|q)(dst),[x(bas),#(off)]
313 else if (off
< 256 || -off
<= 256)
314 o(0x3c400000 | dst
| bas
<< 5 | (off
& 511) << 12 |
315 (sz
& 4) << 21 | (sz
& 3) << 30); // ldur (s|d|q)(dst),[x(bas),#(off)]
317 arm64_movimm(30, off
); // use x30 for offset
318 o(0x3c606800 | dst
| bas
<< 5 | 30 << 16 | sz
<< 30 | (sz
& 4) << 21);
319 // ldr (s|d|q)(dst),[x(bas),x30]
323 static void arm64_ldrs(int reg
, int size
)
325 // Use x30 for intermediate value in some cases.
327 default: assert(0); break;
329 arm64_ldrx(0, 0, reg
, reg
, 0);
332 arm64_ldrx(0, 1, reg
, reg
, 0);
335 arm64_ldrx(0, 1, 30, reg
, 0);
336 arm64_ldrx(0, 0, reg
, reg
, 2);
337 o(0x2a0043c0 | reg
| reg
<< 16); // orr x(reg),x30,x(reg),lsl #16
340 arm64_ldrx(0, 2, reg
, reg
, 0);
343 arm64_ldrx(0, 2, 30, reg
, 0);
344 arm64_ldrx(0, 0, reg
, reg
, 4);
345 o(0xaa0083c0 | reg
| reg
<< 16); // orr x(reg),x30,x(reg),lsl #32
348 arm64_ldrx(0, 2, 30, reg
, 0);
349 arm64_ldrx(0, 1, reg
, reg
, 4);
350 o(0xaa0083c0 | reg
| reg
<< 16); // orr x(reg),x30,x(reg),lsl #32
353 arm64_ldrx(0, 2, 30, reg
, 0);
354 arm64_ldrx(0, 2, reg
, reg
, 3);
355 o(0x53087c00 | reg
| reg
<< 5); // lsr w(reg), w(reg), #8
356 o(0xaa0083c0 | reg
| reg
<< 16); // orr x(reg),x30,x(reg),lsl #32
359 arm64_ldrx(0, 3, reg
, reg
, 0);
362 arm64_ldrx(0, 0, reg
+ 1, reg
, 8);
363 arm64_ldrx(0, 3, reg
, reg
, 0);
366 arm64_ldrx(0, 1, reg
+ 1, reg
, 8);
367 arm64_ldrx(0, 3, reg
, reg
, 0);
370 arm64_ldrx(0, 2, reg
+ 1, reg
, 7);
371 o(0x53087c00 | (reg
+1) | (reg
+1) << 5); // lsr w(reg+1), w(reg+1), #8
372 arm64_ldrx(0, 3, reg
, reg
, 0);
375 arm64_ldrx(0, 2, reg
+ 1, reg
, 8);
376 arm64_ldrx(0, 3, reg
, reg
, 0);
379 arm64_ldrx(0, 3, reg
+ 1, reg
, 5);
380 o(0xd358fc00 | (reg
+1) | (reg
+1) << 5); // lsr x(reg+1), x(reg+1), #24
381 arm64_ldrx(0, 3, reg
, reg
, 0);
384 arm64_ldrx(0, 3, reg
+ 1, reg
, 6);
385 o(0xd350fc00 | (reg
+1) | (reg
+1) << 5); // lsr x(reg+1), x(reg+1), #16
386 arm64_ldrx(0, 3, reg
, reg
, 0);
389 arm64_ldrx(0, 3, reg
+ 1, reg
, 7);
390 o(0xd348fc00 | (reg
+1) | (reg
+1) << 5); // lsr x(reg+1), x(reg+1), #8
391 arm64_ldrx(0, 3, reg
, reg
, 0);
394 o(0xa9400000 | reg
| (reg
+1) << 10 | reg
<< 5);
395 // ldp x(reg),x(reg+1),[x(reg)]
400 static void arm64_strx(int sz
, int dst
, int bas
, uint64_t off
)
402 if (!(off
& ~(0xfff << sz
)))
403 o(0x39000000 | dst
| bas
<< 5 | off
<< (10 - sz
) | sz
<< 30);
404 // str(*) x(dst),[x(bas],#(off)]
405 else if (off
< 256 || -off
<= 256)
406 o(0x38000000 | dst
| bas
<< 5 | (off
& 511) << 12 | sz
<< 30);
407 // stur(*) x(dst),[x(bas],#(off)]
409 arm64_movimm(30, off
); // use x30 for offset
410 o(0x38206800 | dst
| bas
<< 5 | 30 << 16 | sz
<< 30);
411 // str(*) x(dst),[x(bas),x30]
415 static void arm64_strv(int sz
, int dst
, int bas
, uint64_t off
)
417 if (!(off
& ~(0xfff << sz
)))
418 o(0x3d000000 | dst
| bas
<< 5 | off
<< (10 - sz
) |
419 (sz
& 4) << 21 | (sz
& 3) << 30); // str (s|d|q)(dst),[x(bas),#(off)]
420 else if (off
< 256 || -off
<= 256)
421 o(0x3c000000 | dst
| bas
<< 5 | (off
& 511) << 12 |
422 (sz
& 4) << 21 | (sz
& 3) << 30); // stur (s|d|q)(dst),[x(bas),#(off)]
424 arm64_movimm(30, off
); // use x30 for offset
425 o(0x3c206800 | dst
| bas
<< 5 | 30 << 16 | sz
<< 30 | (sz
& 4) << 21);
426 // str (s|d|q)(dst),[x(bas),x30]
430 static void arm64_sym(int r
, Sym
*sym
, unsigned long addend
)
432 // Currently TCC's linker does not generate COPY relocations for
433 // STT_OBJECTs when tcc is invoked with "-run". This typically
434 // results in "R_AARCH64_ADR_PREL_PG_HI21 relocation failed" when
435 // a program refers to stdin. A workaround is to avoid that
436 // relocation and use only relocations with unlimited range.
439 if (avoid_adrp
|| (sym
->type
.t
& VT_WEAK
)) {
440 // (GCC uses a R_AARCH64_ABS64 in this case.)
441 greloca(cur_text_section
, sym
, ind
, R_AARCH64_MOVW_UABS_G0_NC
, addend
);
442 o(0xd2800000 | r
); // mov x(rt),#0,lsl #0
443 greloca(cur_text_section
, sym
, ind
, R_AARCH64_MOVW_UABS_G1_NC
, addend
);
444 o(0xf2a00000 | r
); // movk x(rt),#0,lsl #16
445 greloca(cur_text_section
, sym
, ind
, R_AARCH64_MOVW_UABS_G2_NC
, addend
);
446 o(0xf2c00000 | r
); // movk x(rt),#0,lsl #32
447 greloca(cur_text_section
, sym
, ind
, R_AARCH64_MOVW_UABS_G3
, addend
);
448 o(0xf2e00000 | r
); // movk x(rt),#0,lsl #48
451 greloca(cur_text_section
, sym
, ind
, R_AARCH64_ADR_PREL_PG_HI21
, addend
);
453 greloca(cur_text_section
, sym
, ind
, R_AARCH64_ADD_ABS_LO12_NC
, addend
);
454 o(0x91000000 | r
| r
<< 5);
458 ST_FUNC
void load(int r
, SValue
*sv
)
460 int svtt
= sv
->type
.t
;
461 int svr
= sv
->r
& ~VT_LVAL_TYPE
;
462 int svrv
= svr
& VT_VALMASK
;
463 uint64_t svcul
= (int32_t)sv
->c
.ul
;
465 if (svr
== (VT_LOCAL
| VT_LVAL
)) {
467 arm64_ldrv(arm64_type_size(svtt
), fltr(r
), 29, svcul
);
469 arm64_ldrx(!(svtt
& VT_UNSIGNED
), arm64_type_size(svtt
),
474 if ((svr
& ~VT_VALMASK
) == VT_LVAL
&& svrv
< VT_CONST
) {
476 arm64_ldrv(arm64_type_size(svtt
), fltr(r
), intr(svrv
), 0);
478 arm64_ldrx(!(svtt
& VT_UNSIGNED
), arm64_type_size(svtt
),
479 intr(r
), intr(svrv
), 0);
483 if (svr
== (VT_CONST
| VT_LVAL
| VT_SYM
)) {
484 arm64_sym(30, sv
->sym
, svcul
); // use x30 for address
486 arm64_ldrv(arm64_type_size(svtt
), fltr(r
), 30, 0);
488 arm64_ldrx(!(svtt
& VT_UNSIGNED
), arm64_type_size(svtt
),
493 if (svr
== (VT_CONST
| VT_SYM
)) {
494 arm64_sym(intr(r
), sv
->sym
, svcul
);
498 if (svr
== VT_CONST
) {
499 if ((svtt
& VT_BTYPE
) != VT_VOID
)
500 arm64_movimm(intr(r
), arm64_type_size(svtt
) == 3 ?
501 sv
->c
.ull
: (uint32_t)svcul
);
505 if (svr
< VT_CONST
) {
506 if (IS_FREG(r
) && IS_FREG(svr
))
507 if (svtt
== VT_LDOUBLE
)
508 o(0x4ea01c00 | fltr(r
) | fltr(svr
) << 5);
509 // mov v(r).16b,v(svr).16b
511 o(0x1e604000 | fltr(r
) | fltr(svr
) << 5); // fmov d(r),d(svr)
512 else if (!IS_FREG(r
) && !IS_FREG(svr
))
513 o(0xaa0003e0 | intr(r
) | intr(svr
) << 16); // mov x(r),x(svr)
519 if (svr
== VT_LOCAL
) {
521 o(0xd10003a0 | intr(r
) | -svcul
<< 10); // sub x(r),x29,#...
523 arm64_movimm(30, -svcul
); // use x30 for offset
524 o(0xcb0003a0 | intr(r
) | 30 << 16); // sub x(r),x29,x30
529 if (svr
== VT_JMP
|| svr
== VT_JMPI
) {
530 int t
= (svr
== VT_JMPI
);
531 arm64_movimm(intr(r
), t
);
532 o(0x14000002); // b .+8
534 arm64_movimm(intr(r
), t
^ 1);
538 if (svr
== (VT_LLOCAL
| VT_LVAL
)) {
539 arm64_ldrx(0, 3, 30, 29, svcul
); // use x30 for offset
541 arm64_ldrv(arm64_type_size(svtt
), fltr(r
), 30, 0);
543 arm64_ldrx(!(svtt
& VT_UNSIGNED
), arm64_type_size(svtt
),
548 printf("load(%x, (%x, %x, %llx))\n", r
, svtt
, sv
->r
, (long long)svcul
);
552 ST_FUNC
void store(int r
, SValue
*sv
)
554 int svtt
= sv
->type
.t
;
555 int svr
= sv
->r
& ~VT_LVAL_TYPE
;
556 int svrv
= svr
& VT_VALMASK
;
557 uint64_t svcul
= (int32_t)sv
->c
.ul
;
559 if (svr
== (VT_LOCAL
| VT_LVAL
)) {
561 arm64_strv(arm64_type_size(svtt
), fltr(r
), 29, svcul
);
563 arm64_strx(arm64_type_size(svtt
), intr(r
), 29, svcul
);
567 if ((svr
& ~VT_VALMASK
) == VT_LVAL
&& svrv
< VT_CONST
) {
569 arm64_strv(arm64_type_size(svtt
), fltr(r
), intr(svrv
), 0);
571 arm64_strx(arm64_type_size(svtt
), intr(r
), intr(svrv
), 0);
575 if (svr
== (VT_CONST
| VT_LVAL
| VT_SYM
)) {
576 arm64_sym(30, sv
->sym
, svcul
); // use x30 for address
578 arm64_strv(arm64_type_size(svtt
), fltr(r
), 30, 0);
580 arm64_strx(arm64_type_size(svtt
), intr(r
), 30, 0);
584 printf("store(%x, (%x, %x, %llx))\n", r
, svtt
, sv
->r
, (long long)svcul
);
588 static void arm64_gen_bl_or_b(int b
)
590 if ((vtop
->r
& (VT_VALMASK
| VT_LVAL
)) == VT_CONST
) {
592 if (vtop
->r
& VT_SYM
)
593 greloc(cur_text_section
, vtop
->sym
, ind
, R_AARCH64_CALL26
);
596 o(0x94000000); // bl .
599 o(0xd61f0000 | !b
<< 21 | intr(gv(RC_R30
)) << 5); // br/blr
602 static int arm64_hfa_aux(CType
*type
, int *fsize
, int num
)
604 if (is_float(type
->t
)) {
605 int a
, n
= type_size(type
, &a
);
606 if (num
>= 4 || (*fsize
&& *fsize
!= n
))
611 else if ((type
->t
& VT_BTYPE
) == VT_STRUCT
) {
612 int is_struct
= 0; // rather than union
614 for (field
= type
->ref
->next
; field
; field
= field
->next
)
621 for (field
= type
->ref
->next
; field
; field
= field
->next
) {
622 if (field
->c
!= (num
- num0
) * *fsize
)
624 num
= arm64_hfa_aux(&field
->type
, fsize
, num
);
628 if (type
->ref
->c
!= (num
- num0
) * *fsize
)
634 for (field
= type
->ref
->next
; field
; field
= field
->next
) {
635 int num1
= arm64_hfa_aux(&field
->type
, fsize
, num0
);
638 num
= num1
< num
? num
: num1
;
640 if (type
->ref
->c
!= (num
- num0
) * *fsize
)
645 else if (type
->t
& VT_ARRAY
) {
649 num1
= arm64_hfa_aux(&type
->ref
->type
, fsize
, num
);
650 if (num1
== -1 || (num1
!= num
&& type
->ref
->c
> 4))
652 num1
= num
+ type
->ref
->c
* (num1
- num
);
660 static int arm64_hfa(CType
*type
, int *fsize
)
662 if ((type
->t
& VT_BTYPE
) == VT_STRUCT
|| (type
->t
& VT_ARRAY
)) {
664 int n
= arm64_hfa_aux(type
, &sz
, 0);
665 if (0 < n
&& n
<= 4) {
674 static unsigned long arm64_pcs_aux(int n
, CType
**type
, unsigned long *a
)
676 int nx
= 0; // next integer register
677 int nv
= 0; // next vector register
678 unsigned long ns
= 32; // next stack offset
681 for (i
= 0; i
< n
; i
++) {
682 int hfa
= arm64_hfa(type
[i
], 0);
685 if ((type
[i
]->t
& VT_ARRAY
) ||
686 (type
[i
]->t
& VT_BTYPE
) == VT_FUNC
)
689 size
= type_size(type
[i
], &align
);
694 else if (size
> 16) {
695 // B.3: replace with pointer
697 a
[i
] = nx
++ << 1 | 1;
705 else if ((type
[i
]->t
& VT_BTYPE
) == VT_STRUCT
)
707 size
= (size
+ 7) & ~7;
710 if (is_float(type
[i
]->t
) && nv
< 8) {
711 a
[i
] = 16 + (nv
++ << 1);
716 if (hfa
&& nv
+ hfa
<= 8) {
717 a
[i
] = 16 + (nv
<< 1);
725 size
= (size
+ 7) & ~7;
729 if (hfa
|| (type
[i
]->t
& VT_BTYPE
) == VT_LDOUBLE
) {
731 ns
= (ns
+ align
- 1) & -align
;
735 if ((type
[i
]->t
& VT_BTYPE
) == VT_FLOAT
)
739 if (hfa
|| is_float(type
[i
]->t
)) {
746 if ((type
[i
]->t
& VT_BTYPE
) != VT_STRUCT
&& size
<= 8 && nx
< 8) {
756 if ((type
[i
]->t
& VT_BTYPE
) != VT_STRUCT
&& size
== 16 && nx
< 7) {
763 if ((type
[i
]->t
& VT_BTYPE
) == VT_STRUCT
&& size
<= (8 - nx
) * 8) {
765 nx
+= (size
+ 7) >> 3;
774 ns
= (ns
+ align
- 1) & -align
;
777 if ((type
[i
]->t
& VT_BTYPE
) == VT_STRUCT
) {
795 static unsigned long arm64_pcs(int n
, CType
**type
, unsigned long *a
)
800 if ((type
[0]->t
& VT_BTYPE
) == VT_VOID
)
803 arm64_pcs_aux(1, type
, a
);
804 assert(a
[0] == 0 || a
[0] == 1 || a
[0] == 16);
808 stack
= arm64_pcs_aux(n
, type
+ 1, a
+ 1);
812 for (i
= 0; i
<= n
; i
++) {
814 printf("arm64_pcs return: ");
816 printf("arm64_pcs arg %d: ", i
);
817 if (a
[i
] == (unsigned long)-1)
819 else if (a
[i
] == 1 && !i
)
820 printf("X8 pointer\n");
822 printf("X%lu%s\n", a
[i
] / 2, a
[i
] & 1 ? " pointer" : "");
824 printf("V%lu\n", a
[i
] / 2 - 8);
826 printf("stack %lu%s\n",
827 (a
[i
] - 32) & ~1, a
[i
] & 1 ? " pointer" : "");
834 ST_FUNC
void gfunc_call(int nb_args
)
838 unsigned long *a
, *a1
;
842 return_type
= &vtop
[-nb_args
].type
.ref
->type
;
843 if ((return_type
->t
& VT_BTYPE
) == VT_STRUCT
)
846 t
= tcc_malloc((nb_args
+ 1) * sizeof(*t
));
847 a
= tcc_malloc((nb_args
+ 1) * sizeof(*a
));
848 a1
= tcc_malloc((nb_args
+ 1) * sizeof(*a1
));
851 for (i
= 0; i
< nb_args
; i
++)
852 t
[nb_args
- i
] = &vtop
[-i
].type
;
854 stack
= arm64_pcs(nb_args
, t
, a
);
856 // Allocate space for structs replaced by pointer:
857 for (i
= nb_args
; i
; i
--)
859 SValue
*arg
= &vtop
[i
- nb_args
];
860 int align
, size
= type_size(&arg
->type
, &align
);
861 assert((arg
->type
.t
& VT_BTYPE
) == VT_STRUCT
);
862 stack
= (stack
+ align
- 1) & -align
;
867 stack
= (stack
+ 15) >> 4 << 4;
869 assert(stack
< 0x1000);
871 o(0xd10003ff | stack
<< 10); // sub sp,sp,#(n)
873 // First pass: set all values on stack
874 for (i
= nb_args
; i
; i
--) {
875 vpushv(vtop
- nb_args
+ i
);
878 // struct replaced by pointer
879 int r
= get_reg(RC_INT
);
880 arm64_spoff(intr(r
), a1
[i
]);
881 vset(&vtop
->type
, r
| VT_LVAL
, 0);
887 arm64_spoff(intr(r
), a1
[i
]);
888 arm64_strx(3, intr(r
), 31, (a
[i
] - 32) >> 1 << 1);
891 else if (a
[i
] >= 32) {
893 if ((vtop
->type
.t
& VT_BTYPE
) == VT_STRUCT
) {
894 int r
= get_reg(RC_INT
);
895 arm64_spoff(intr(r
), a
[i
] - 32);
896 vset(&vtop
->type
, r
| VT_LVAL
, 0);
900 else if (is_float(vtop
->type
.t
)) {
902 arm64_strv(arm64_type_size(vtop
[0].type
.t
),
903 fltr(vtop
[0].r
), 31, a
[i
] - 32);
907 arm64_strx(arm64_type_size(vtop
[0].type
.t
),
908 intr(vtop
[0].r
), 31, a
[i
] - 32);
915 // Second pass: assign values to registers
916 for (i
= nb_args
; i
; i
--, vtop
--) {
917 if (a
[i
] < 16 && !(a
[i
] & 1)) {
918 // value in general-purpose registers
919 if ((vtop
->type
.t
& VT_BTYPE
) == VT_STRUCT
) {
920 int align
, size
= type_size(&vtop
->type
, &align
);
921 vtop
->type
.t
= VT_PTR
;
924 arm64_ldrs(a
[i
] / 2, size
);
930 // struct replaced by pointer in register
931 arm64_spoff(a
[i
] / 2, a1
[i
]);
932 else if (a
[i
] < 32) {
933 // value in floating-point registers
934 if ((vtop
->type
.t
& VT_BTYPE
) == VT_STRUCT
) {
935 int j
, sz
, n
= arm64_hfa(&vtop
->type
, &sz
);
936 vtop
->type
.t
= VT_PTR
;
939 for (j
= 0; j
< n
; j
++)
941 (sz
& 16) << 19 | -(sz
& 8) << 27 | (sz
& 4) << 29 |
943 j
<< 10); // ldr ([sdq])(*),[x30,#(j * sz)]
946 gv(RC_F(a
[i
] / 2 - 8));
950 if ((return_type
->t
& VT_BTYPE
) == VT_STRUCT
) {
952 // indirect return: set x8 and discard the stack value
957 // return in registers: keep the address for after the call
962 arm64_gen_bl_or_b(0);
965 o(0x910003ff | stack
<< 10); // add sp,sp,#(n)
968 int rt
= return_type
->t
;
969 int bt
= rt
& VT_BTYPE
;
970 if (bt
== VT_BYTE
|| bt
== VT_SHORT
)
971 // Promote small integers:
972 o(0x13001c00 | (bt
== VT_SHORT
) << 13 |
973 !!(rt
& VT_UNSIGNED
) << 30); // [su]xt[bh] w0,w0
974 else if (bt
== VT_STRUCT
&& !(a
[0] & 1)) {
975 // A struct was returned in registers, so write it out:
979 int align
, size
= type_size(return_type
, &align
);
982 o(0xa9000500); // stp x0,x1,[x8]
984 arm64_strx(size
> 4 ? 3 : size
> 2 ? 2 : size
> 1, 0, 8, 0);
987 else if (a
[0] == 16) {
988 int j
, sz
, n
= arm64_hfa(return_type
, &sz
);
989 for (j
= 0; j
< n
; j
++)
991 (sz
& 16) << 19 | -(sz
& 8) << 27 | (sz
& 4) << 29 |
993 j
<< 10); // str ([sdq])(*),[x8,#(j * sz)]
1003 static unsigned long arm64_func_va_list_stack
;
1004 static int arm64_func_va_list_gr_offs
;
1005 static int arm64_func_va_list_vr_offs
;
1006 static int arm64_func_sub_sp_offset
;
1008 ST_FUNC
void gfunc_prolog(CType
*func_type
)
1016 // Why doesn't the caller (gen_function) set func_vt?
1017 func_vt
= func_type
->ref
->type
;
1018 func_vc
= 144; // offset of where x8 is stored
1020 for (sym
= func_type
->ref
; sym
; sym
= sym
->next
)
1022 t
= tcc_malloc(n
* sizeof(*t
));
1023 a
= tcc_malloc(n
* sizeof(*a
));
1025 for (sym
= func_type
->ref
; sym
; sym
= sym
->next
)
1026 t
[i
++] = &sym
->type
;
1028 arm64_func_va_list_stack
= arm64_pcs(n
- 1, t
, a
);
1030 o(0xa9b27bfd); // stp x29,x30,[sp,#-224]!
1031 o(0xad0087e0); // stp q0,q1,[sp,#16]
1032 o(0xad018fe2); // stp q2,q3,[sp,#48]
1033 o(0xad0297e4); // stp q4,q5,[sp,#80]
1034 o(0xad039fe6); // stp q6,q7,[sp,#112]
1035 o(0xa90923e8); // stp x8,x8,[sp,#144]
1036 o(0xa90a07e0); // stp x0,x1,[sp,#160]
1037 o(0xa90b0fe2); // stp x2,x3,[sp,#176]
1038 o(0xa90c17e4); // stp x4,x5,[sp,#192]
1039 o(0xa90d1fe6); // stp x6,x7,[sp,#208]
1041 arm64_func_va_list_gr_offs
= -64;
1042 arm64_func_va_list_vr_offs
= -128;
1044 for (i
= 1, sym
= func_type
->ref
->next
; sym
; i
++, sym
= sym
->next
) {
1045 int off
= (a
[i
] < 16 ? 160 + a
[i
] / 2 * 8 :
1046 a
[i
] < 32 ? 16 + (a
[i
] - 16) / 2 * 16 :
1047 224 + ((a
[i
] - 32) >> 1 << 1));
1048 sym_push(sym
->v
& ~SYM_FIELD
, &sym
->type
,
1049 (a
[i
] & 1 ? VT_LLOCAL
: VT_LOCAL
) | lvalue_type(sym
->type
.t
),
1053 int align
, size
= type_size(&sym
->type
, &align
);
1054 arm64_func_va_list_gr_offs
= (a
[i
] / 2 - 7 +
1055 (!(a
[i
] & 1) && size
> 8)) * 8;
1057 else if (a
[i
] < 32) {
1058 int hfa
= arm64_hfa(&sym
->type
, 0);
1059 arm64_func_va_list_vr_offs
= (a
[i
] / 2 - 16 +
1060 (hfa
? hfa
: 1)) * 16;
1063 // HFAs of float and double need to be written differently:
1064 if (16 <= a
[i
] && a
[i
] < 32 && (sym
->type
.t
& VT_BTYPE
) == VT_STRUCT
) {
1065 int j
, sz
, k
= arm64_hfa(&sym
->type
, &sz
);
1067 for (j
= 0; j
< k
; j
++) {
1068 o(0x3d0003e0 | -(sz
& 8) << 27 | (sz
& 4) << 29 |
1069 ((a
[i
] - 16) / 2 + j
) | (off
/ sz
+ j
) << 10);
1070 // str ([sdq])(*),[sp,#(j * sz)]
1078 o(0x910003fd); // mov x29,sp
1079 arm64_func_sub_sp_offset
= ind
;
1080 // In gfunc_epilog these will be replaced with code to decrement SP:
1081 o(0xd503201f); // nop
1082 o(0xd503201f); // nop
1086 ST_FUNC
void gen_va_start(void)
1089 --vtop
; // we don't need the "arg"
1091 r
= intr(gv(RC_INT
));
1093 if (arm64_func_va_list_stack
) {
1094 //xx could use add (immediate) here
1095 arm64_movimm(30, arm64_func_va_list_stack
+ 224);
1096 o(0x8b1e03be); // add x30,x29,x30
1099 o(0x910383be); // add x30,x29,#224
1100 o(0xf900001e | r
<< 5); // str x30,[x(r)]
1102 if (arm64_func_va_list_gr_offs
) {
1103 if (arm64_func_va_list_stack
)
1104 o(0x910383be); // add x30,x29,#224
1105 o(0xf900041e | r
<< 5); // str x30,[x(r),#8]
1108 if (arm64_func_va_list_vr_offs
) {
1109 o(0x910243be); // add x30,x29,#144
1110 o(0xf900081e | r
<< 5); // str x30,[x(r),#16]
1113 arm64_movimm(30, arm64_func_va_list_gr_offs
);
1114 o(0xb900181e | r
<< 5); // str w30,[x(r),#24]
1116 arm64_movimm(30, arm64_func_va_list_vr_offs
);
1117 o(0xb9001c1e | r
<< 5); // str w30,[x(r),#28]
1122 ST_FUNC
void gen_va_arg(CType
*t
)
1124 int align
, size
= type_size(t
, &align
);
1125 int fsize
, hfa
= arm64_hfa(t
, &fsize
);
1128 if (is_float(t
->t
)) {
1134 r0
= intr(gv(RC_INT
));
1135 r1
= get_reg(RC_INT
);
1136 vtop
[0].r
= r1
| lvalue_type(t
->t
);
1140 uint32_t n
= size
> 16 ? 8 : (size
+ 7) & -8;
1141 o(0xb940181e | r0
<< 5); // ldr w30,[x(r0),#24] // __gr_offs
1143 assert(0); // this path untested but needed for __uint128_t
1144 o(0x11003fde); // add w30,w30,#15
1145 o(0x121c6fde); // and w30,w30,#-16
1147 o(0x310003c0 | r1
| n
<< 10); // adds w(r1),w30,#(n)
1148 o(0x540000ad); // b.le .+20
1149 o(0xf9400000 | r1
| r0
<< 5); // ldr x(r1),[x(r0)] // __stack
1150 o(0x9100001e | r1
<< 5 | n
<< 10); // add x30,x(r1),#(n)
1151 o(0xf900001e | r0
<< 5); // str x30,[x(r0)] // __stack
1152 o(0x14000004); // b .+16
1153 o(0xb9001800 | r1
| r0
<< 5); // str w(r1),[x(r0),#24] // __gr_offs
1154 o(0xf9400400 | r1
| r0
<< 5); // ldr x(r1),[x(r0),#8] // __gr_top
1155 o(0x8b3ec000 | r1
| r1
<< 5); // add x(r1),x(r1),w30,sxtw
1157 o(0xf9400000 | r1
| r1
<< 5); // ldr x(r1),[x(r1)]
1160 uint32_t rsz
= hfa
<< 4;
1161 uint32_t ssz
= (size
+ 7) & -(uint32_t)8;
1163 o(0xb9401c1e | r0
<< 5); // ldr w30,[x(r0),#28] // __vr_offs
1164 o(0x310003c0 | r1
| rsz
<< 10); // adds w(r1),w30,#(rsz)
1165 b1
= ind
; o(0x5400000d); // b.le lab1
1166 o(0xf9400000 | r1
| r0
<< 5); // ldr x(r1),[x(r0)] // __stack
1168 o(0x91003c00 | r1
| r1
<< 5); // add x(r1),x(r1),#15
1169 o(0x927cec00 | r1
| r1
<< 5); // and x(r1),x(r1),#-16
1171 o(0x9100001e | r1
<< 5 | ssz
<< 10); // add x30,x(r1),#(ssz)
1172 o(0xf900001e | r0
<< 5); // str x30,[x(r0)] // __stack
1173 b2
= ind
; o(0x14000000); // b lab2
1175 *(uint32_t *)(cur_text_section
->data
+ b1
) =
1176 (0x5400000d | (ind
- b1
) << 3);
1177 o(0xb9001c00 | r1
| r0
<< 5); // str w(r1),[x(r0),#28] // __vr_offs
1178 o(0xf9400800 | r1
| r0
<< 5); // ldr x(r1),[x(r0),#16] // __vr_top
1179 if (hfa
== 1 || fsize
== 16)
1180 o(0x8b3ec000 | r1
| r1
<< 5); // add x(r1),x(r1),w30,sxtw
1182 // We need to change the layout of this HFA.
1183 // Get some space on the stack using global variable "loc":
1184 loc
= (loc
- size
) & -(uint32_t)align
;
1185 o(0x8b3ec000 | 30 | r1
<< 5); // add x30,x(r1),w30,sxtw
1186 arm64_movimm(r1
, loc
);
1187 o(0x8b0003a0 | r1
| r1
<< 16); // add x(r1),x29,x(r1)
1188 o(0x4c402bdc | (uint32_t)fsize
<< 7 |
1189 (uint32_t)(hfa
== 2) << 15 |
1190 (uint32_t)(hfa
== 3) << 14); // ld1 {v28.(4s|2d),...},[x30]
1191 o(0x0d00801c | r1
<< 5 | (fsize
== 8) << 10 |
1192 (uint32_t)(hfa
!= 2) << 13 |
1193 (uint32_t)(hfa
!= 3) << 21); // st(hfa) {v28.(s|d),...}[0],[x(r1)]
1196 *(uint32_t *)(cur_text_section
->data
+ b2
) =
1197 (0x14000000 | (ind
- b2
) >> 2);
1201 ST_FUNC
int regargs_nregs(RegArgs
*args
)
1206 ST_FUNC
int gfunc_sret(CType
*vt
, int variadic
, CType
*ret
, int *align
, int *regsize
, RegArgs
*args
)
1213 ST_FUNC
void greturn(void)
1215 CType
*t
= &func_vt
;
1218 arm64_pcs(0, &t
, &a
);
1223 if ((func_vt
.t
& VT_BTYPE
) == VT_STRUCT
) {
1224 int align
, size
= type_size(&func_vt
, &align
);
1227 arm64_ldrs(0, size
);
1233 CType type
= func_vt
;
1235 vset(&type
, VT_LOCAL
| VT_LVAL
, func_vc
);
1242 if ((func_vt
.t
& VT_BTYPE
) == VT_STRUCT
) {
1243 int j
, sz
, n
= arm64_hfa(&vtop
->type
, &sz
);
1246 for (j
= 0; j
< n
; j
++)
1248 (sz
& 16) << 19 | -(sz
& 8) << 27 | (sz
& 4) << 29 |
1249 j
| j
<< 10); // ldr ([sdq])(*),[x0,#(j * sz)]
1259 ST_FUNC
void gfunc_epilog(void)
1262 // Insert instructions to subtract size of stack frame from SP.
1264 (uint32_t *)(cur_text_section
->data
+ arm64_func_sub_sp_offset
);
1265 uint64_t diff
= (-loc
+ 15) & ~15;
1266 if (!(diff
>> 24)) {
1267 if (diff
& 0xfff) // sub sp,sp,#(diff & 0xfff)
1268 ptr
[0] = 0xd10003ff | (diff
& 0xfff) << 10;
1269 if (diff
>> 12) // sub sp,sp,#(diff >> 12),lsl #12
1270 ptr
[1] = 0xd14003ff | (diff
>> 12) << 10;
1273 // In this case we may subtract more than necessary,
1274 // but always less than 17/16 of what we were aiming for.
1277 while (diff
>> 20) {
1278 diff
= (diff
+ 0xffff) >> 16;
1281 while (diff
>> 16) {
1282 diff
= (diff
+ 1) >> 1;
1285 ptr
[0] = 0xd2800010 | diff
<< 5 | i
<< 21;
1286 // mov x16,#(diff),lsl #(16 * i)
1287 ptr
[1] = 0xcb3063ff | j
<< 10;
1288 // sub sp,sp,x16,lsl #(j)
1291 o(0x910003bf); // mov sp,x29
1292 o(0xa8ce7bfd); // ldp x29,x30,[sp],#224
1294 o(0xd65f03c0); // ret
1297 // Generate forward branch to label:
1298 ST_FUNC
int gjmp(int t
)
1305 // Generate branch to known address:
1306 ST_FUNC
void gjmp_addr(int a
)
1308 assert(a
- ind
+ 0x8000000 < 0x10000000);
1309 o(0x14000000 | ((a
- ind
) >> 2 & 0x3ffffff));
1312 ST_FUNC
int gtst(int inv
, int t
)
1314 int bt
= vtop
->type
.t
& VT_BTYPE
;
1315 if (bt
== VT_LDOUBLE
) {
1316 int a
, b
, f
= fltr(gv(RC_FLOAT
));
1317 a
= get_reg(RC_INT
);
1320 b
= get_reg(RC_INT
);
1323 o(0x4e083c00 | a
| f
<< 5); // mov x(a),v(f).d[0]
1324 o(0x4e183c00 | b
| f
<< 5); // mov x(b),v(f).d[1]
1325 o(0xaa000400 | a
| a
<< 5 | b
<< 16); // orr x(a),x(a),x(b),lsl #1
1326 o(0xb4000040 | a
| !!inv
<< 24); // cbz/cbnz x(a),.+8
1329 else if (bt
== VT_FLOAT
|| bt
== VT_DOUBLE
) {
1330 int a
= fltr(gv(RC_FLOAT
));
1331 o(0x1e202008 | a
<< 5 | (bt
!= VT_FLOAT
) << 22); // fcmp
1332 o(0x54000040 | !!inv
); // b.eq/b.ne .+8
1335 int ll
= (bt
== VT_PTR
|| bt
== VT_LLONG
);
1336 int a
= intr(gv(RC_INT
));
1337 o(0x34000040 | a
| !!inv
<< 24 | ll
<< 31); // cbz/cbnz wA,.+8
1343 static int arm64_iconst(uint64_t *val
, SValue
*sv
)
1345 if ((sv
->r
& (VT_VALMASK
| VT_LVAL
| VT_SYM
)) != VT_CONST
)
1348 int t
= sv
->type
.t
& (VT_BTYPE
| VT_UNSIGNED
);
1349 // It's crazy how TCC has all these alternatives for storing a value:
1350 if (t
== (VT_LLONG
| VT_UNSIGNED
))
1352 else if (t
== VT_LLONG
)
1354 else if (t
& VT_UNSIGNED
)
1362 static int arm64_gen_opic(int op
, uint32_t l
, int rev
, uint64_t val
,
1363 uint32_t x
, uint32_t a
)
1365 if (op
== '-' && !rev
) {
1369 val
= l
? val
: (uint32_t)val
;
1374 int s
= l
? val
>> 63 : val
>> 31;
1375 val
= s
? -val
: val
;
1376 val
= l
? val
: (uint32_t)val
;
1377 if (!(val
& ~(uint64_t)0xfff))
1378 o(0x11000000 | l
<< 31 | s
<< 30 | x
| a
<< 5 | val
<< 10);
1379 else if (!(val
& ~(uint64_t)0xfff000))
1380 o(0x11400000 | l
<< 31 | s
<< 30 | x
| a
<< 5 | val
>> 12 << 10);
1382 arm64_movimm(30, val
); // use x30
1383 o(0x0b1e0000 | l
<< 31 | s
<< 30 | x
| a
<< 5);
1390 o(0x4b0003e0 | l
<< 31 | x
| a
<< 16); // neg
1391 else if (val
== (l
? (uint64_t)-1 : (uint32_t)-1))
1392 o(0x2a2003e0 | l
<< 31 | x
| a
<< 16); // mvn
1394 arm64_movimm(30, val
); // use x30
1395 o(0x4b0003c0 | l
<< 31 | x
| a
<< 16); // sub
1400 if (val
== -1 || (val
== 0xffffffff && !l
)) {
1401 o(0x2a2003e0 | l
<< 31 | x
| a
<< 16); // mvn
1407 int e
= arm64_encode_bimm64(l
? val
: val
| val
<< 32);
1410 o((op
== '&' ? 0x12000000 :
1411 op
== '|' ? 0x32000000 : 0x52000000) |
1412 l
<< 31 | x
| a
<< 5 | (uint32_t)e
<< 10);
1419 uint32_t n
= 32 << l
;
1420 val
= val
& (n
- 1);
1425 else if (op
== TOK_SHL
)
1426 o(0x53000000 | l
<< 31 | l
<< 22 | x
| a
<< 5 |
1427 (n
- val
) << 16 | (n
- 1 - val
) << 10); // lsl
1429 o(0x13000000 | (op
== TOK_SHR
) << 30 | l
<< 31 | l
<< 22 |
1430 x
| a
<< 5 | val
<< 16 | (n
- 1) << 10); // lsr/asr
1438 static void arm64_gen_opil(int op
, uint32_t l
)
1442 // Special treatment for operations with a constant operand:
1447 if (arm64_iconst(0, &vtop
[0])) {
1451 if (arm64_iconst(&val
, &vtop
[-1])) {
1453 a
= intr(vtop
[0].r
);
1455 x
= get_reg(RC_INT
);
1457 if (arm64_gen_opic(op
, l
, rev
, val
, intr(x
), a
)) {
1468 gv2(RC_INT
, RC_INT
);
1469 assert(vtop
[-1].r
< VT_CONST
&& vtop
[0].r
< VT_CONST
);
1470 a
= intr(vtop
[-1].r
);
1471 b
= intr(vtop
[0].r
);
1473 x
= get_reg(RC_INT
);
1480 // Use x30 for quotient:
1481 o(0x1ac00c00 | l
<< 31 | 30 | a
<< 5 | b
<< 16); // sdiv
1482 o(0x1b008000 | l
<< 31 | x
| 30 << 5 | b
<< 16 | a
<< 10); // msub
1485 o(0x0a000000 | l
<< 31 | x
| a
<< 5 | b
<< 16); // and
1488 o(0x1b007c00 | l
<< 31 | x
| a
<< 5 | b
<< 16); // mul
1491 o(0x0b000000 | l
<< 31 | x
| a
<< 5 | b
<< 16); // add
1494 o(0x4b000000 | l
<< 31 | x
| a
<< 5 | b
<< 16); // sub
1497 o(0x1ac00c00 | l
<< 31 | x
| a
<< 5 | b
<< 16); // sdiv
1500 o(0x4a000000 | l
<< 31 | x
| a
<< 5 | b
<< 16); // eor
1503 o(0x2a000000 | l
<< 31 | x
| a
<< 5 | b
<< 16); // orr
1506 o(0x6b00001f | l
<< 31 | a
<< 5 | b
<< 16); // cmp
1507 o(0x1a9f17e0 | x
); // cset wA,eq
1510 o(0x6b00001f | l
<< 31 | a
<< 5 | b
<< 16); // cmp
1511 o(0x1a9fb7e0 | x
); // cset wA,ge
1514 o(0x6b00001f | l
<< 31 | a
<< 5 | b
<< 16); // cmp
1515 o(0x1a9fd7e0 | x
); // cset wA,gt
1518 o(0x6b00001f | l
<< 31 | a
<< 5 | b
<< 16); // cmp
1519 o(0x1a9fc7e0 | x
); // cset wA,le
1522 o(0x6b00001f | l
<< 31 | a
<< 5 | b
<< 16); // cmp
1523 o(0x1a9fa7e0 | x
); // cset wA,lt
1526 o(0x6b00001f | l
<< 31 | a
<< 5 | b
<< 16); // cmp
1527 o(0x1a9f07e0 | x
); // cset wA,ne
1530 o(0x1ac02800 | l
<< 31 | x
| a
<< 5 | b
<< 16); // asr
1533 o(0x1ac02000 | l
<< 31 | x
| a
<< 5 | b
<< 16); // lsl
1536 o(0x1ac02400 | l
<< 31 | x
| a
<< 5 | b
<< 16); // lsr
1540 o(0x1ac00800 | l
<< 31 | x
| a
<< 5 | b
<< 16); // udiv
1543 o(0x6b00001f | l
<< 31 | a
<< 5 | b
<< 16); // cmp
1544 o(0x1a9f37e0 | x
); // cset wA,cs
1547 o(0x6b00001f | l
<< 31 | a
<< 5 | b
<< 16); // cmp
1548 o(0x1a9f97e0 | x
); // cset wA,hi
1551 o(0x6b00001f | l
<< 31 | a
<< 5 | b
<< 16); // cmp
1552 o(0x1a9f27e0 | x
); // cset wA,cc
1555 o(0x6b00001f | l
<< 31 | a
<< 5 | b
<< 16); // cmp
1556 o(0x1a9f87e0 | x
); // cset wA,ls
1559 // Use x30 for quotient:
1560 o(0x1ac00800 | l
<< 31 | 30 | a
<< 5 | b
<< 16); // udiv
1561 o(0x1b008000 | l
<< 31 | x
| 30 << 5 | b
<< 16 | a
<< 10); // msub
1568 ST_FUNC
void gen_opi(int op
)
1570 arm64_gen_opil(op
, 0);
1573 ST_FUNC
void gen_opl(int op
)
1575 arm64_gen_opil(op
, 1);
1578 ST_FUNC
void gen_opf(int op
)
1582 if (vtop
[0].type
.t
== VT_LDOUBLE
) {
1583 CType type
= vtop
[0].type
;
1587 case '*': func
= TOK___multf3
; break;
1588 case '+': func
= TOK___addtf3
; break;
1589 case '-': func
= TOK___subtf3
; break;
1590 case '/': func
= TOK___divtf3
; break;
1591 case TOK_EQ
: func
= TOK___eqtf2
; cond
= 1; break;
1592 case TOK_NE
: func
= TOK___netf2
; cond
= 0; break;
1593 case TOK_LT
: func
= TOK___lttf2
; cond
= 10; break;
1594 case TOK_GE
: func
= TOK___getf2
; cond
= 11; break;
1595 case TOK_LE
: func
= TOK___letf2
; cond
= 12; break;
1596 case TOK_GT
: func
= TOK___gttf2
; cond
= 13; break;
1597 default: assert(0); break;
1599 vpush_global_sym(&func_old_type
, func
);
1603 vtop
->r
= cond
< 0 ? REG_FRET
: REG_IRET
;
1607 o(0x7100001f); // cmp w0,#0
1608 o(0x1a9f07e0 | cond
<< 12); // cset w0,(cond)
1613 dbl
= vtop
[0].type
.t
!= VT_FLOAT
;
1614 gv2(RC_FLOAT
, RC_FLOAT
);
1615 assert(vtop
[-1].r
< VT_CONST
&& vtop
[0].r
< VT_CONST
);
1616 a
= fltr(vtop
[-1].r
);
1617 b
= fltr(vtop
[0].r
);
1620 case TOK_EQ
: case TOK_NE
:
1621 case TOK_LT
: case TOK_GE
: case TOK_LE
: case TOK_GT
:
1622 x
= get_reg(RC_INT
);
1628 x
= get_reg(RC_FLOAT
);
1637 o(0x1e200800 | dbl
<< 22 | x
| a
<< 5 | b
<< 16); // fmul
1640 o(0x1e202800 | dbl
<< 22 | x
| a
<< 5 | b
<< 16); // fadd
1643 o(0x1e203800 | dbl
<< 22 | x
| a
<< 5 | b
<< 16); // fsub
1646 o(0x1e201800 | dbl
<< 22 | x
| a
<< 5 | b
<< 16); // fdiv
1649 o(0x1e202000 | dbl
<< 22 | a
<< 5 | b
<< 16); // fcmp
1650 o(0x1a9f17e0 | x
); // cset w(x),eq
1653 o(0x1e202000 | dbl
<< 22 | a
<< 5 | b
<< 16); // fcmp
1654 o(0x1a9fb7e0 | x
); // cset w(x),ge
1657 o(0x1e202000 | dbl
<< 22 | a
<< 5 | b
<< 16); // fcmp
1658 o(0x1a9fd7e0 | x
); // cset w(x),gt
1661 o(0x1e202000 | dbl
<< 22 | a
<< 5 | b
<< 16); // fcmp
1662 o(0x1a9f87e0 | x
); // cset w(x),ls
1665 o(0x1e202000 | dbl
<< 22 | a
<< 5 | b
<< 16); // fcmp
1666 o(0x1a9f57e0 | x
); // cset w(x),mi
1669 o(0x1e202000 | dbl
<< 22 | a
<< 5 | b
<< 16); // fcmp
1670 o(0x1a9f07e0 | x
); // cset w(x),ne
1677 // Generate sign extension from 32 to 64 bits:
1678 ST_FUNC
void gen_cvt_sxtw(void)
1680 int r
= intr(gv(RC_INT
));
1681 o(0x93407c00 | r
| r
<< 5); // sxtw x(r),w(r)
1684 ST_FUNC
void gen_cvt_itof(int t
)
1686 if (t
== VT_LDOUBLE
) {
1687 int f
= vtop
->type
.t
;
1688 int func
= (f
& VT_BTYPE
) == VT_LLONG
?
1689 (f
& VT_UNSIGNED
? TOK___floatunditf
: TOK___floatditf
) :
1690 (f
& VT_UNSIGNED
? TOK___floatunsitf
: TOK___floatsitf
);
1691 vpush_global_sym(&func_old_type
, func
);
1700 int d
, n
= intr(gv(RC_INT
));
1701 int s
= !(vtop
->type
.t
& VT_UNSIGNED
);
1702 int l
= ((vtop
->type
.t
& VT_BTYPE
) == VT_LLONG
);
1704 d
= get_reg(RC_FLOAT
);
1707 o(0x1e220000 | !s
<< 16 | (t
!= VT_FLOAT
) << 22 | fltr(d
) |
1708 l
<< 31 | n
<< 5); // [us]cvtf [sd](d),[wx](n)
1712 ST_FUNC
void gen_cvt_ftoi(int t
)
1714 if ((vtop
->type
.t
& VT_BTYPE
) == VT_LDOUBLE
) {
1715 int func
= (t
& VT_BTYPE
) == VT_LLONG
?
1716 (t
& VT_UNSIGNED
? TOK___fixunstfdi
: TOK___fixtfdi
) :
1717 (t
& VT_UNSIGNED
? TOK___fixunstfsi
: TOK___fixtfsi
);
1718 vpush_global_sym(&func_old_type
, func
);
1727 int d
, n
= fltr(gv(RC_FLOAT
));
1728 int l
= ((vtop
->type
.t
& VT_BTYPE
) != VT_FLOAT
);
1730 d
= get_reg(RC_INT
);
1734 !!(t
& VT_UNSIGNED
) << 16 |
1735 ((t
& VT_BTYPE
) == VT_LLONG
) << 31 | intr(d
) |
1736 l
<< 22 | n
<< 5); // fcvtz[su] [wx](d),[sd](n)
1740 ST_FUNC
void gen_cvt_ftof(int t
)
1742 int f
= vtop
[0].type
.t
;
1743 assert(t
== VT_FLOAT
|| t
== VT_DOUBLE
|| t
== VT_LDOUBLE
);
1744 assert(f
== VT_FLOAT
|| f
== VT_DOUBLE
|| f
== VT_LDOUBLE
);
1748 if (t
== VT_LDOUBLE
|| f
== VT_LDOUBLE
) {
1749 int func
= (t
== VT_LDOUBLE
) ?
1750 (f
== VT_FLOAT
? TOK___extendsftf2
: TOK___extenddftf2
) :
1751 (t
== VT_FLOAT
? TOK___trunctfsf2
: TOK___trunctfdf2
);
1752 vpush_global_sym(&func_old_type
, func
);
1762 assert(vtop
[0].r
< VT_CONST
);
1763 a
= fltr(vtop
[0].r
);
1765 x
= get_reg(RC_FLOAT
);
1771 o(0x1e22c000 | x
| a
<< 5); // fcvt d(x),s(a)
1773 o(0x1e624000 | x
| a
<< 5); // fcvt s(x),d(a)
1777 ST_FUNC
void ggoto(void)
1779 arm64_gen_bl_or_b(1);
1783 ST_FUNC
void gen_clear_cache(void)
1785 uint32_t beg
, end
, dsz
, isz
, p
, lab1
, b1
;
1786 gv2(RC_INT
, RC_INT
);
1788 vtop
->r
= get_reg(RC_INT
);
1790 vtop
->r
= get_reg(RC_INT
);
1792 vtop
->r
= get_reg(RC_INT
);
1793 beg
= intr(vtop
[-4].r
); // x0
1794 end
= intr(vtop
[-3].r
); // x1
1795 dsz
= intr(vtop
[-2].r
); // x2
1796 isz
= intr(vtop
[-1].r
); // x3
1797 p
= intr(vtop
[0].r
); // x4
1800 o(0xd53b0020 | isz
); // mrs x(isz),ctr_el0
1801 o(0x52800080 | p
); // mov w(p),#4
1802 o(0x53104c00 | dsz
| isz
<< 5); // ubfx w(dsz),w(isz),#16,#4
1803 o(0x1ac02000 | dsz
| p
<< 5 | dsz
<< 16); // lsl w(dsz),w(p),w(dsz)
1804 o(0x12000c00 | isz
| isz
<< 5); // and w(isz),w(isz),#15
1805 o(0x1ac02000 | isz
| p
<< 5 | isz
<< 16); // lsl w(isz),w(p),w(isz)
1806 o(0x51000400 | p
| dsz
<< 5); // sub w(p),w(dsz),#1
1807 o(0x8a240004 | p
| beg
<< 5 | p
<< 16); // bic x(p),x(beg),x(p)
1808 b1
= ind
; o(0x14000000); // b
1810 o(0xd50b7b20 | p
); // dc cvau,x(p)
1811 o(0x8b000000 | p
| p
<< 5 | dsz
<< 16); // add x(p),x(p),x(dsz)
1812 *(uint32_t *)(cur_text_section
->data
+ b1
) =
1813 (0x14000000 | (ind
- b1
) >> 2);
1814 o(0xeb00001f | p
<< 5 | end
<< 16); // cmp x(p),x(end)
1815 o(0x54ffffa3 | ((lab1
- ind
) << 3 & 0xffffe0)); // b.cc lab1
1816 o(0xd5033b9f); // dsb ish
1817 o(0x51000400 | p
| isz
<< 5); // sub w(p),w(isz),#1
1818 o(0x8a240004 | p
| beg
<< 5 | p
<< 16); // bic x(p),x(beg),x(p)
1819 b1
= ind
; o(0x14000000); // b
1821 o(0xd50b7520 | p
); // ic ivau,x(p)
1822 o(0x8b000000 | p
| p
<< 5 | isz
<< 16); // add x(p),x(p),x(isz)
1823 *(uint32_t *)(cur_text_section
->data
+ b1
) =
1824 (0x14000000 | (ind
- b1
) >> 2);
1825 o(0xeb00001f | p
<< 5 | end
<< 16); // cmp x(p),x(end)
1826 o(0x54ffffa3 | ((lab1
- ind
) << 3 & 0xffffe0)); // b.cc lab1
1827 o(0xd5033b9f); // dsb ish
1828 o(0xd5033fdf); // isb
1831 ST_FUNC
void gen_vla_sp_save(int addr
) {
1832 tcc_error("variable length arrays unsupported for this target");
1835 ST_FUNC
void gen_vla_sp_restore(int addr
) {
1836 tcc_error("variable length arrays unsupported for this target");
1839 ST_FUNC
void gen_vla_alloc(CType
*type
, int align
) {
1840 tcc_error("variable length arrays unsupported for this target");
1843 /* end of A64 code generator */
1844 /*************************************************************/
1846 /*************************************************************/