2 * ARMv4 code generator for TCC
4 * Copyright (c) 2003 Daniel Glöckner
5 * Copyright (c) 2012 Thomas Preud'homme
7 * Based on i386-gen.c by Fabrice Bellard
9 * This library is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU Lesser General Public
11 * License as published by the Free Software Foundation; either
12 * version 2 of the License, or (at your option) any later version.
14 * This library is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * Lesser General Public License for more details.
19 * You should have received a copy of the GNU Lesser General Public
20 * License along with this library; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
24 #ifdef TARGET_DEFS_ONLY
26 #if defined(TCC_ARM_EABI) && !defined(TCC_ARM_VFP)
27 #error "Currently TinyCC only supports float computation with VFP instructions"
30 /* number of available registers */
37 #ifndef TCC_ARM_VERSION
38 # define TCC_ARM_VERSION 5
41 /* a register can belong to several classes. The classes must be
42 sorted from more general to more precise (see gv2() code which does
43 assumptions on it). */
44 #define RC_INT 0x0001 /* generic integer register */
45 #define RC_FLOAT 0x0002 /* generic float register */
61 #define RC_IRET RC_R0 /* function return: integer register */
62 #define RC_LRET RC_R1 /* function return: second integer register */
63 #define RC_FRET RC_F0 /* function return: float register */
65 /* pretty names for the registers */
87 #define T2CPR(t) (((t) & VT_BTYPE) != VT_FLOAT ? 0x100 : 0)
90 /* return registers for function */
91 #define REG_IRET TREG_R0 /* single word int return register */
92 #define REG_LRET TREG_R1 /* second word return register (for long long) */
93 #define REG_FRET TREG_F0 /* float return register */
96 #define TOK___divdi3 TOK___aeabi_ldivmod
97 #define TOK___moddi3 TOK___aeabi_ldivmod
98 #define TOK___udivdi3 TOK___aeabi_uldivmod
99 #define TOK___umoddi3 TOK___aeabi_uldivmod
102 /* defined if function parameters must be evaluated in reverse order */
103 #define INVERT_FUNC_PARAMS
105 /* defined if structures are passed as pointers. Otherwise structures
106 are directly pushed on stack. */
107 /* #define FUNC_STRUCT_PARAM_AS_PTR */
109 /* pointer size, in bytes */
112 /* long double size and alignment, in bytes */
114 #define LDOUBLE_SIZE 8
118 #define LDOUBLE_SIZE 8
122 #define LDOUBLE_ALIGN 8
124 #define LDOUBLE_ALIGN 4
127 /* maximum alignment (for aligned attribute support) */
130 #define CHAR_IS_UNSIGNED
132 /******************************************************/
135 #define EM_TCC_TARGET EM_ARM
137 /* relocation type for 32 bit data relocation */
138 #define R_DATA_32 R_ARM_ABS32
139 #define R_DATA_PTR R_ARM_ABS32
140 #define R_JMP_SLOT R_ARM_JUMP_SLOT
141 #define R_GLOB_DAT R_ARM_GLOB_DAT
142 #define R_COPY R_ARM_COPY
144 #define ELF_START_ADDR 0x00008000
145 #define ELF_PAGE_SIZE 0x1000
152 /******************************************************/
153 #else /* ! TARGET_DEFS_ONLY */
154 /******************************************************/
157 enum float_abi float_abi
;
159 ST_DATA
const int reg_classes
[NB_REGS
] = {
160 /* r0 */ RC_INT
| RC_R0
,
161 /* r1 */ RC_INT
| RC_R1
,
162 /* r2 */ RC_INT
| RC_R2
,
163 /* r3 */ RC_INT
| RC_R3
,
164 /* r12 */ RC_INT
| RC_R12
,
165 /* f0 */ RC_FLOAT
| RC_F0
,
166 /* f1 */ RC_FLOAT
| RC_F1
,
167 /* f2 */ RC_FLOAT
| RC_F2
,
168 /* f3 */ RC_FLOAT
| RC_F3
,
170 /* d4/s8 */ RC_FLOAT
| RC_F4
,
171 /* d5/s10 */ RC_FLOAT
| RC_F5
,
172 /* d6/s12 */ RC_FLOAT
| RC_F6
,
173 /* d7/s14 */ RC_FLOAT
| RC_F7
,
177 static int func_sub_sp_offset
, last_itod_magic
;
180 #if defined(TCC_ARM_EABI) && defined(TCC_ARM_VFP)
181 static CType float_type
, double_type
, func_float_type
, func_double_type
;
182 ST_FUNC
void arm_init(struct TCCState
*s
)
184 float_type
.t
= VT_FLOAT
;
185 double_type
.t
= VT_DOUBLE
;
186 func_float_type
.t
= VT_FUNC
;
187 func_float_type
.ref
= sym_push(SYM_FIELD
, &float_type
, FUNC_CDECL
, FUNC_OLD
);
188 func_double_type
.t
= VT_FUNC
;
189 func_double_type
.ref
= sym_push(SYM_FIELD
, &double_type
, FUNC_CDECL
, FUNC_OLD
);
191 float_abi
= s
->float_abi
;
192 #ifndef TCC_ARM_HARDFLOAT
193 tcc_warning("soft float ABI currently not supported: default to softfp");
197 #define func_float_type func_old_type
198 #define func_double_type func_old_type
199 #define func_ldouble_type func_old_type
200 ST_FUNC
void arm_init(struct TCCState
*s
)
202 #if !defined (TCC_ARM_VFP)
203 tcc_warning("Support for FPA is deprecated and will be removed in next"
206 #if !defined (TCC_ARM_EABI)
207 tcc_warning("Support for OABI is deprecated and will be removed in next"
213 static int two2mask(int a
,int b
) {
214 return (reg_classes
[a
]|reg_classes
[b
])&~(RC_INT
|RC_FLOAT
);
217 static int regmask(int r
) {
218 return reg_classes
[r
]&~(RC_INT
|RC_FLOAT
);
221 /******************************************************/
223 #if defined(TCC_ARM_EABI) && !defined(CONFIG_TCC_ELFINTERP)
224 char *default_elfinterp(struct TCCState
*s
)
226 if (s
->float_abi
== ARM_HARD_FLOAT
)
227 return "/lib/ld-linux-armhf.so.3";
229 return "/lib/ld-linux.so.3";
235 /* this is a good place to start adding big-endian support*/
239 if (!cur_text_section
)
240 tcc_error("compiler error! This happens f.ex. if the compiler\n"
241 "can't evaluate constant expressions outside of a function.");
242 if (ind1
> cur_text_section
->data_allocated
)
243 section_realloc(cur_text_section
, ind1
);
244 cur_text_section
->data
[ind
++] = i
&255;
246 cur_text_section
->data
[ind
++] = i
&255;
248 cur_text_section
->data
[ind
++] = i
&255;
250 cur_text_section
->data
[ind
++] = i
;
253 static uint32_t stuff_const(uint32_t op
, uint32_t c
)
256 uint32_t nc
= 0, negop
= 0;
266 case 0x1A00000: //mov
267 case 0x1E00000: //mvn
274 return (op
&0xF010F000)|((op
>>16)&0xF)|0x1E00000;
278 return (op
&0xF010F000)|((op
>>16)&0xF)|0x1A00000;
279 case 0x1C00000: //bic
284 case 0x1800000: //orr
286 return (op
&0xFFF0FFFF)|0x1E00000;
292 if(c
<256) /* catch undefined <<32 */
295 m
=(0xff>>i
)|(0xff<<(32-i
));
297 return op
|(i
<<7)|(c
<<i
)|(c
>>(32-i
));
307 void stuff_const_harder(uint32_t op
, uint32_t v
) {
313 uint32_t a
[16], nv
, no
, o2
, n2
;
316 o2
=(op
&0xfff0ffff)|((op
&0xf000)<<4);;
318 a
[i
]=(a
[i
-1]>>2)|(a
[i
-1]<<30);
320 for(j
=i
<4?i
+12:15;j
>=i
+4;j
--)
321 if((v
&(a
[i
]|a
[j
]))==v
) {
322 o(stuff_const(op
,v
&a
[i
]));
323 o(stuff_const(o2
,v
&a
[j
]));
330 for(j
=i
<4?i
+12:15;j
>=i
+4;j
--)
331 if((nv
&(a
[i
]|a
[j
]))==nv
) {
332 o(stuff_const(no
,nv
&a
[i
]));
333 o(stuff_const(n2
,nv
&a
[j
]));
338 for(k
=i
<4?i
+12:15;k
>=j
+4;k
--)
339 if((v
&(a
[i
]|a
[j
]|a
[k
]))==v
) {
340 o(stuff_const(op
,v
&a
[i
]));
341 o(stuff_const(o2
,v
&a
[j
]));
342 o(stuff_const(o2
,v
&a
[k
]));
349 for(k
=i
<4?i
+12:15;k
>=j
+4;k
--)
350 if((nv
&(a
[i
]|a
[j
]|a
[k
]))==nv
) {
351 o(stuff_const(no
,nv
&a
[i
]));
352 o(stuff_const(n2
,nv
&a
[j
]));
353 o(stuff_const(n2
,nv
&a
[k
]));
356 o(stuff_const(op
,v
&a
[0]));
357 o(stuff_const(o2
,v
&a
[4]));
358 o(stuff_const(o2
,v
&a
[8]));
359 o(stuff_const(o2
,v
&a
[12]));
363 ST_FUNC
uint32_t encbranch(int pos
, int addr
, int fail
)
367 if(addr
>=0x1000000 || addr
<-0x1000000) {
369 tcc_error("FIXME: function bigger than 32MB");
372 return 0x0A000000|(addr
&0xffffff);
375 int decbranch(int pos
)
378 x
=*(uint32_t *)(cur_text_section
->data
+ pos
);
385 /* output a symbol and patch all calls to it */
386 void gsym_addr(int t
, int a
)
391 x
=(uint32_t *)(cur_text_section
->data
+ t
);
394 *x
=0xE1A00000; // nop
397 *x
|= encbranch(lt
,a
,1);
408 static uint32_t vfpr(int r
)
410 if(r
<TREG_F0
|| r
>TREG_F7
)
411 tcc_error("compiler error! register %i is no vfp register",r
);
415 static uint32_t fpr(int r
)
417 if(r
<TREG_F0
|| r
>TREG_F3
)
418 tcc_error("compiler error! register %i is no fpa register",r
);
423 static uint32_t intr(int r
)
427 if(r
>= TREG_R0
&& r
<= TREG_R3
)
429 if (r
>= TREG_SP
&& r
<= TREG_LR
)
430 return r
+ (13 - TREG_SP
);
431 tcc_error("compiler error! register %i is no int register",r
);
434 static void calcaddr(uint32_t *base
, int *off
, int *sgn
, int maxoff
, unsigned shift
)
436 if(*off
>maxoff
|| *off
&((1<<shift
)-1)) {
443 y
=stuff_const(x
,*off
&~maxoff
);
449 y
=stuff_const(x
,(*off
+maxoff
)&~maxoff
);
453 *off
=((*off
+maxoff
)&~maxoff
)-*off
;
456 stuff_const_harder(x
,*off
&~maxoff
);
461 static uint32_t mapcc(int cc
)
466 return 0x30000000; /* CC/LO */
468 return 0x20000000; /* CS/HS */
470 return 0x00000000; /* EQ */
472 return 0x10000000; /* NE */
474 return 0x90000000; /* LS */
476 return 0x80000000; /* HI */
478 return 0x40000000; /* MI */
480 return 0x50000000; /* PL */
482 return 0xB0000000; /* LT */
484 return 0xA0000000; /* GE */
486 return 0xD0000000; /* LE */
488 return 0xC0000000; /* GT */
490 tcc_error("unexpected condition code");
491 return 0xE0000000; /* AL */
494 static int negcc(int cc
)
523 tcc_error("unexpected condition code");
527 /* load 'r' from value 'sv' */
528 void load(int r
, SValue
*sv
)
530 int v
, ft
, fc
, fr
, sign
;
547 uint32_t base
= 0xB; // fp
550 v1
.r
= VT_LOCAL
| VT_LVAL
;
556 } else if(v
== VT_CONST
) {
565 } else if(v
< VT_CONST
) {
572 calcaddr(&base
,&fc
,&sign
,1020,2);
574 op
=0xED100A00; /* flds */
577 if ((ft
& VT_BTYPE
) != VT_FLOAT
)
578 op
|=0x100; /* flds -> fldd */
579 o(op
|(vfpr(r
)<<12)|(fc
>>2)|(base
<<16));
584 #if LDOUBLE_SIZE == 8
585 if ((ft
& VT_BTYPE
) != VT_FLOAT
)
588 if ((ft
& VT_BTYPE
) == VT_DOUBLE
)
590 else if ((ft
& VT_BTYPE
) == VT_LDOUBLE
)
593 o(op
|(fpr(r
)<<12)|(fc
>>2)|(base
<<16));
595 } else if((ft
& (VT_BTYPE
|VT_UNSIGNED
)) == VT_BYTE
596 || (ft
& VT_BTYPE
) == VT_SHORT
) {
597 calcaddr(&base
,&fc
,&sign
,255,0);
599 if ((ft
& VT_BTYPE
) == VT_SHORT
)
601 if ((ft
& VT_UNSIGNED
) == 0)
605 o(op
|(intr(r
)<<12)|(base
<<16)|((fc
&0xf0)<<4)|(fc
&0xf));
607 calcaddr(&base
,&fc
,&sign
,4095,0);
611 if ((ft
& VT_BTYPE
) == VT_BYTE
|| (ft
& VT_BTYPE
) == VT_BOOL
)
613 o(op
|(intr(r
)<<12)|fc
|(base
<<16));
619 op
=stuff_const(0xE3A00000|(intr(r
)<<12),sv
->c
.i
);
620 if (fr
& VT_SYM
|| !op
) {
621 o(0xE59F0000|(intr(r
)<<12));
624 greloc(cur_text_section
, sv
->sym
, ind
, R_ARM_ABS32
);
629 } else if (v
== VT_LOCAL
) {
630 op
=stuff_const(0xE28B0000|(intr(r
)<<12),sv
->c
.i
);
631 if (fr
& VT_SYM
|| !op
) {
632 o(0xE59F0000|(intr(r
)<<12));
634 if(fr
& VT_SYM
) // needed ?
635 greloc(cur_text_section
, sv
->sym
, ind
, R_ARM_ABS32
);
637 o(0xE08B0000|(intr(r
)<<12)|intr(r
));
641 } else if(v
== VT_CMP
) {
642 o(mapcc(sv
->c
.i
)|0x3A00001|(intr(r
)<<12));
643 o(mapcc(negcc(sv
->c
.i
))|0x3A00000|(intr(r
)<<12));
645 } else if (v
== VT_JMP
|| v
== VT_JMPI
) {
648 o(0xE3A00000|(intr(r
)<<12)|t
);
651 o(0xE3A00000|(intr(r
)<<12)|(t
^1));
653 } else if (v
< VT_CONST
) {
656 o(0xEEB00A40|(vfpr(r
)<<12)|vfpr(v
)|T2CPR(ft
)); /* fcpyX */
658 o(0xEE008180|(fpr(r
)<<12)|fpr(v
));
661 o(0xE1A00000|(intr(r
)<<12)|intr(v
));
665 tcc_error("load unimplemented!");
668 /* store register 'r' in lvalue 'v' */
669 void store(int r
, SValue
*sv
)
672 int v
, ft
, fc
, fr
, sign
;
687 if (fr
& VT_LVAL
|| fr
== VT_LOCAL
) {
688 uint32_t base
= 0xb; /* fp */
693 } else if(v
== VT_CONST
) {
705 calcaddr(&base
,&fc
,&sign
,1020,2);
707 op
=0xED000A00; /* fsts */
710 if ((ft
& VT_BTYPE
) != VT_FLOAT
)
711 op
|=0x100; /* fsts -> fstd */
712 o(op
|(vfpr(r
)<<12)|(fc
>>2)|(base
<<16));
717 #if LDOUBLE_SIZE == 8
718 if ((ft
& VT_BTYPE
) != VT_FLOAT
)
721 if ((ft
& VT_BTYPE
) == VT_DOUBLE
)
723 if ((ft
& VT_BTYPE
) == VT_LDOUBLE
)
726 o(op
|(fpr(r
)<<12)|(fc
>>2)|(base
<<16));
729 } else if((ft
& VT_BTYPE
) == VT_SHORT
) {
730 calcaddr(&base
,&fc
,&sign
,255,0);
734 o(op
|(intr(r
)<<12)|(base
<<16)|((fc
&0xf0)<<4)|(fc
&0xf));
736 calcaddr(&base
,&fc
,&sign
,4095,0);
740 if ((ft
& VT_BTYPE
) == VT_BYTE
|| (ft
& VT_BTYPE
) == VT_BOOL
)
742 o(op
|(intr(r
)<<12)|fc
|(base
<<16));
747 tcc_error("store unimplemented");
750 static void gadd_sp(int val
)
752 stuff_const_harder(0xE28DD000,val
);
755 /* 'is_jmp' is '1' if it is a jump */
756 static void gcall_or_jmp(int is_jmp
)
759 if ((vtop
->r
& (VT_VALMASK
| VT_LVAL
)) == VT_CONST
) {
762 x
=encbranch(ind
,ind
+vtop
->c
.i
,0);
764 if (vtop
->r
& VT_SYM
) {
765 /* relocation case */
766 greloc(cur_text_section
, vtop
->sym
, ind
, R_ARM_PC24
);
768 put_elf_reloc(symtab_section
, cur_text_section
, ind
, R_ARM_PC24
, 0);
769 o(x
|(is_jmp
?0xE0000000:0xE1000000));
772 o(0xE28FE004); // add lr,pc,#4
773 o(0xE51FF004); // ldr pc,[pc,#-4]
774 if (vtop
->r
& VT_SYM
)
775 greloc(cur_text_section
, vtop
->sym
, ind
, R_ARM_ABS32
);
779 /* otherwise, indirect call */
782 o(0xE1A0E00F); // mov lr,pc
783 o(0xE1A0F000|intr(r
)); // mov pc,r
787 static int unalias_ldbl(int btype
)
789 #if LDOUBLE_SIZE == 8
790 if (btype
== VT_LDOUBLE
)
796 /* Return whether a structure is an homogeneous float aggregate or not.
797 The answer is true if all the elements of the structure are of the same
798 primitive float type and there is less than 4 elements.
800 type: the type corresponding to the structure to be tested */
801 static int is_hgen_float_aggr(CType
*type
)
803 if ((type
->t
& VT_BTYPE
) == VT_STRUCT
) {
805 int btype
, nb_fields
= 0;
807 ref
= type
->ref
->next
;
808 btype
= unalias_ldbl(ref
->type
.t
& VT_BTYPE
);
809 if (btype
== VT_FLOAT
|| btype
== VT_DOUBLE
) {
810 for(; ref
&& btype
== unalias_ldbl(ref
->type
.t
& VT_BTYPE
); ref
= ref
->next
, nb_fields
++);
811 return !ref
&& nb_fields
<= 4;
818 signed char avail
[3]; /* 3 holes max with only float and double alignments */
819 int first_hole
; /* first available hole */
820 int last_hole
; /* last available hole (none if equal to first_hole) */
821 int first_free_reg
; /* next free register in the sequence, hole excluded */
824 #define AVAIL_REGS_INITIALIZER (struct avail_regs) { { 0, 0, 0}, 0, 0, 0 }
826 /* Find suitable registers for a VFP Co-Processor Register Candidate (VFP CPRC
827 param) according to the rules described in the procedure call standard for
828 the ARM architecture (AAPCS). If found, the registers are assigned to this
829 VFP CPRC parameter. Registers are allocated in sequence unless a hole exists
830 and the parameter is a single float.
832 avregs: opaque structure to keep track of available VFP co-processor regs
833 align: alignment contraints for the param, as returned by type_size()
834 size: size of the parameter, as returned by type_size() */
835 int assign_vfpreg(struct avail_regs
*avregs
, int align
, int size
)
839 if (avregs
->first_free_reg
== -1)
841 if (align
>> 3) { /* double alignment */
842 first_reg
= avregs
->first_free_reg
;
843 /* alignment contraint not respected so use next reg and record hole */
845 avregs
->avail
[avregs
->last_hole
++] = first_reg
++;
846 } else { /* no special alignment (float or array of float) */
847 /* if single float and a hole is available, assign the param to it */
848 if (size
== 4 && avregs
->first_hole
!= avregs
->last_hole
)
849 return avregs
->avail
[avregs
->first_hole
++];
851 first_reg
= avregs
->first_free_reg
;
853 if (first_reg
+ size
/ 4 <= 16) {
854 avregs
->first_free_reg
= first_reg
+ size
/ 4;
857 avregs
->first_free_reg
= -1;
861 /* Returns whether all params need to be passed in core registers or not.
862 This is the case for function part of the runtime ABI. */
863 int floats_in_core_regs(SValue
*sval
)
868 switch (sval
->sym
->v
) {
869 case TOK___floatundisf
:
870 case TOK___floatundidf
:
871 case TOK___fixunssfdi
:
872 case TOK___fixunsdfdi
:
874 case TOK___fixunsxfdi
:
876 case TOK___floatdisf
:
877 case TOK___floatdidf
:
887 /* Return the number of registers needed to return the struct, or 0 if
888 returning via struct pointer. */
889 ST_FUNC
int gfunc_sret(CType
*vt
, int variadic
, CType
*ret
, int *ret_align
, int *regsize
) {
892 size
= type_size(vt
, &align
);
893 if (float_abi
== ARM_HARD_FLOAT
&& !variadic
&&
894 (is_float(vt
->t
) || is_hgen_float_aggr(vt
))) {
899 return (size
+ 7) >> 3;
900 } else if (size
<= 4) {
913 /* Parameters are classified according to how they are copied to their final
914 destination for the function call. Because the copying is performed class
915 after class according to the order in the union below, it is important that
916 some constraints about the order of the members of this union are respected:
917 - CORE_STRUCT_CLASS must come after STACK_CLASS;
918 - CORE_CLASS must come after STACK_CLASS, CORE_STRUCT_CLASS and
920 - VFP_STRUCT_CLASS must come after VFP_CLASS.
921 See the comment for the main loop in copy_params() for the reason. */
932 int start
; /* first reg or addr used depending on the class */
933 int end
; /* last reg used or next free addr depending on the class */
934 SValue
*sval
; /* pointer to SValue on the value stack */
935 struct param_plan
*prev
; /* previous element in this class */
939 struct param_plan
*pplans
; /* array of all the param plans */
940 struct param_plan
*clsplans
[NB_CLASSES
]; /* per class lists of param plans */
943 #define add_param_plan(plan,pplan,class) \
945 pplan.prev = plan->clsplans[class]; \
946 plan->pplans[plan ## _nb] = pplan; \
947 plan->clsplans[class] = &plan->pplans[plan ## _nb++]; \
950 /* Assign parameters to registers and stack with alignment according to the
951 rules in the procedure call standard for the ARM architecture (AAPCS).
952 The overall assignment is recorded in an array of per parameter structures
953 called parameter plans. The parameter plans are also further organized in a
954 number of linked lists, one per class of parameter (see the comment for the
955 definition of union reg_class).
957 nb_args: number of parameters of the function for which a call is generated
958 float_abi: float ABI in use for this function call
959 plan: the structure where the overall assignment is recorded
960 todo: a bitmap that record which core registers hold a parameter
962 Returns the amount of stack space needed for parameter passing
964 Note: this function allocated an array in plan->pplans with tcc_malloc. It
965 is the responsibility of the caller to free this array once used (ie not
966 before copy_params). */
967 static int assign_regs(int nb_args
, int float_abi
, struct plan
*plan
, int *todo
)
970 int ncrn
/* next core register number */, nsaa
/* next stacked argument address*/;
972 struct param_plan pplan
;
973 struct avail_regs avregs
= AVAIL_REGS_INITIALIZER
;
977 plan
->pplans
= tcc_malloc(nb_args
* sizeof(*plan
->pplans
));
978 memset(plan
->clsplans
, 0, sizeof(plan
->clsplans
));
979 for(i
= nb_args
; i
-- ;) {
980 int j
, start_vfpreg
= 0;
981 CType type
= vtop
[-i
].type
;
983 size
= type_size(&type
, &align
);
984 size
= (size
+ 3) & ~3;
985 align
= (align
+ 3) & ~3;
986 switch(vtop
[-i
].type
.t
& VT_BTYPE
) {
991 if (float_abi
== ARM_HARD_FLOAT
) {
992 int is_hfa
= 0; /* Homogeneous float aggregate */
994 if (is_float(vtop
[-i
].type
.t
)
995 || (is_hfa
= is_hgen_float_aggr(&vtop
[-i
].type
))) {
998 start_vfpreg
= assign_vfpreg(&avregs
, align
, size
);
999 end_vfpreg
= start_vfpreg
+ ((size
- 1) >> 2);
1000 if (start_vfpreg
>= 0) {
1001 pplan
= (struct param_plan
) {start_vfpreg
, end_vfpreg
, &vtop
[-i
]};
1003 add_param_plan(plan
, pplan
, VFP_STRUCT_CLASS
);
1005 add_param_plan(plan
, pplan
, VFP_CLASS
);
1011 ncrn
= (ncrn
+ (align
-1)/4) & ~((align
/4) - 1);
1012 if (ncrn
+ size
/4 <= 4 || (ncrn
< 4 && start_vfpreg
!= -1)) {
1013 /* The parameter is allocated both in core register and on stack. As
1014 * such, it can be of either class: it would either be the last of
1015 * CORE_STRUCT_CLASS or the first of STACK_CLASS. */
1016 for (j
= ncrn
; j
< 4 && j
< ncrn
+ size
/ 4; j
++)
1018 pplan
= (struct param_plan
) {ncrn
, j
, &vtop
[-i
]};
1019 add_param_plan(plan
, pplan
, CORE_STRUCT_CLASS
);
1022 nsaa
= (ncrn
- 4) * 4;
1030 int is_long
= (vtop
[-i
].type
.t
& VT_BTYPE
) == VT_LLONG
;
1033 ncrn
= (ncrn
+ 1) & -2;
1037 pplan
= (struct param_plan
) {ncrn
, ncrn
, &vtop
[-i
]};
1041 add_param_plan(plan
, pplan
, CORE_CLASS
);
1045 nsaa
= (nsaa
+ (align
- 1)) & ~(align
- 1);
1046 pplan
= (struct param_plan
) {nsaa
, nsaa
+ size
, &vtop
[-i
]};
1047 add_param_plan(plan
, pplan
, STACK_CLASS
);
1048 nsaa
+= size
; /* size already rounded up before */
1053 #undef add_param_plan
1055 /* Copy parameters to their final destination (core reg, VFP reg or stack) for
1058 nb_args: number of parameters the function take
1059 plan: the overall assignment plan for parameters
1060 todo: a bitmap indicating what core reg will hold a parameter
1062 Returns the number of SValue added by this function on the value stack */
1063 static int copy_params(int nb_args
, struct plan
*plan
, int todo
)
1065 int size
, align
, r
, i
, nb_extra_sval
= 0;
1066 struct param_plan
*pplan
;
1069 /* Several constraints require parameters to be copied in a specific order:
1070 - structures are copied to the stack before being loaded in a reg;
1071 - floats loaded to an odd numbered VFP reg are first copied to the
1072 preceding even numbered VFP reg and then moved to the next VFP reg.
1074 It is thus important that:
1075 - structures assigned to core regs must be copied after parameters
1076 assigned to the stack but before structures assigned to VFP regs because
1077 a structure can lie partly in core registers and partly on the stack;
1078 - parameters assigned to the stack and all structures be copied before
1079 parameters assigned to a core reg since copying a parameter to the stack
1080 require using a core reg;
1081 - parameters assigned to VFP regs be copied before structures assigned to
1082 VFP regs as the copy might use an even numbered VFP reg that already
1083 holds part of a structure. */
1085 for(i
= 0; i
< NB_CLASSES
; i
++) {
1086 for(pplan
= plan
->clsplans
[i
]; pplan
; pplan
= pplan
->prev
) {
1089 && (i
!= CORE_CLASS
|| pplan
->sval
->r
< VT_CONST
))
1092 vpushv(pplan
->sval
);
1093 pplan
->sval
->r
= pplan
->sval
->r2
= VT_CONST
; /* disable entry */
1096 case CORE_STRUCT_CLASS
:
1097 case VFP_STRUCT_CLASS
:
1098 if ((pplan
->sval
->type
.t
& VT_BTYPE
) == VT_STRUCT
) {
1100 size
= type_size(&pplan
->sval
->type
, &align
);
1101 /* align to stack align size */
1102 size
= (size
+ 3) & ~3;
1103 if (i
== STACK_CLASS
&& pplan
->prev
)
1104 padding
= pplan
->start
- pplan
->prev
->end
;
1105 size
+= padding
; /* Add padding if any */
1106 /* allocate the necessary size on stack */
1108 /* generate structure store */
1109 r
= get_reg(RC_INT
);
1110 o(0xE28D0000|(intr(r
)<<12)|padding
); /* add r, sp, padding */
1111 vset(&vtop
->type
, r
| VT_LVAL
, 0);
1113 vstore(); /* memcpy to current sp + potential padding */
1115 /* Homogeneous float aggregate are loaded to VFP registers
1116 immediately since there is no way of loading data in multiple
1117 non consecutive VFP registers as what is done for other
1118 structures (see the use of todo). */
1119 if (i
== VFP_STRUCT_CLASS
) {
1120 int first
= pplan
->start
, nb
= pplan
->end
- first
+ 1;
1121 /* vpop.32 {pplan->start, ..., pplan->end} */
1122 o(0xECBD0A00|(first
&1)<<22|(first
>>1)<<12|nb
);
1123 /* No need to write the register used to a SValue since VFP regs
1124 cannot be used for gcall_or_jmp */
1127 if (is_float(pplan
->sval
->type
.t
)) {
1129 r
= vfpr(gv(RC_FLOAT
)) << 12;
1130 if ((pplan
->sval
->type
.t
& VT_BTYPE
) == VT_FLOAT
)
1134 r
|= 0x101; /* vpush.32 -> vpush.64 */
1136 o(0xED2D0A01 + r
); /* vpush */
1138 r
= fpr(gv(RC_FLOAT
)) << 12;
1139 if ((pplan
->sval
->type
.t
& VT_BTYPE
) == VT_FLOAT
)
1141 else if ((pplan
->sval
->type
.t
& VT_BTYPE
) == VT_DOUBLE
)
1144 size
= LDOUBLE_SIZE
;
1151 o(0xED2D0100|r
|(size
>>2)); /* some kind of vpush for FPA */
1154 /* simple type (currently always same size) */
1155 /* XXX: implicit cast ? */
1157 if ((pplan
->sval
->type
.t
& VT_BTYPE
) == VT_LLONG
) {
1161 o(0xE52D0004|(intr(r
)<<12)); /* push r */
1165 o(0xE52D0004|(intr(r
)<<12)); /* push r */
1167 if (i
== STACK_CLASS
&& pplan
->prev
)
1168 gadd_sp(pplan
->prev
->end
- pplan
->start
); /* Add padding if any */
1173 gv(regmask(TREG_F0
+ (pplan
->start
>> 1)));
1174 if (pplan
->start
& 1) { /* Must be in upper part of double register */
1175 o(0xEEF00A40|((pplan
->start
>>1)<<12)|(pplan
->start
>>1)); /* vmov.f32 s(n+1), sn */
1176 vtop
->r
= VT_CONST
; /* avoid being saved on stack by gv for next float */
1181 if ((pplan
->sval
->type
.t
& VT_BTYPE
) == VT_LLONG
) {
1183 gv(regmask(pplan
->end
));
1184 pplan
->sval
->r2
= vtop
->r
;
1187 gv(regmask(pplan
->start
));
1188 /* Mark register as used so that gcall_or_jmp use another one
1189 (regs >=4 are free as never used to pass parameters) */
1190 pplan
->sval
->r
= vtop
->r
;
1197 /* second pass to restore registers that were saved on stack by accident.
1198 Maybe redundant after the "lvalue_save" patch in tccgen.c:gv() */
1202 /* Manually free remaining registers since next parameters are loaded
1203 * manually, without the help of gv(int). */
1207 o(0xE8BD0000|todo
); /* pop {todo} */
1208 for(pplan
= plan
->clsplans
[CORE_STRUCT_CLASS
]; pplan
; pplan
= pplan
->prev
) {
1210 pplan
->sval
->r
= pplan
->start
;
1211 /* An SValue can only pin 2 registers at best (r and r2) but a structure
1212 can occupy more than 2 registers. Thus, we need to push on the value
1213 stack some fake parameter to have on SValue for each registers used
1214 by a structure (r2 is not used). */
1215 for (r
= pplan
->start
+ 1; r
<= pplan
->end
; r
++) {
1216 if (todo
& (1 << r
)) {
1224 return nb_extra_sval
;
1227 /* Generate function call. The function address is pushed first, then
1228 all the parameters in call order. This functions pops all the
1229 parameters and the function address. */
1230 void gfunc_call(int nb_args
)
1233 int def_float_abi
= float_abi
;
1240 if (float_abi
== ARM_HARD_FLOAT
) {
1241 variadic
= (vtop
[-nb_args
].type
.ref
->c
== FUNC_ELLIPSIS
);
1242 if (variadic
|| floats_in_core_regs(&vtop
[-nb_args
]))
1243 float_abi
= ARM_SOFTFP_FLOAT
;
1246 /* cannot let cpu flags if other instruction are generated. Also avoid leaving
1247 VT_JMP anywhere except on the top of the stack because it would complicate
1248 the code generator. */
1249 r
= vtop
->r
& VT_VALMASK
;
1250 if (r
== VT_CMP
|| (r
& ~1) == VT_JMP
)
1253 args_size
= assign_regs(nb_args
, float_abi
, &plan
, &todo
);
1256 if (args_size
& 7) { /* Stack must be 8 byte aligned at fct call for EABI */
1257 args_size
= (args_size
+ 7) & ~7;
1258 o(0xE24DD004); /* sub sp, sp, #4 */
1262 nb_args
+= copy_params(nb_args
, &plan
, todo
);
1263 tcc_free(plan
.pplans
);
1265 /* Move fct SValue on top as required by gcall_or_jmp */
1269 gadd_sp(args_size
); /* pop all parameters passed on the stack */
1270 #if defined(TCC_ARM_EABI) && defined(TCC_ARM_VFP)
1271 if(float_abi
== ARM_SOFTFP_FLOAT
&& is_float(vtop
->type
.ref
->type
.t
)) {
1272 if((vtop
->type
.ref
->type
.t
& VT_BTYPE
) == VT_FLOAT
) {
1273 o(0xEE000A10); /*vmov s0, r0 */
1275 o(0xEE000B10); /* vmov.32 d0[0], r0 */
1276 o(0xEE201B10); /* vmov.32 d0[1], r1 */
1280 vtop
-= nb_args
+ 1; /* Pop all params and fct address from value stack */
1281 leaffunc
= 0; /* we are calling a function, so we aren't in a leaf function */
1282 float_abi
= def_float_abi
;
1285 /* generate function prolog of type 't' */
1286 void gfunc_prolog(CType
*func_type
)
1289 int n
, nf
, size
, align
, rs
, struct_ret
= 0;
1290 int addr
, pn
, sn
; /* pn=core, sn=stack */
1294 struct avail_regs avregs
= AVAIL_REGS_INITIALIZER
;
1297 sym
= func_type
->ref
;
1298 func_vt
= sym
->type
;
1299 func_var
= (func_type
->ref
->c
== FUNC_ELLIPSIS
);
1302 if ((func_vt
.t
& VT_BTYPE
) == VT_STRUCT
&&
1303 !gfunc_sret(&func_vt
, func_var
, &ret_type
, &align
, &rs
))
1307 func_vc
= 12; /* Offset from fp of the place to store the result */
1309 for(sym2
= sym
->next
; sym2
&& (n
< 4 || nf
< 16); sym2
= sym2
->next
) {
1310 size
= type_size(&sym2
->type
, &align
);
1312 if (float_abi
== ARM_HARD_FLOAT
&& !func_var
&&
1313 (is_float(sym2
->type
.t
) || is_hgen_float_aggr(&sym2
->type
))) {
1314 int tmpnf
= assign_vfpreg(&avregs
, align
, size
);
1315 tmpnf
+= (size
+ 3) / 4;
1316 nf
= (tmpnf
> nf
) ? tmpnf
: nf
;
1320 n
+= (size
+ 3) / 4;
1322 o(0xE1A0C00D); /* mov ip,sp */
1331 o(0xE92D0000|((1<<n
)-1)); /* save r0-r4 on stack if needed */
1336 nf
=(nf
+1)&-2; /* nf => HARDFLOAT => EABI */
1337 o(0xED2D0A00|nf
); /* save s0-s15 on stack if needed */
1339 o(0xE92D5800); /* save fp, ip, lr */
1340 o(0xE1A0B00D); /* mov fp, sp */
1341 func_sub_sp_offset
= ind
;
1342 o(0xE1A00000); /* nop, leave space for stack adjustment in epilog */
1345 if (float_abi
== ARM_HARD_FLOAT
) {
1347 avregs
= AVAIL_REGS_INITIALIZER
;
1350 pn
= struct_ret
, sn
= 0;
1351 while ((sym
= sym
->next
)) {
1354 size
= type_size(type
, &align
);
1355 size
= (size
+ 3) >> 2;
1356 align
= (align
+ 3) & ~3;
1358 if (float_abi
== ARM_HARD_FLOAT
&& !func_var
&& (is_float(sym
->type
.t
)
1359 || is_hgen_float_aggr(&sym
->type
))) {
1360 int fpn
= assign_vfpreg(&avregs
, align
, size
<< 2);
1369 pn
= (pn
+ (align
-1)/4) & -(align
/4);
1371 addr
= (nf
+ pn
) * 4;
1378 sn
= (sn
+ (align
-1)/4) & -(align
/4);
1380 addr
= (n
+ nf
+ sn
) * 4;
1383 sym_push(sym
->v
& ~SYM_FIELD
, type
, VT_LOCAL
| lvalue_type(type
->t
),
1391 /* generate function epilog */
1392 void gfunc_epilog(void)
1396 /* Copy float return value to core register if base standard is used and
1397 float computation is made with VFP */
1398 #if defined(TCC_ARM_EABI) && defined(TCC_ARM_VFP)
1399 if ((float_abi
== ARM_SOFTFP_FLOAT
|| func_var
) && is_float(func_vt
.t
)) {
1400 if((func_vt
.t
& VT_BTYPE
) == VT_FLOAT
)
1401 o(0xEE100A10); /* fmrs r0, s0 */
1403 o(0xEE100B10); /* fmrdl r0, d0 */
1404 o(0xEE301B10); /* fmrdh r1, d0 */
1408 o(0xE89BA800); /* restore fp, sp, pc */
1409 diff
= (-loc
+ 3) & -4;
1412 diff
= ((diff
+ 11) & -8) - 4;
1415 x
=stuff_const(0xE24BD000, diff
); /* sub sp,fp,# */
1417 *(uint32_t *)(cur_text_section
->data
+ func_sub_sp_offset
) = x
;
1421 o(0xE59FC004); /* ldr ip,[pc+4] */
1422 o(0xE04BD00C); /* sub sp,fp,ip */
1423 o(0xE1A0F00E); /* mov pc,lr */
1425 *(uint32_t *)(cur_text_section
->data
+ func_sub_sp_offset
) = 0xE1000000|encbranch(func_sub_sp_offset
,addr
,1);
1430 /* generate a jump to a label */
1435 o(0xE0000000|encbranch(r
,t
,1));
1439 /* generate a jump to a fixed address */
1440 void gjmp_addr(int a
)
1445 /* generate a test. set 'inv' to invert test. Stack entry is popped */
1446 int gtst(int inv
, int t
)
1450 v
= vtop
->r
& VT_VALMASK
;
1453 op
=mapcc(inv
?negcc(vtop
->c
.i
):vtop
->c
.i
);
1454 op
|=encbranch(r
,t
,1);
1457 } else if (v
== VT_JMP
|| v
== VT_JMPI
) {
1458 if ((v
& 1) == inv
) {
1467 p
= decbranch(lp
=p
);
1469 x
= (uint32_t *)(cur_text_section
->data
+ lp
);
1471 *x
|= encbranch(lp
,t
,1);
1484 /* generate an integer binary operation */
1485 void gen_opi(int op
)
1488 uint32_t opc
= 0, r
, fr
;
1489 unsigned short retreg
= REG_IRET
;
1497 case TOK_ADDC1
: /* add with carry generation */
1505 case TOK_SUBC1
: /* sub with carry generation */
1509 case TOK_ADDC2
: /* add with carry use */
1513 case TOK_SUBC2
: /* sub with carry use */
1530 gv2(RC_INT
, RC_INT
);
1534 o(0xE0000090|(intr(r
)<<16)|(intr(r
)<<8)|intr(fr
));
1559 func
=TOK___aeabi_idivmod
;
1568 func
=TOK___aeabi_uidivmod
;
1576 gv2(RC_INT
, RC_INT
);
1577 r
=intr(vtop
[-1].r2
=get_reg(RC_INT
));
1579 vtop
[-1].r
=get_reg_ex(RC_INT
,regmask(c
));
1581 o(0xE0800090|(r
<<16)|(intr(vtop
->r
)<<12)|(intr(c
)<<8)|intr(vtop
[1].r
));
1590 if((vtop
[-1].r
& (VT_VALMASK
| VT_LVAL
| VT_SYM
)) == VT_CONST
) {
1591 if(opc
== 4 || opc
== 5 || opc
== 0xc) {
1593 opc
|=2; // sub -> rsb
1596 if ((vtop
->r
& VT_VALMASK
) == VT_CMP
||
1597 (vtop
->r
& (VT_VALMASK
& ~1)) == VT_JMP
)
1602 opc
=0xE0000000|(opc
<<20)|(c
<<16);
1603 if((vtop
->r
& (VT_VALMASK
| VT_LVAL
| VT_SYM
)) == VT_CONST
) {
1605 x
=stuff_const(opc
|0x2000000,vtop
->c
.i
);
1607 r
=intr(vtop
[-1].r
=get_reg_ex(RC_INT
,regmask(vtop
[-1].r
)));
1612 fr
=intr(gv(RC_INT
));
1613 r
=intr(vtop
[-1].r
=get_reg_ex(RC_INT
,two2mask(vtop
->r
,vtop
[-1].r
)));
1617 if (op
>= TOK_ULT
&& op
<= TOK_GT
) {
1623 opc
=0xE1A00000|(opc
<<5);
1624 if ((vtop
->r
& VT_VALMASK
) == VT_CMP
||
1625 (vtop
->r
& (VT_VALMASK
& ~1)) == VT_JMP
)
1631 if ((vtop
->r
& (VT_VALMASK
| VT_LVAL
| VT_SYM
)) == VT_CONST
) {
1632 fr
=intr(vtop
[-1].r
=get_reg_ex(RC_INT
,regmask(vtop
[-1].r
)));
1633 c
= vtop
->c
.i
& 0x1f;
1634 o(opc
|(c
<<7)|(fr
<<12));
1636 fr
=intr(gv(RC_INT
));
1637 c
=intr(vtop
[-1].r
=get_reg_ex(RC_INT
,two2mask(vtop
->r
,vtop
[-1].r
)));
1638 o(opc
|(c
<<12)|(fr
<<8)|0x10);
1643 vpush_global_sym(&func_old_type
, func
);
1650 tcc_error("gen_opi %i unimplemented!",op
);
1655 static int is_zero(int i
)
1657 if((vtop
[i
].r
& (VT_VALMASK
| VT_LVAL
| VT_SYM
)) != VT_CONST
)
1659 if (vtop
[i
].type
.t
== VT_FLOAT
)
1660 return (vtop
[i
].c
.f
== 0.f
);
1661 else if (vtop
[i
].type
.t
== VT_DOUBLE
)
1662 return (vtop
[i
].c
.d
== 0.0);
1663 return (vtop
[i
].c
.ld
== 0.l
);
1666 /* generate a floating point operation 'v = t1 op t2' instruction. The
1667 * two operands are guaranted to have the same floating point type */
1668 void gen_opf(int op
)
1672 x
=0xEE000A00|T2CPR(vtop
->type
.t
);
1690 x
|=0x810000; /* fsubX -> fnegX */
1703 if(op
< TOK_ULT
|| op
> TOK_GT
) {
1704 tcc_error("unknown fp op %x!",op
);
1710 case TOK_LT
: op
=TOK_GT
; break;
1711 case TOK_GE
: op
=TOK_ULE
; break;
1712 case TOK_LE
: op
=TOK_GE
; break;
1713 case TOK_GT
: op
=TOK_ULT
; break;
1716 x
|=0xB40040; /* fcmpX */
1717 if(op
!=TOK_EQ
&& op
!=TOK_NE
)
1718 x
|=0x80; /* fcmpX -> fcmpeX */
1721 o(x
|0x10000|(vfpr(gv(RC_FLOAT
))<<12)); /* fcmp(e)X -> fcmp(e)zX */
1723 x
|=vfpr(gv(RC_FLOAT
));
1725 o(x
|(vfpr(gv(RC_FLOAT
))<<12));
1728 o(0xEEF1FA10); /* fmstat */
1731 case TOK_LE
: op
=TOK_ULE
; break;
1732 case TOK_LT
: op
=TOK_ULT
; break;
1733 case TOK_UGE
: op
=TOK_GE
; break;
1734 case TOK_UGT
: op
=TOK_GT
; break;
1751 vtop
->r
=get_reg_ex(RC_FLOAT
,r
);
1754 o(x
|(vfpr(vtop
->r
)<<12));
1758 static uint32_t is_fconst()
1762 if((vtop
->r
& (VT_VALMASK
| VT_LVAL
| VT_SYM
)) != VT_CONST
)
1764 if (vtop
->type
.t
== VT_FLOAT
)
1766 else if (vtop
->type
.t
== VT_DOUBLE
)
1796 /* generate a floating point operation 'v = t1 op t2' instruction. The
1797 two operands are guaranted to have the same floating point type */
1798 void gen_opf(int op
)
1800 uint32_t x
, r
, r2
, c1
, c2
;
1801 //fputs("gen_opf\n",stderr);
1807 #if LDOUBLE_SIZE == 8
1808 if ((vtop
->type
.t
& VT_BTYPE
) != VT_FLOAT
)
1811 if ((vtop
->type
.t
& VT_BTYPE
) == VT_DOUBLE
)
1813 else if ((vtop
->type
.t
& VT_BTYPE
) == VT_LDOUBLE
)
1824 r
=fpr(gv(RC_FLOAT
));
1831 r2
=fpr(gv(RC_FLOAT
));
1840 r
=fpr(gv(RC_FLOAT
));
1842 } else if(c1
&& c1
<=0xf) {
1845 r
=fpr(gv(RC_FLOAT
));
1850 r
=fpr(gv(RC_FLOAT
));
1852 r2
=fpr(gv(RC_FLOAT
));
1861 r
=fpr(gv(RC_FLOAT
));
1866 r2
=fpr(gv(RC_FLOAT
));
1874 r
=fpr(gv(RC_FLOAT
));
1876 } else if(c1
&& c1
<=0xf) {
1879 r
=fpr(gv(RC_FLOAT
));
1884 r
=fpr(gv(RC_FLOAT
));
1886 r2
=fpr(gv(RC_FLOAT
));
1890 if(op
>= TOK_ULT
&& op
<= TOK_GT
) {
1891 x
|=0xd0f110; // cmfe
1892 /* bug (intention?) in Linux FPU emulator
1893 doesn't set carry if equal */
1899 tcc_error("unsigned comparison on floats?");
1905 op
=TOK_ULE
; /* correct in unordered case only if AC bit in FPSR set */
1909 x
&=~0x400000; // cmfe -> cmf
1931 r
=fpr(gv(RC_FLOAT
));
1938 r2
=fpr(gv(RC_FLOAT
));
1940 vtop
[-1].r
= VT_CMP
;
1943 tcc_error("unknown fp op %x!",op
);
1947 if(vtop
[-1].r
== VT_CMP
)
1953 vtop
[-1].r
=get_reg_ex(RC_FLOAT
,two2mask(vtop
[-1].r
,c1
));
1957 o(x
|(r
<<16)|(c1
<<12)|r2
);
1961 /* convert integers to fp 't' type. Must handle 'int', 'unsigned int'
1962 and 'long long' cases. */
1963 ST_FUNC
void gen_cvt_itof1(int t
)
1967 bt
=vtop
->type
.t
& VT_BTYPE
;
1968 if(bt
== VT_INT
|| bt
== VT_SHORT
|| bt
== VT_BYTE
) {
1974 r2
=vfpr(vtop
->r
=get_reg(RC_FLOAT
));
1975 o(0xEE000A10|(r
<<12)|(r2
<<16)); /* fmsr */
1977 if(!(vtop
->type
.t
& VT_UNSIGNED
))
1978 r2
|=0x80; /* fuitoX -> fsituX */
1979 o(0xEEB80A40|r2
|T2CPR(t
)); /* fYitoX*/
1981 r2
=fpr(vtop
->r
=get_reg(RC_FLOAT
));
1982 if((t
& VT_BTYPE
) != VT_FLOAT
)
1983 dsize
=0x80; /* flts -> fltd */
1984 o(0xEE000110|dsize
|(r2
<<16)|(r
<<12)); /* flts */
1985 if((vtop
->type
.t
& (VT_UNSIGNED
|VT_BTYPE
)) == (VT_UNSIGNED
|VT_INT
)) {
1987 o(0xE3500000|(r
<<12)); /* cmp */
1988 r
=fpr(get_reg(RC_FLOAT
));
1989 if(last_itod_magic
) {
1990 off
=ind
+8-last_itod_magic
;
1995 o(0xBD1F0100|(r
<<12)|off
); /* ldflts */
1997 o(0xEA000000); /* b */
1998 last_itod_magic
=ind
;
1999 o(0x4F800000); /* 4294967296.0f */
2001 o(0xBE000100|dsize
|(r2
<<16)|(r2
<<12)|r
); /* adflt */
2005 } else if(bt
== VT_LLONG
) {
2007 CType
*func_type
= 0;
2008 if((t
& VT_BTYPE
) == VT_FLOAT
) {
2009 func_type
= &func_float_type
;
2010 if(vtop
->type
.t
& VT_UNSIGNED
)
2011 func
=TOK___floatundisf
;
2013 func
=TOK___floatdisf
;
2014 #if LDOUBLE_SIZE != 8
2015 } else if((t
& VT_BTYPE
) == VT_LDOUBLE
) {
2016 func_type
= &func_ldouble_type
;
2017 if(vtop
->type
.t
& VT_UNSIGNED
)
2018 func
=TOK___floatundixf
;
2020 func
=TOK___floatdixf
;
2021 } else if((t
& VT_BTYPE
) == VT_DOUBLE
) {
2023 } else if((t
& VT_BTYPE
) == VT_DOUBLE
|| (t
& VT_BTYPE
) == VT_LDOUBLE
) {
2025 func_type
= &func_double_type
;
2026 if(vtop
->type
.t
& VT_UNSIGNED
)
2027 func
=TOK___floatundidf
;
2029 func
=TOK___floatdidf
;
2032 vpush_global_sym(func_type
, func
);
2040 tcc_error("unimplemented gen_cvt_itof %x!",vtop
->type
.t
);
2043 /* convert fp to int 't' type */
2044 void gen_cvt_ftoi(int t
)
2050 r2
=vtop
->type
.t
& VT_BTYPE
;
2053 r
=vfpr(gv(RC_FLOAT
));
2055 o(0xEEBC0AC0|(r
<<12)|r
|T2CPR(r2
)|u
); /* ftoXizY */
2056 r2
=intr(vtop
->r
=get_reg(RC_INT
));
2057 o(0xEE100A10|(r
<<16)|(r2
<<12));
2062 func
=TOK___fixunssfsi
;
2063 #if LDOUBLE_SIZE != 8
2064 else if(r2
== VT_LDOUBLE
)
2065 func
=TOK___fixunsxfsi
;
2066 else if(r2
== VT_DOUBLE
)
2068 else if(r2
== VT_LDOUBLE
|| r2
== VT_DOUBLE
)
2070 func
=TOK___fixunsdfsi
;
2072 r
=fpr(gv(RC_FLOAT
));
2073 r2
=intr(vtop
->r
=get_reg(RC_INT
));
2074 o(0xEE100170|(r2
<<12)|r
);
2078 } else if(t
== VT_LLONG
) { // unsigned handled in gen_cvt_ftoi1
2081 #if LDOUBLE_SIZE != 8
2082 else if(r2
== VT_LDOUBLE
)
2084 else if(r2
== VT_DOUBLE
)
2086 else if(r2
== VT_LDOUBLE
|| r2
== VT_DOUBLE
)
2091 vpush_global_sym(&func_old_type
, func
);
2096 vtop
->r2
= REG_LRET
;
2100 tcc_error("unimplemented gen_cvt_ftoi!");
2103 /* convert from one floating point type to another */
2104 void gen_cvt_ftof(int t
)
2107 if(((vtop
->type
.t
& VT_BTYPE
) == VT_FLOAT
) != ((t
& VT_BTYPE
) == VT_FLOAT
)) {
2108 uint32_t r
= vfpr(gv(RC_FLOAT
));
2109 o(0xEEB70AC0|(r
<<12)|r
|T2CPR(vtop
->type
.t
));
2112 /* all we have to do on i386 and FPA ARM is to put the float in a register */
2117 /* computed goto support */
2124 /* Save the stack pointer onto the stack and return the location of its address */
2125 ST_FUNC
void gen_vla_sp_save(int addr
) {
2128 v
.r
= VT_LOCAL
| VT_LVAL
;
2133 /* Restore the SP from a location on the stack */
2134 ST_FUNC
void gen_vla_sp_restore(int addr
) {
2137 v
.r
= VT_LOCAL
| VT_LVAL
;
2142 /* Subtract from the stack pointer, and push the resulting value onto the stack */
2143 ST_FUNC
void gen_vla_alloc(CType
*type
, int align
) {
2144 int r
= intr(gv(RC_INT
));
2145 o(0xE04D0000|(r
<<12)|r
); /* sub r, sp, r */
2153 if (align
& (align
- 1))
2154 tcc_error("alignment is not a power of 2: %i", align
);
2155 o(stuff_const(0xE3C0D000|(r
<<16), align
- 1)); /* bic sp, r, #align-1 */
2159 /* end of ARM code generator */
2160 /*************************************************************/
2162 /*************************************************************/