?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
Most x86-64 tests now work; only on error in test1-3.
[tinycc.git] / x86_64-gen.c
blob1c95b4aafcf46ef7c45c258314281a16da330388
1 /*
2 * x86-64 code generator for TCC
3 *
4 * Copyright (c) 2008 Shinichiro Hamaji
5 *
6 * Based on i386-gen.c by Fabrice Bellard
7 *
8 * This library is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU Lesser General Public
10 * License as published by the Free Software Foundation; either
11 * version 2 of the License, or (at your option) any later version.
12 *
13 * This library is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * Lesser General Public License for more details.
17 *
18 * You should have received a copy of the GNU Lesser General Public
19 * License along with this library; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 */
22
23 #ifdef TARGET_DEFS_ONLY
24
25 /* number of available registers */
26 #define NB_REGS 6
27 #define NB_ASM_REGS 8
28
29 /* a register can belong to several classes. The classes must be
30 sorted from more general to more precise (see gv2() code which does
31 assumptions on it). */
32 #define RC_INT 0x0001 /* generic integer register */
33 #define RC_FLOAT 0x0002 /* generic float register */
34 #define RC_RAX 0x0004
35 #define RC_RCX 0x0008
36 #define RC_RDX 0x0010
37 #define RC_R8 0x0100
38 #define RC_R9 0x0200
39 #define RC_R10 0x0400
40 #define RC_R11 0x0800
41 #define RC_XMM0 0x0020
42 #define RC_XMM1 0x0040
43 #define RC_ST0 0x0080 /* only for long double */
44 #define RC_IRET RC_RAX /* function return: integer register */
45 #define RC_LRET RC_RDX /* function return: second integer register */
46 #define RC_FRET RC_XMM0 /* function return: float register */
47 #define RC_QRET RC_XMM1 /* function return: second float register */
48
49 /* pretty names for the registers */
50 enum {
51 TREG_RAX = 0,
52 TREG_RCX = 1,
53 TREG_RDX = 2,
54 TREG_XMM0 = 3,
55 TREG_XMM1 = 4,
56 TREG_ST0 = 5,
57
58 TREG_RSI = 6,
59 TREG_RDI = 7,
60 TREG_R8 = 8,
61 TREG_R9 = 9,
62
63 TREG_R10 = 10,
64 TREG_R11 = 11,
65
66 TREG_MEM = 0x10,
67 };
68
69 #define REX_BASE(reg) (((reg) >> 3) & 1)
70 #define REG_VALUE(reg) ((reg) & 7)
71
72 /* return registers for function */
73 #define REG_IRET TREG_RAX /* single word int return register */
74 #define REG_LRET TREG_RDX /* second word return register (for long long) */
75 #define REG_FRET TREG_XMM0 /* float return register */
76 #define REG_QRET TREG_XMM1 /* second float return register */
77
78 /* defined if function parameters must be evaluated in reverse order */
79 #define INVERT_FUNC_PARAMS
80
81 /* pointer size, in bytes */
82 #define PTR_SIZE 8
83
84 /* long double size and alignment, in bytes */
85 #define LDOUBLE_SIZE 16
86 #define LDOUBLE_ALIGN 8
87 /* maximum alignment (for aligned attribute support) */
88 #define MAX_ALIGN 8
89
90 /******************************************************/
91 /* ELF defines */
92
93 #define EM_TCC_TARGET EM_X86_64
94
95 /* relocation type for 32 bit data relocation */
96 #define R_DATA_32 R_X86_64_32
97 #define R_DATA_PTR R_X86_64_64
98 #define R_JMP_SLOT R_X86_64_JUMP_SLOT
99 #define R_COPY R_X86_64_COPY
100
101 #define ELF_START_ADDR 0x08048000
102 #define ELF_PAGE_SIZE 0x1000
103
104 /******************************************************/
105 #else /* ! TARGET_DEFS_ONLY */
106 /******************************************************/
107 #include "tcc.h"
108 #include <assert.h>
109
110 ST_DATA const int reg_classes[NB_REGS+7] = {
111 /* eax */ RC_INT | RC_RAX,
112 /* ecx */ RC_INT | RC_RCX,
113 /* edx */ RC_INT | RC_RDX,
114 /* xmm0 */ RC_FLOAT | RC_XMM0,
115 /* xmm1 */ RC_FLOAT | RC_XMM1,
116 /* st0 */ RC_ST0,
117 0,
118 0,
119 0,
120 RC_INT | RC_R8,
121 RC_INT | RC_R9,
122 RC_INT | RC_R10,
123 RC_INT | RC_R11
124 };
125
126 static unsigned long func_sub_sp_offset;
127 static int func_ret_sub;
128
129 /* XXX: make it faster ? */
130 void g(int c)
131 {
132 int ind1;
133 ind1 = ind + 1;
134 if (ind1 > cur_text_section->data_allocated)
135 section_realloc(cur_text_section, ind1);
136 cur_text_section->data[ind] = c;
137 ind = ind1;
138 }
139
140 void o(unsigned int c)
141 {
142 while (c) {
143 g(c);
144 c = c >> 8;
145 }
146 }
147
148 void gen_le16(int v)
149 {
150 g(v);
151 g(v >> 8);
152 }
153
154 void gen_le32(int c)
155 {
156 g(c);
157 g(c >> 8);
158 g(c >> 16);
159 g(c >> 24);
160 }
161
162 void gen_le64(int64_t c)
163 {
164 g(c);
165 g(c >> 8);
166 g(c >> 16);
167 g(c >> 24);
168 g(c >> 32);
169 g(c >> 40);
170 g(c >> 48);
171 g(c >> 56);
172 }
173
174 void orex(int ll, int r, int r2, int b)
175 {
176 if ((r & VT_VALMASK) >= VT_CONST)
177 r = 0;
178 if ((r2 & VT_VALMASK) >= VT_CONST)
179 r2 = 0;
180 if (ll || REX_BASE(r) || REX_BASE(r2))
181 o(0x40 | REX_BASE(r) | (REX_BASE(r2) << 2) | (ll << 3));
182 o(b);
183 }
184
185 /* output a symbol and patch all calls to it */
186 void gsym_addr(int t, int a)
187 {
188 int n, *ptr;
189 while (t) {
190 ptr = (int *)(cur_text_section->data + t);
191 n = *ptr; /* next value */
192 *ptr = a - t - 4;
193 t = n;
194 }
195 }
196
197 void gsym(int t)
198 {
199 gsym_addr(t, ind);
200 }
201
202 /* psym is used to put an instruction with a data field which is a
203 reference to a symbol. It is in fact the same as oad ! */
204 #define psym oad
205
206 static int is64_type(int t)
207 {
208 return ((t & VT_BTYPE) == VT_PTR ||
209 (t & VT_BTYPE) == VT_FUNC ||
210 (t & VT_BTYPE) == VT_LLONG);
211 }
212
213 static int is_sse_float(int t) {
214 int bt;
215 bt = t & VT_BTYPE;
216 return bt == VT_DOUBLE || bt == VT_FLOAT;
217 }
218
219
220 /* instruction + 4 bytes data. Return the address of the data */
221 ST_FUNC int oad(int c, int s)
222 {
223 int ind1;
224
225 o(c);
226 ind1 = ind + 4;
227 if (ind1 > cur_text_section->data_allocated)
228 section_realloc(cur_text_section, ind1);
229 *(int *)(cur_text_section->data + ind) = s;
230 s = ind;
231 ind = ind1;
232 return s;
233 }
234
235 ST_FUNC void gen_addr32(int r, Sym *sym, int c)
236 {
237 if (r & VT_SYM)
238 greloc(cur_text_section, sym, ind, R_X86_64_32);
239 gen_le32(c);
240 }
241
242 /* output constant with relocation if 'r & VT_SYM' is true */
243 ST_FUNC void gen_addr64(int r, Sym *sym, int64_t c)
244 {
245 if (r & VT_SYM)
246 greloc(cur_text_section, sym, ind, R_X86_64_64);
247 gen_le64(c);
248 }
249
250 /* output constant with relocation if 'r & VT_SYM' is true */
251 ST_FUNC void gen_addrpc32(int r, Sym *sym, int c)
252 {
253 if (r & VT_SYM)
254 greloc(cur_text_section, sym, ind, R_X86_64_PC32);
255 gen_le32(c-4);
256 }
257
258 /* output got address with relocation */
259 static void gen_gotpcrel(int r, Sym *sym, int c)
260 {
261 #ifndef TCC_TARGET_PE
262 Section *sr;
263 ElfW(Rela) *rel;
264 greloc(cur_text_section, sym, ind, R_X86_64_GOTPCREL);
265 sr = cur_text_section->reloc;
266 rel = (ElfW(Rela) *)(sr->data + sr->data_offset - sizeof(ElfW(Rela)));
267 rel->r_addend = -4;
268 #else
269 printf("picpic: %s %x %x | %02x %02x %02x\n", get_tok_str(sym->v, NULL), c, r,
270 cur_text_section->data[ind-3],
271 cur_text_section->data[ind-2],
272 cur_text_section->data[ind-1]
273 );
274 greloc(cur_text_section, sym, ind, R_X86_64_PC32);
275 #endif
276 gen_le32(0);
277 if (c) {
278 /* we use add c, %xxx for displacement */
279 orex(1, r, 0, 0x81);
280 o(0xc0 + REG_VALUE(r));
281 gen_le32(c);
282 }
283 }
284
285 static void gen_modrm_impl(int op_reg, int r, Sym *sym, int c, int is_got)
286 {
287 op_reg = REG_VALUE(op_reg) << 3;
288 if ((r & VT_VALMASK) == VT_CONST) {
289 /* constant memory reference */
290 o(0x05 | op_reg);
291 if (is_got) {
292 gen_gotpcrel(r, sym, c);
293 } else {
294 gen_addrpc32(r, sym, c);
295 }
296 } else if ((r & VT_VALMASK) == VT_LOCAL) {
297 /* currently, we use only ebp as base */
298 if (c == (char)c) {
299 /* short reference */
300 o(0x45 | op_reg);
301 g(c);
302 } else {
303 oad(0x85 | op_reg, c);
304 }
305 } else if ((r & VT_VALMASK) >= TREG_MEM) {
306 if (c) {
307 g(0x80 | op_reg | REG_VALUE(r));
308 gen_le32(c);
309 } else {
310 g(0x00 | op_reg | REG_VALUE(r));
311 }
312 } else {
313 g(0x00 | op_reg | REG_VALUE(r));
314 }
315 }
316
317 /* generate a modrm reference. 'op_reg' contains the addtionnal 3
318 opcode bits */
319 static void gen_modrm(int op_reg, int r, Sym *sym, int c)
320 {
321 gen_modrm_impl(op_reg, r, sym, c, 0);
322 }
323
324 /* generate a modrm reference. 'op_reg' contains the addtionnal 3
325 opcode bits */
326 static void gen_modrm64(int opcode, int op_reg, int r, Sym *sym, int c)
327 {
328 int is_got;
329 is_got = (op_reg & TREG_MEM) && !(sym->type.t & VT_STATIC);
330 orex(1, r, op_reg, opcode);
331 gen_modrm_impl(op_reg, r, sym, c, is_got);
332 }
333
334
335 /* load 'r' from value 'sv' */
336 void load(int r, SValue *sv)
337 {
338 int v, t, ft, fc, fr;
339 SValue v1;
340
341 #ifdef TCC_TARGET_PE
342 SValue v2;
343 sv = pe_getimport(sv, &v2);
344 #endif
345
346 fr = sv->r;
347 ft = sv->type.t;
348 fc = sv->c.ul;
349
350 #ifndef TCC_TARGET_PE
351 /* we use indirect access via got */
352 if ((fr & VT_VALMASK) == VT_CONST && (fr & VT_SYM) &&
353 (fr & VT_LVAL) && !(sv->sym->type.t & VT_STATIC)) {
354 /* use the result register as a temporal register */
355 int tr = r | TREG_MEM;
356 if (is_float(ft)) {
357 /* we cannot use float registers as a temporal register */
358 tr = get_reg(RC_INT) | TREG_MEM;
359 }
360 gen_modrm64(0x8b, tr, fr, sv->sym, 0);
361
362 /* load from the temporal register */
363 fr = tr | VT_LVAL;
364 }
365 #endif
366
367 v = fr & VT_VALMASK;
368 if (fr & VT_LVAL) {
369 int b, ll;
370 if (v == VT_LLOCAL) {
371 v1.type.t = VT_PTR;
372 v1.r = VT_LOCAL | VT_LVAL;
373 v1.c.ul = fc;
374 fr = r;
375 if (!(reg_classes[fr] & RC_INT))
376 fr = get_reg(RC_INT);
377 load(fr, &v1);
378 }
379 ll = 0;
380 if ((ft & VT_BTYPE) == VT_FLOAT) {
381 b = 0x6e0f66, r = 0; /* movd */
382 } else if ((ft & VT_BTYPE) == VT_DOUBLE) {
383 b = 0x7e0ff3; /* movq */
384 r -= TREG_XMM0;
385 } else if ((ft & VT_BTYPE) == VT_LDOUBLE) {
386 b = 0xdb, r = 5; /* fldt */
387 } else if ((ft & VT_TYPE) == VT_BYTE) {
388 b = 0xbe0f; /* movsbl */
389 } else if ((ft & VT_TYPE) == (VT_BYTE | VT_UNSIGNED)) {
390 b = 0xb60f; /* movzbl */
391 } else if ((ft & VT_TYPE) == VT_SHORT) {
392 b = 0xbf0f; /* movswl */
393 } else if ((ft & VT_TYPE) == (VT_SHORT | VT_UNSIGNED)) {
394 b = 0xb70f; /* movzwl */
395 } else {
396 assert(((ft & VT_BTYPE) == VT_INT) || ((ft & VT_BTYPE) == VT_LLONG)
397 || ((ft & VT_BTYPE) == VT_PTR) || ((ft & VT_BTYPE) == VT_ENUM)
398 || ((ft & VT_BTYPE) == VT_FUNC));
399 ll = is64_type(ft);
400 b = 0x8b;
401 }
402 if (ll) {
403 gen_modrm64(b, r, fr, sv->sym, fc);
404 } else {
405 orex(ll, fr, r, b);
406 gen_modrm(r, fr, sv->sym, fc);
407 }
408 } else {
409 if (v == VT_CONST) {
410 if (fr & VT_SYM) {
411 #ifdef TCC_TARGET_PE
412 orex(1,0,r,0x8d);
413 o(0x05 + REG_VALUE(r) * 8); /* lea xx(%rip), r */
414 gen_addrpc32(fr, sv->sym, fc);
415 #else
416 if (sv->sym->type.t & VT_STATIC) {
417 orex(1,0,r,0x8d);
418 o(0x05 + REG_VALUE(r) * 8); /* lea xx(%rip), r */
419 gen_addrpc32(fr, sv->sym, fc);
420 } else {
421 orex(1,0,r,0x8b);
422 o(0x05 + REG_VALUE(r) * 8); /* mov xx(%rip), r */
423 gen_gotpcrel(r, sv->sym, fc);
424 }
425 #endif
426 } else if (is64_type(ft)) {
427 orex(1,r,0, 0xb8 + REG_VALUE(r)); /* mov $xx, r */
428 gen_le64(sv->c.ull);
429 } else {
430 orex(0,r,0, 0xb8 + REG_VALUE(r)); /* mov $xx, r */
431 gen_le32(fc);
432 }
433 } else if (v == VT_LOCAL) {
434 orex(1,0,r,0x8d); /* lea xxx(%ebp), r */
435 gen_modrm(r, VT_LOCAL, sv->sym, fc);
436 } else if (v == VT_CMP) {
437 orex(0,r,0,0);
438 if ((fc & ~0x100) != TOK_NE)
439 oad(0xb8 + REG_VALUE(r), 0); /* mov $0, r */
440 else
441 oad(0xb8 + REG_VALUE(r), 1); /* mov $1, r */
442 if (fc & 0x100)
443 {
444 /* This was a float compare. If the parity bit is
445 set the result was unordered, meaning false for everything
446 except TOK_NE, and true for TOK_NE. */
447 fc &= ~0x100;
448 o(0x037a + (REX_BASE(r) << 8));
449 }
450 orex(0,r,0, 0x0f); /* setxx %br */
451 o(fc);
452 o(0xc0 + REG_VALUE(r));
453 } else if (v == VT_JMP || v == VT_JMPI) {
454 t = v & 1;
455 orex(0,r,0,0);
456 oad(0xb8 + REG_VALUE(r), t); /* mov $1, r */
457 o(0x05eb + (REX_BASE(r) << 8)); /* jmp after */
458 gsym(fc);
459 orex(0,r,0,0);
460 oad(0xb8 + REG_VALUE(r), t ^ 1); /* mov $0, r */
461 } else if (v != r) {
462 if ((r == TREG_XMM0) || (r == TREG_XMM1)) {
463 if (v == TREG_ST0) {
464 /* gen_cvt_ftof(VT_DOUBLE); */
465 o(0xf0245cdd); /* fstpl -0x10(%rsp) */
466 /* movsd -0x10(%rsp),%xmmN */
467 o(0x100ff2);
468 o(0x44 + ((r - TREG_XMM0) << 3)); /* %xmmN */
469 o(0xf024);
470 } else {
471 assert((v == TREG_XMM0) || (v == TREG_XMM1));
472 if ((ft & VT_BTYPE) == VT_FLOAT) {
473 o(0x100ff3);
474 } else {
475 assert((ft & VT_BTYPE) == VT_DOUBLE);
476 o(0x100ff2);
477 }
478 o(0xc0 + (v - TREG_XMM0) + ((r - TREG_XMM0) << 3));
479 }
480 } else if (r == TREG_ST0) {
481 assert((v == TREG_XMM0) || (v == TREG_XMM1));
482 /* gen_cvt_ftof(VT_LDOUBLE); */
483 /* movsd %xmm0,-0x10(%rsp) */
484 o(0x110ff2);
485 o(0x44 + ((r - TREG_XMM0) << 3)); /* %xmmN */
486 o(0xf024);
487 o(0xf02444dd); /* fldl -0x10(%rsp) */
488 } else {
489 orex(1,r,v, 0x89);
490 o(0xc0 + REG_VALUE(r) + REG_VALUE(v) * 8); /* mov v, r */
491 }
492 }
493 }
494 }
495
496 /* store register 'r' in lvalue 'v' */
497 void store(int r, SValue *v)
498 {
499 int fr, bt, ft, fc;
500 int op64 = 0;
501 /* store the REX prefix in this variable when PIC is enabled */
502 int pic = 0;
503
504 #ifdef TCC_TARGET_PE
505 SValue v2;
506 v = pe_getimport(v, &v2);
507 #endif
508
509 ft = v->type.t;
510 fc = v->c.ul;
511 fr = v->r & VT_VALMASK;
512 bt = ft & VT_BTYPE;
513
514 #ifndef TCC_TARGET_PE
515 /* we need to access the variable via got */
516 if (fr == VT_CONST && (v->r & VT_SYM)) {
517 /* mov xx(%rip), %r11 */
518 o(0x1d8b4c);
519 gen_gotpcrel(TREG_R11, v->sym, v->c.ul);
520 pic = is64_type(bt) ? 0x49 : 0x41;
521 }
522 #endif
523
524 /* XXX: incorrect if float reg to reg */
525 if (bt == VT_FLOAT) {
526 o(0x66);
527 o(pic);
528 o(0x7e0f); /* movd */
529 r = 0;
530 } else if (bt == VT_DOUBLE) {
531 o(0x66);
532 o(pic);
533 o(0xd60f); /* movq */
534 r -= TREG_XMM0;
535 } else if (bt == VT_LDOUBLE) {
536 o(0xc0d9); /* fld %st(0) */
537 o(pic);
538 o(0xdb); /* fstpt */
539 r = 7;
540 } else {
541 if (bt == VT_SHORT)
542 o(0x66);
543 o(pic);
544 if (bt == VT_BYTE || bt == VT_BOOL)
545 orex(0, 0, r, 0x88);
546 else if (is64_type(bt))
547 op64 = 0x89;
548 else
549 orex(0, 0, r, 0x89);
550 }
551 if (pic) {
552 /* xxx r, (%r11) where xxx is mov, movq, fld, or etc */
553 if (op64)
554 o(op64);
555 o(3 + (r << 3));
556 } else if (op64) {
557 if (fr == VT_CONST || fr == VT_LOCAL || (v->r & VT_LVAL)) {
558 gen_modrm64(op64, r, v->r, v->sym, fc);
559 } else if (fr != r) {
560 /* XXX: don't we really come here? */
561 abort();
562 o(0xc0 + fr + r * 8); /* mov r, fr */
563 }
564 } else {
565 if (fr == VT_CONST || fr == VT_LOCAL || (v->r & VT_LVAL)) {
566 gen_modrm(r, v->r, v->sym, fc);
567 } else if (fr != r) {
568 /* XXX: don't we really come here? */
569 abort();
570 o(0xc0 + fr + r * 8); /* mov r, fr */
571 }
572 }
573 }
574
575 /* 'is_jmp' is '1' if it is a jump */
576 static void gcall_or_jmp(int is_jmp)
577 {
578 int r;
579 if ((vtop->r & (VT_VALMASK | VT_LVAL)) == VT_CONST) {
580 /* constant case */
581 if (vtop->r & VT_SYM) {
582 /* relocation case */
583 greloc(cur_text_section, vtop->sym,
584 ind + 1, R_X86_64_PC32);
585 } else {
586 /* put an empty PC32 relocation */
587 put_elf_reloc(symtab_section, cur_text_section,
588 ind + 1, R_X86_64_PC32, 0);
589 }
590 oad(0xe8 + is_jmp, vtop->c.ul - 4); /* call/jmp im */
591 } else {
592 /* otherwise, indirect call */
593 r = TREG_R11;
594 load(r, vtop);
595 o(0x41); /* REX */
596 o(0xff); /* call/jmp *r */
597 o(0xd0 + REG_VALUE(r) + (is_jmp << 4));
598 }
599 }
600
601 #ifdef TCC_TARGET_PE
602
603 #define REGN 4
604 static const uint8_t arg_regs[] = {
605 TREG_RCX, TREG_RDX, TREG_R8, TREG_R9
606 };
607
608 static int func_scratch;
609
610 /* Generate function call. The function address is pushed first, then
611 all the parameters in call order. This functions pops all the
612 parameters and the function address. */
613
614 void gen_offs_sp(int b, int r, int d)
615 {
616 orex(1,0,r & 0x100 ? 0 : r, b);
617 if (d == (char)d) {
618 o(0x2444 | (REG_VALUE(r) << 3));
619 g(d);
620 } else {
621 o(0x2484 | (REG_VALUE(r) << 3));
622 gen_le32(d);
623 }
624 }
625
626 /* Return 1 if this function returns via an sret pointer, 0 otherwise */
627 ST_FUNC int gfunc_sret(CType *vt, CType *ret, int *ret_align) {
628 *ret_align = 1; // Never have to re-align return values for x86-64
629 return 1;
630 }
631
632 void gfunc_call(int nb_args)
633 {
634 int size, align, r, args_size, i, d, j, bt, struct_size;
635 int nb_reg_args, gen_reg;
636
637 nb_reg_args = nb_args;
638 args_size = (nb_reg_args < REGN ? REGN : nb_reg_args) * PTR_SIZE;
639
640 /* for struct arguments, we need to call memcpy and the function
641 call breaks register passing arguments we are preparing.
642 So, we process arguments which will be passed by stack first. */
643 struct_size = args_size;
644 for(i = 0; i < nb_args; i++) {
645 SValue *sv = &vtop[-i];
646 bt = (sv->type.t & VT_BTYPE);
647 if (bt == VT_STRUCT) {
648 size = type_size(&sv->type, &align);
649 /* align to stack align size */
650 size = (size + 15) & ~15;
651 /* generate structure store */
652 r = get_reg(RC_INT);
653 gen_offs_sp(0x8d, r, struct_size);
654 struct_size += size;
655
656 /* generate memcpy call */
657 vset(&sv->type, r | VT_LVAL, 0);
658 vpushv(sv);
659 vstore();
660 --vtop;
661
662 } else if (bt == VT_LDOUBLE) {
663
664 gv(RC_ST0);
665 gen_offs_sp(0xdb, 0x107, struct_size);
666 struct_size += 16;
667
668 }
669 }
670
671 if (func_scratch < struct_size)
672 func_scratch = struct_size;
673 #if 1
674 for (i = 0; i < REGN; ++i)
675 save_reg(arg_regs[i]);
676 save_reg(TREG_RAX);
677 #endif
678 gen_reg = nb_reg_args;
679 struct_size = args_size;
680
681 for(i = 0; i < nb_args; i++) {
682 bt = (vtop->type.t & VT_BTYPE);
683
684 if (bt == VT_STRUCT || bt == VT_LDOUBLE) {
685 if (bt == VT_LDOUBLE)
686 size = 16;
687 else
688 size = type_size(&vtop->type, &align);
689 /* align to stack align size */
690 size = (size + 15) & ~15;
691 j = --gen_reg;
692 if (j >= REGN) {
693 d = TREG_RAX;
694 gen_offs_sp(0x8d, d, struct_size);
695 gen_offs_sp(0x89, d, j*8);
696 } else {
697 d = arg_regs[j];
698 gen_offs_sp(0x8d, d, struct_size);
699 }
700 struct_size += size;
701
702 } else if (is_sse_float(vtop->type.t)) {
703 gv(RC_XMM0); /* only one float register */
704 j = --gen_reg;
705 if (j >= REGN) {
706 /* movq %xmm0, j*8(%rsp) */
707 gen_offs_sp(0xd60f66, 0x100, j*8);
708 } else {
709 /* movaps %xmm0, %xmmN */
710 o(0x280f);
711 o(0xc0 + (j << 3));
712 d = arg_regs[j];
713 /* mov %xmm0, %rxx */
714 o(0x66);
715 orex(1,d,0, 0x7e0f);
716 o(0xc0 + REG_VALUE(d));
717 }
718 } else {
719 j = --gen_reg;
720 if (j >= REGN) {
721 r = gv(RC_INT);
722 gen_offs_sp(0x89, r, j*8);
723 } else {
724 d = arg_regs[j];
725 if (d < NB_REGS) {
726 gv(reg_classes[d] & ~RC_INT);
727 } else {
728 r = gv(RC_INT);
729 if (d != r) {
730 orex(1,d,r, 0x89);
731 o(0xc0 + REG_VALUE(d) + REG_VALUE(r) * 8);
732 }
733 }
734
735 }
736 }
737 vtop--;
738 }
739 save_regs(0);
740 gcall_or_jmp(0);
741 vtop--;
742 }
743
744
745 #define FUNC_PROLOG_SIZE 11
746
747 /* generate function prolog of type 't' */
748 void gfunc_prolog(CType *func_type)
749 {
750 int addr, reg_param_index, bt;
751 Sym *sym;
752 CType *type;
753
754 func_ret_sub = 0;
755 func_scratch = 0;
756 loc = 0;
757
758 addr = PTR_SIZE * 2;
759 ind += FUNC_PROLOG_SIZE;
760 func_sub_sp_offset = ind;
761 reg_param_index = 0;
762
763 sym = func_type->ref;
764
765 /* if the function returns a structure, then add an
766 implicit pointer parameter */
767 func_vt = sym->type;
768 if ((func_vt.t & VT_BTYPE) == VT_STRUCT) {
769 gen_modrm64(0x89, arg_regs[reg_param_index], VT_LOCAL, NULL, addr);
770 reg_param_index++;
771 addr += PTR_SIZE;
772 }
773
774 /* define parameters */
775 while ((sym = sym->next) != NULL) {
776 type = &sym->type;
777 bt = type->t & VT_BTYPE;
778 if (reg_param_index < REGN) {
779 /* save arguments passed by register */
780 gen_modrm64(0x89, arg_regs[reg_param_index], VT_LOCAL, NULL, addr);
781 }
782 if (bt == VT_STRUCT || bt == VT_LDOUBLE) {
783 sym_push(sym->v & ~SYM_FIELD, type, VT_LOCAL | VT_LVAL | VT_REF, addr);
784 } else {
785 sym_push(sym->v & ~SYM_FIELD, type, VT_LOCAL | VT_LVAL, addr);
786 }
787 reg_param_index++;
788 addr += PTR_SIZE;
789 }
790
791 while (reg_param_index < REGN) {
792 if (func_type->ref->c == FUNC_ELLIPSIS)
793 gen_modrm64(0x89, arg_regs[reg_param_index], VT_LOCAL, NULL, addr);
794 reg_param_index++;
795 addr += PTR_SIZE;
796 }
797 }
798
799 /* generate function epilog */
800 void gfunc_epilog(void)
801 {
802 int v, saved_ind;
803
804 o(0xc9); /* leave */
805 if (func_ret_sub == 0) {
806 o(0xc3); /* ret */
807 } else {
808 o(0xc2); /* ret n */
809 g(func_ret_sub);
810 g(func_ret_sub >> 8);
811 }
812
813 saved_ind = ind;
814 ind = func_sub_sp_offset - FUNC_PROLOG_SIZE;
815 /* align local size to word & save local variables */
816 v = (func_scratch + -loc + 15) & -16;
817
818 if (v >= 4096) {
819 Sym *sym = external_global_sym(TOK___chkstk, &func_old_type, 0);
820 oad(0xb8, v); /* mov stacksize, %eax */
821 oad(0xe8, -4); /* call __chkstk, (does the stackframe too) */
822 greloc(cur_text_section, sym, ind-4, R_X86_64_PC32);
823 o(0x90); /* fill for FUNC_PROLOG_SIZE = 11 bytes */
824 } else {
825 o(0xe5894855); /* push %rbp, mov %rsp, %rbp */
826 o(0xec8148); /* sub rsp, stacksize */
827 gen_le32(v);
828 }
829
830 cur_text_section->data_offset = saved_ind;
831 pe_add_unwind_data(ind, saved_ind, v);
832 ind = cur_text_section->data_offset;
833 }
834
835 #else
836
837 static void gadd_sp(int val)
838 {
839 if (val == (char)val) {
840 o(0xc48348);
841 g(val);
842 } else {
843 oad(0xc48148, val); /* add $xxx, %rsp */
844 }
845 }
846
847 typedef enum X86_64_Mode {
848 x86_64_mode_none,
849 x86_64_mode_memory,
850 x86_64_mode_integer,
851 x86_64_mode_sse,
852 x86_64_mode_x87
853 } X86_64_Mode;
854
855 static X86_64_Mode classify_x86_64_merge(X86_64_Mode a, X86_64_Mode b) {
856 if (a == b)
857 return a;
858 else if (a == x86_64_mode_none)
859 return b;
860 else if (b == x86_64_mode_none)
861 return a;
862 else if ((a == x86_64_mode_memory) || (b == x86_64_mode_memory))
863 return x86_64_mode_memory;
864 else if ((a == x86_64_mode_integer) || (b == x86_64_mode_integer))
865 return x86_64_mode_integer;
866 else if ((a == x86_64_mode_x87) || (b == x86_64_mode_x87))
867 return x86_64_mode_memory;
868 else
869 return x86_64_mode_sse;
870 }
871
872 static X86_64_Mode classify_x86_64_inner(CType *ty) {
873 X86_64_Mode mode;
874 Sym *f;
875
876 switch (ty->t & VT_BTYPE) {
877 case VT_VOID: return x86_64_mode_none;
878
879 case VT_INT:
880 case VT_BYTE:
881 case VT_SHORT:
882 case VT_LLONG:
883 case VT_BOOL:
884 case VT_PTR:
885 case VT_FUNC:
886 case VT_ENUM: return x86_64_mode_integer;
887
888 case VT_FLOAT:
889 case VT_DOUBLE: return x86_64_mode_sse;
890
891 case VT_LDOUBLE: return x86_64_mode_x87;
892
893 case VT_STRUCT:
894 f = ty->ref;
895
896 // Detect union
897 if (f->next && (f->c == f->next->c))
898 return x86_64_mode_memory;
899
900 mode = x86_64_mode_none;
901 for (; f; f = f->next)
902 mode = classify_x86_64_merge(mode, classify_x86_64_inner(&f->type));
903
904 return mode;
905 }
906
907 assert(0);
908 }
909
910 static X86_64_Mode classify_x86_64_arg(CType *ty, CType *ret, int *psize, int *reg_count) {
911 X86_64_Mode mode;
912 int size, align, ret_t;
913
914 if (ty->t & (VT_BITFIELD|VT_ARRAY)) {
915 *psize = 8;
916 *reg_count = 1;
917 ret_t = ty->t;
918 mode = x86_64_mode_integer;
919 } else {
920 size = type_size(ty, &align);
921 *psize = (size + 7) & ~7;
922
923 if (size > 16) {
924 mode = x86_64_mode_memory;
925 } else {
926 mode = classify_x86_64_inner(ty);
927 switch (mode) {
928 case x86_64_mode_integer:
929 if (size > 8) {
930 *reg_count = 2;
931 ret_t = VT_QLONG;
932 } else {
933 *reg_count = 1;
934 ret_t = (size > 4) ? VT_LLONG : VT_INT;
935 }
936 break;
937
938 case x86_64_mode_x87:
939 *reg_count = 1;
940 ret_t = VT_LDOUBLE;
941 break;
942
943 case x86_64_mode_sse:
944 if (size > 8) {
945 *reg_count = 2;
946 ret_t = VT_QFLOAT;
947 } else {
948 *reg_count = 1;
949 ret_t = (size > 4) ? VT_DOUBLE : VT_FLOAT;
950 }
951 break;
952 }
953 }
954 }
955
956 if (ret) {
957 ret->ref = NULL;
958 ret->t = ret_t;
959 }
960
961 return mode;
962 }
963
964 ST_FUNC int classify_x86_64_va_arg(CType *ty) {
965 /* This definition must be synced with stdarg.h */
966 enum __va_arg_type {
967 __va_gen_reg, __va_float_reg, __va_stack
968 };
969 int size, reg_count;
970 X86_64_Mode mode = classify_x86_64_arg(ty, NULL, &size, &reg_count);
971 switch (mode) {
972 default: return __va_stack;
973 case x86_64_mode_integer: return __va_gen_reg;
974 case x86_64_mode_sse: return __va_float_reg;
975 }
976 }
977
978 /* Return 1 if this function returns via an sret pointer, 0 otherwise */
979 int gfunc_sret(CType *vt, CType *ret, int *ret_align) {
980 int size, reg_count;
981 *ret_align = 1; // Never have to re-align return values for x86-64
982 return (classify_x86_64_arg(vt, ret, &size, &reg_count) == x86_64_mode_memory);
983 }
984
985 #define REGN 6
986 static const uint8_t arg_regs[REGN] = {
987 TREG_RDI, TREG_RSI, TREG_RDX, TREG_RCX, TREG_R8, TREG_R9
988 };
989
990 static int arg_prepare_reg(int idx) {
991 if (idx == 2 || idx == 3)
992 /* idx=2: r10, idx=3: r11 */
993 return idx + 8;
994 else
995 return arg_regs[idx];
996 }
997
998 /* Generate function call. The function address is pushed first, then
999 all the parameters in call order. This functions pops all the
1000 parameters and the function address. */
1001 void gfunc_call(int nb_args)
1002 {
1003 X86_64_Mode mode;
1004 CType type;
1005 int size, align, r, args_size, i, j, reg_count;
1006 int nb_reg_args = 0;
1007 int nb_sse_args = 0;
1008 int sse_reg, gen_reg;
1009
1010 /* calculate the number of integer/float arguments */
1011 args_size = 0;
1012 for(i = 0; i < nb_args; i++) {
1013 mode = classify_x86_64_arg(&vtop[-i].type, NULL, &size, &reg_count);
1014 switch (mode) {
1015 case x86_64_mode_memory:
1016 case x86_64_mode_x87:
1017 args_size += size;
1018 break;
1019
1020 case x86_64_mode_sse:
1021 nb_sse_args += reg_count;
1022 if (nb_sse_args > 8) args_size += size;
1023 break;
1024
1025 case x86_64_mode_integer:
1026 nb_reg_args += reg_count;
1027 if (nb_reg_args > REGN) args_size += size;
1028 break;
1029 }
1030 }
1031
1032 /* for struct arguments, we need to call memcpy and the function
1033 call breaks register passing arguments we are preparing.
1034 So, we process arguments which will be passed by stack first. */
1035 gen_reg = nb_reg_args;
1036 sse_reg = nb_sse_args;
1037
1038 /* adjust stack to align SSE boundary */
1039 if (args_size &= 15) {
1040 /* fetch cpu flag before the following sub will change the value */
1041 if (vtop >= vstack && (vtop->r & VT_VALMASK) == VT_CMP)
1042 gv(RC_INT);
1043
1044 args_size = 16 - args_size;
1045 o(0x48);
1046 oad(0xec81, args_size); /* sub $xxx, %rsp */
1047 }
1048
1049 for(i = 0; i < nb_args; i++) {
1050 /* Swap argument to top, it will possibly be changed here,
1051 and might use more temps. All arguments must remain on the
1052 stack, so that get_reg can correctly evict some of them onto
1053 stack. We could use also use a vrott(nb_args) at the end
1054 of this loop, but this seems faster. */
1055 SValue tmp = vtop[0];
1056 vtop[0] = vtop[-i];
1057 vtop[-i] = tmp;
1058 mode = classify_x86_64_arg(&vtop->type, NULL, &size, &reg_count);
1059 switch (mode) {
1060 case x86_64_mode_memory:
1061 /* allocate the necessary size on stack */
1062 o(0x48);
1063 oad(0xec81, size); /* sub $xxx, %rsp */
1064 /* generate structure store */
1065 r = get_reg(RC_INT);
1066 orex(1, r, 0, 0x89); /* mov %rsp, r */
1067 o(0xe0 + REG_VALUE(r));
1068 vset(&vtop->type, r | VT_LVAL, 0);
1069 vswap();
1070 vstore();
1071 args_size += size;
1072 break;
1073
1074 case x86_64_mode_x87:
1075 gv(RC_ST0);
1076 size = LDOUBLE_SIZE;
1077 oad(0xec8148, size); /* sub $xxx, %rsp */
1078 o(0x7cdb); /* fstpt 0(%rsp) */
1079 g(0x24);
1080 g(0x00);
1081 args_size += size;
1082 break;
1083
1084 case x86_64_mode_sse:
1085 if (sse_reg > 8) {
1086 gv(RC_XMM0);
1087 o(0x50); /* push $rax */
1088 /* movq %xmm0, (%rsp) */
1089 o(0x04d60f66);
1090 o(0x24);
1091 args_size += size;
1092 }
1093 sse_reg -= reg_count;
1094 break;
1095
1096 case x86_64_mode_integer:
1097 /* simple type */
1098 /* XXX: implicit cast ? */
1099 if (gen_reg > REGN) {
1100 r = gv(RC_INT);
1101 orex(0,r,0,0x50 + REG_VALUE(r)); /* push r */
1102 args_size += size;
1103 }
1104 gen_reg -= reg_count;
1105 break;
1106 }
1107
1108 /* And swap the argument back to it's original position. */
1109 tmp = vtop[0];
1110 vtop[0] = vtop[-i];
1111 vtop[-i] = tmp;
1112 }
1113
1114 /* XXX This should be superfluous. */
1115 save_regs(0); /* save used temporary registers */
1116
1117 /* then, we prepare register passing arguments.
1118 Note that we cannot set RDX and RCX in this loop because gv()
1119 may break these temporary registers. Let's use R10 and R11
1120 instead of them */
1121 gen_reg = nb_reg_args;
1122 sse_reg = nb_sse_args;
1123 for(i = 0; i < nb_args; i++) {
1124 mode = classify_x86_64_arg(&vtop->type, &type, &size, &reg_count);
1125 /* Alter stack entry type so that gv() knows how to treat it */
1126 vtop->type = type;
1127 switch (mode) {
1128 default:
1129 break;
1130
1131 case x86_64_mode_sse:
1132 sse_reg -= reg_count;
1133 if (sse_reg + reg_count <= 8) {
1134 gv(RC_XMM0); /* only one float register */
1135 if (sse_reg) { /* avoid redundant movaps %xmm0, %xmm0 */
1136 /* movaps %xmm0, %xmmN */
1137 o(0x280f);
1138 o(0xc0 + (sse_reg << 3));
1139 if (reg_count == 2) {
1140 /* movaps %xmm1, %xmmN */
1141 o(0x280f);
1142 o(0xc1 + ((sse_reg+1) << 3));
1143 }
1144 }
1145 }
1146 break;
1147
1148 case x86_64_mode_integer:
1149 /* simple type */
1150 /* XXX: implicit cast ? */
1151 gen_reg -= reg_count;
1152 if (gen_reg + reg_count <= REGN) {
1153 r = gv((reg_count == 1) ? RC_INT : RC_IRET);
1154 int d = arg_prepare_reg(gen_reg);
1155 orex(1,d,r,0x89); /* mov */
1156 o(0xc0 + REG_VALUE(r) * 8 + REG_VALUE(d));
1157 if (reg_count == 2) {
1158 /* Second word of two-word value should always be in rdx
1159 this case is handled via RC_IRET */
1160 r = TREG_RDX;
1161 d = arg_prepare_reg(gen_reg+1);
1162 orex(1,d,r,0x89); /* mov */
1163 o(0xc0 + REG_VALUE(r) * 8 + REG_VALUE(d));
1164 }
1165 }
1166 break;
1167 }
1168 vtop--;
1169 }
1170
1171 /* We shouldn't have many operands on the stack anymore, but the
1172 call address itself is still there, and it might be in %eax
1173 (or edx/ecx) currently, which the below writes would clobber.
1174 So evict all remaining operands here. */
1175 save_regs(0);
1176
1177 /* Copy R10 and R11 into RDX and RCX, respectively */
1178 if (nb_reg_args > 2) {
1179 o(0xd2894c); /* mov %r10, %rdx */
1180 if (nb_reg_args > 3) {
1181 o(0xd9894c); /* mov %r11, %rcx */
1182 }
1183 }
1184
1185 oad(0xb8, nb_sse_args < 8 ? nb_sse_args : 8); /* mov nb_sse_args, %eax */
1186 gcall_or_jmp(0);
1187 if (args_size)
1188 gadd_sp(args_size);
1189 vtop--;
1190 }
1191
1192
1193 #define FUNC_PROLOG_SIZE 11
1194
1195 static void push_arg_reg(int i) {
1196 loc -= 8;
1197 gen_modrm64(0x89, arg_regs[i], VT_LOCAL, NULL, loc);
1198 }
1199
1200 /* generate function prolog of type 't' */
1201 void gfunc_prolog(CType *func_type)
1202 {
1203 X86_64_Mode mode;
1204 int i, addr, align, size, reg_count;
1205 int param_index, param_addr, reg_param_index, sse_param_index;
1206 Sym *sym;
1207 CType *type;
1208
1209 sym = func_type->ref;
1210 addr = PTR_SIZE * 2;
1211 loc = 0;
1212 ind += FUNC_PROLOG_SIZE;
1213 func_sub_sp_offset = ind;
1214 func_ret_sub = 0;
1215
1216 if (func_type->ref->c == FUNC_ELLIPSIS) {
1217 int seen_reg_num, seen_sse_num, seen_stack_size;
1218 seen_reg_num = seen_sse_num = 0;
1219 /* frame pointer and return address */
1220 seen_stack_size = PTR_SIZE * 2;
1221 /* count the number of seen parameters */
1222 sym = func_type->ref;
1223 while ((sym = sym->next) != NULL) {
1224 type = &sym->type;
1225 mode = classify_x86_64_arg(type, NULL, &size, &reg_count);
1226 switch (mode) {
1227 default:
1228 seen_stack_size += size;
1229 break;
1230
1231 case x86_64_mode_integer:
1232 if (seen_reg_num + reg_count <= 8) {
1233 seen_reg_num += reg_count;
1234 } else {
1235 seen_reg_num = 8;
1236 seen_stack_size += size;
1237 }
1238 break;
1239
1240 case x86_64_mode_sse:
1241 if (seen_sse_num + reg_count <= 8) {
1242 seen_sse_num += reg_count;
1243 } else {
1244 seen_sse_num = 8;
1245 seen_stack_size += size;
1246 }
1247 break;
1248 }
1249 }
1250
1251 loc -= 16;
1252 /* movl $0x????????, -0x10(%rbp) */
1253 o(0xf045c7);
1254 gen_le32(seen_reg_num * 8);
1255 /* movl $0x????????, -0xc(%rbp) */
1256 o(0xf445c7);
1257 gen_le32(seen_sse_num * 16 + 48);
1258 /* movl $0x????????, -0x8(%rbp) */
1259 o(0xf845c7);
1260 gen_le32(seen_stack_size);
1261
1262 /* save all register passing arguments */
1263 for (i = 0; i < 8; i++) {
1264 loc -= 16;
1265 o(0xd60f66); /* movq */
1266 gen_modrm(7 - i, VT_LOCAL, NULL, loc);
1267 /* movq $0, loc+8(%rbp) */
1268 o(0x85c748);
1269 gen_le32(loc + 8);
1270 gen_le32(0);
1271 }
1272 for (i = 0; i < REGN; i++) {
1273 push_arg_reg(REGN-1-i);
1274 }
1275 }
1276
1277 sym = func_type->ref;
1278 param_index = 0;
1279 reg_param_index = 0;
1280 sse_param_index = 0;
1281
1282 /* if the function returns a structure, then add an
1283 implicit pointer parameter */
1284 func_vt = sym->type;
1285 mode = classify_x86_64_arg(&func_vt, NULL, &size, &reg_count);
1286 if (mode == x86_64_mode_memory) {
1287 push_arg_reg(reg_param_index);
1288 param_addr = loc;
1289
1290 func_vc = loc;
1291 param_index++;
1292 reg_param_index++;
1293 }
1294 /* define parameters */
1295 while ((sym = sym->next) != NULL) {
1296 type = &sym->type;
1297 mode = classify_x86_64_arg(type, NULL, &size, &reg_count);
1298 switch (mode) {
1299 case x86_64_mode_sse:
1300 if (sse_param_index + reg_count <= 8) {
1301 /* save arguments passed by register */
1302 loc -= reg_count * 8;
1303 param_addr = loc;
1304 for (i = 0; i < reg_count; ++i) {
1305 o(0xd60f66); /* movq */
1306 gen_modrm(sse_param_index, VT_LOCAL, NULL, param_addr + i*8);
1307 ++sse_param_index;
1308 }
1309 } else {
1310 param_addr = addr;
1311 addr += size;
1312 sse_param_index += reg_count;
1313 }
1314 break;
1315
1316 case x86_64_mode_memory:
1317 case x86_64_mode_x87:
1318 param_addr = addr;
1319 addr += size;
1320 break;
1321
1322 case x86_64_mode_integer: {
1323 if (reg_param_index + reg_count <= REGN) {
1324 /* save arguments passed by register */
1325 loc -= reg_count * 8;
1326 param_addr = loc;
1327 for (i = 0; i < reg_count; ++i) {
1328 gen_modrm64(0x89, arg_regs[reg_param_index], VT_LOCAL, NULL, param_addr + i*8);
1329 ++reg_param_index;
1330 }
1331 } else {
1332 param_addr = addr;
1333 addr += size;
1334 reg_param_index += reg_count;
1335 }
1336 break;
1337 }
1338 }
1339 sym_push(sym->v & ~SYM_FIELD, type,
1340 VT_LOCAL | VT_LVAL, param_addr);
1341 param_index++;
1342 }
1343 }
1344
1345 /* generate function epilog */
1346 void gfunc_epilog(void)
1347 {
1348 int v, saved_ind;
1349
1350 o(0xc9); /* leave */
1351 if (func_ret_sub == 0) {
1352 o(0xc3); /* ret */
1353 } else {
1354 o(0xc2); /* ret n */
1355 g(func_ret_sub);
1356 g(func_ret_sub >> 8);
1357 }
1358 /* align local size to word & save local variables */
1359 v = (-loc + 15) & -16;
1360 saved_ind = ind;
1361 ind = func_sub_sp_offset - FUNC_PROLOG_SIZE;
1362 o(0xe5894855); /* push %rbp, mov %rsp, %rbp */
1363 o(0xec8148); /* sub rsp, stacksize */
1364 gen_le32(v);
1365 ind = saved_ind;
1366 }
1367
1368 #endif /* not PE */
1369
1370 /* generate a jump to a label */
1371 int gjmp(int t)
1372 {
1373 return psym(0xe9, t);
1374 }
1375
1376 /* generate a jump to a fixed address */
1377 void gjmp_addr(int a)
1378 {
1379 int r;
1380 r = a - ind - 2;
1381 if (r == (char)r) {
1382 g(0xeb);
1383 g(r);
1384 } else {
1385 oad(0xe9, a - ind - 5);
1386 }
1387 }
1388
1389 /* generate a test. set 'inv' to invert test. Stack entry is popped */
1390 int gtst(int inv, int t)
1391 {
1392 int v, *p;
1393
1394 v = vtop->r & VT_VALMASK;
1395 if (v == VT_CMP) {
1396 /* fast case : can jump directly since flags are set */
1397 if (vtop->c.i & 0x100)
1398 {
1399 /* This was a float compare. If the parity flag is set
1400 the result was unordered. For anything except != this
1401 means false and we don't jump (anding both conditions).
1402 For != this means true (oring both).
1403 Take care about inverting the test. We need to jump
1404 to our target if the result was unordered and test wasn't NE,
1405 otherwise if unordered we don't want to jump. */
1406 vtop->c.i &= ~0x100;
1407 if (!inv == (vtop->c.i != TOK_NE))
1408 o(0x067a); /* jp +6 */
1409 else
1410 {
1411 g(0x0f);
1412 t = psym(0x8a, t); /* jp t */
1413 }
1414 }
1415 g(0x0f);
1416 t = psym((vtop->c.i - 16) ^ inv, t);
1417 } else if (v == VT_JMP || v == VT_JMPI) {
1418 /* && or || optimization */
1419 if ((v & 1) == inv) {
1420 /* insert vtop->c jump list in t */
1421 p = &vtop->c.i;
1422 while (*p != 0)
1423 p = (int *)(cur_text_section->data + *p);
1424 *p = t;
1425 t = vtop->c.i;
1426 } else {
1427 t = gjmp(t);
1428 gsym(vtop->c.i);
1429 }
1430 } else {
1431 if (is_float(vtop->type.t) ||
1432 (vtop->type.t & VT_BTYPE) == VT_LLONG) {
1433 vpushi(0);
1434 gen_op(TOK_NE);
1435 }
1436 if ((vtop->r & (VT_VALMASK | VT_LVAL | VT_SYM)) == VT_CONST) {
1437 /* constant jmp optimization */
1438 if ((vtop->c.i != 0) != inv)
1439 t = gjmp(t);
1440 } else {
1441 v = gv(RC_INT);
1442 orex(0,v,v,0x85);
1443 o(0xc0 + REG_VALUE(v) * 9);
1444 g(0x0f);
1445 t = psym(0x85 ^ inv, t);
1446 }
1447 }
1448 vtop--;
1449 return t;
1450 }
1451
1452 /* generate an integer binary operation */
1453 void gen_opi(int op)
1454 {
1455 int r, fr, opc, c;
1456 int ll, uu, cc;
1457
1458 ll = is64_type(vtop[-1].type.t);
1459 uu = (vtop[-1].type.t & VT_UNSIGNED) != 0;
1460 cc = (vtop->r & (VT_VALMASK | VT_LVAL | VT_SYM)) == VT_CONST;
1461
1462 switch(op) {
1463 case '+':
1464 case TOK_ADDC1: /* add with carry generation */
1465 opc = 0;
1466 gen_op8:
1467 if (cc && (!ll || (int)vtop->c.ll == vtop->c.ll)) {
1468 /* constant case */
1469 vswap();
1470 r = gv(RC_INT);
1471 vswap();
1472 c = vtop->c.i;
1473 if (c == (char)c) {
1474 /* XXX: generate inc and dec for smaller code ? */
1475 orex(ll, r, 0, 0x83);
1476 o(0xc0 | (opc << 3) | REG_VALUE(r));
1477 g(c);
1478 } else {
1479 orex(ll, r, 0, 0x81);
1480 oad(0xc0 | (opc << 3) | REG_VALUE(r), c);
1481 }
1482 } else {
1483 gv2(RC_INT, RC_INT);
1484 r = vtop[-1].r;
1485 fr = vtop[0].r;
1486 orex(ll, r, fr, (opc << 3) | 0x01);
1487 o(0xc0 + REG_VALUE(r) + REG_VALUE(fr) * 8);
1488 }
1489 vtop--;
1490 if (op >= TOK_ULT && op <= TOK_GT) {
1491 vtop->r = VT_CMP;
1492 vtop->c.i = op;
1493 }
1494 break;
1495 case '-':
1496 case TOK_SUBC1: /* sub with carry generation */
1497 opc = 5;
1498 goto gen_op8;
1499 case TOK_ADDC2: /* add with carry use */
1500 opc = 2;
1501 goto gen_op8;
1502 case TOK_SUBC2: /* sub with carry use */
1503 opc = 3;
1504 goto gen_op8;
1505 case '&':
1506 opc = 4;
1507 goto gen_op8;
1508 case '^':
1509 opc = 6;
1510 goto gen_op8;
1511 case '|':
1512 opc = 1;
1513 goto gen_op8;
1514 case '*':
1515 gv2(RC_INT, RC_INT);
1516 r = vtop[-1].r;
1517 fr = vtop[0].r;
1518 orex(ll, fr, r, 0xaf0f); /* imul fr, r */
1519 o(0xc0 + REG_VALUE(fr) + REG_VALUE(r) * 8);
1520 vtop--;
1521 break;
1522 case TOK_SHL:
1523 opc = 4;
1524 goto gen_shift;
1525 case TOK_SHR:
1526 opc = 5;
1527 goto gen_shift;
1528 case TOK_SAR:
1529 opc = 7;
1530 gen_shift:
1531 opc = 0xc0 | (opc << 3);
1532 if (cc) {
1533 /* constant case */
1534 vswap();
1535 r = gv(RC_INT);
1536 vswap();
1537 orex(ll, r, 0, 0xc1); /* shl/shr/sar $xxx, r */
1538 o(opc | REG_VALUE(r));
1539 g(vtop->c.i & (ll ? 63 : 31));
1540 } else {
1541 /* we generate the shift in ecx */
1542 gv2(RC_INT, RC_RCX);
1543 r = vtop[-1].r;
1544 orex(ll, r, 0, 0xd3); /* shl/shr/sar %cl, r */
1545 o(opc | REG_VALUE(r));
1546 }
1547 vtop--;
1548 break;
1549 case TOK_UDIV:
1550 case TOK_UMOD:
1551 uu = 1;
1552 goto divmod;
1553 case '/':
1554 case '%':
1555 case TOK_PDIV:
1556 uu = 0;
1557 divmod:
1558 /* first operand must be in eax */
1559 /* XXX: need better constraint for second operand */
1560 gv2(RC_RAX, RC_RCX);
1561 r = vtop[-1].r;
1562 fr = vtop[0].r;
1563 vtop--;
1564 save_reg(TREG_RDX);
1565 orex(ll, 0, 0, uu ? 0xd231 : 0x99); /* xor %edx,%edx : cqto */
1566 orex(ll, fr, 0, 0xf7); /* div fr, %eax */
1567 o((uu ? 0xf0 : 0xf8) + REG_VALUE(fr));
1568 if (op == '%' || op == TOK_UMOD)
1569 r = TREG_RDX;
1570 else
1571 r = TREG_RAX;
1572 vtop->r = r;
1573 break;
1574 default:
1575 opc = 7;
1576 goto gen_op8;
1577 }
1578 }
1579
1580 void gen_opl(int op)
1581 {
1582 gen_opi(op);
1583 }
1584
1585 /* generate a floating point operation 'v = t1 op t2' instruction. The
1586 two operands are guaranted to have the same floating point type */
1587 /* XXX: need to use ST1 and XMM1 too */
1588 void gen_opf(int op)
1589 {
1590 int a, ft, fc, swapped, r;
1591 int float_type =
1592 (vtop->type.t & VT_BTYPE) == VT_LDOUBLE ? RC_ST0 : RC_XMM0; /* to avoid xmm1 handling for now */
1593
1594 /* convert constants to memory references */
1595 if ((vtop[-1].r & (VT_VALMASK | VT_LVAL)) == VT_CONST) {
1596 vswap();
1597 gv(float_type);
1598 vswap();
1599 }
1600 if ((vtop[0].r & (VT_VALMASK | VT_LVAL)) == VT_CONST)
1601 gv(float_type);
1602
1603 /* must put at least one value in the floating point register */
1604 if ((vtop[-1].r & VT_LVAL) &&
1605 (vtop[0].r & VT_LVAL)) {
1606 vswap();
1607 gv(float_type);
1608 vswap();
1609 }
1610 swapped = 0;
1611 /* swap the stack if needed so that t1 is the register and t2 is
1612 the memory reference */
1613 if (vtop[-1].r & VT_LVAL) {
1614 vswap();
1615 swapped = 1;
1616 }
1617 if ((vtop->type.t & VT_BTYPE) == VT_LDOUBLE) {
1618 if (op >= TOK_ULT && op <= TOK_GT) {
1619 /* load on stack second operand */
1620 load(TREG_ST0, vtop);
1621 save_reg(TREG_RAX); /* eax is used by FP comparison code */
1622 if (op == TOK_GE || op == TOK_GT)
1623 swapped = !swapped;
1624 else if (op == TOK_EQ || op == TOK_NE)
1625 swapped = 0;
1626 if (swapped)
1627 o(0xc9d9); /* fxch %st(1) */
1628 o(0xe9da); /* fucompp */
1629 o(0xe0df); /* fnstsw %ax */
1630 if (op == TOK_EQ) {
1631 o(0x45e480); /* and $0x45, %ah */
1632 o(0x40fC80); /* cmp $0x40, %ah */
1633 } else if (op == TOK_NE) {
1634 o(0x45e480); /* and $0x45, %ah */
1635 o(0x40f480); /* xor $0x40, %ah */
1636 op = TOK_NE;
1637 } else if (op == TOK_GE || op == TOK_LE) {
1638 o(0x05c4f6); /* test $0x05, %ah */
1639 op = TOK_EQ;
1640 } else {
1641 o(0x45c4f6); /* test $0x45, %ah */
1642 op = TOK_EQ;
1643 }
1644 vtop--;
1645 vtop->r = VT_CMP;
1646 vtop->c.i = op;
1647 } else {
1648 /* no memory reference possible for long double operations */
1649 load(TREG_ST0, vtop);
1650 swapped = !swapped;
1651
1652 switch(op) {
1653 default:
1654 case '+':
1655 a = 0;
1656 break;
1657 case '-':
1658 a = 4;
1659 if (swapped)
1660 a++;
1661 break;
1662 case '*':
1663 a = 1;
1664 break;
1665 case '/':
1666 a = 6;
1667 if (swapped)
1668 a++;
1669 break;
1670 }
1671 ft = vtop->type.t;
1672 fc = vtop->c.ul;
1673 o(0xde); /* fxxxp %st, %st(1) */
1674 o(0xc1 + (a << 3));
1675 vtop--;
1676 }
1677 } else {
1678 if (op >= TOK_ULT && op <= TOK_GT) {
1679 /* if saved lvalue, then we must reload it */
1680 r = vtop->r;
1681 fc = vtop->c.ul;
1682 if ((r & VT_VALMASK) == VT_LLOCAL) {
1683 SValue v1;
1684 r = get_reg(RC_INT);
1685 v1.type.t = VT_PTR;
1686 v1.r = VT_LOCAL | VT_LVAL;
1687 v1.c.ul = fc;
1688 load(r, &v1);
1689 fc = 0;
1690 }
1691
1692 if (op == TOK_EQ || op == TOK_NE) {
1693 swapped = 0;
1694 } else {
1695 if (op == TOK_LE || op == TOK_LT)
1696 swapped = !swapped;
1697 if (op == TOK_LE || op == TOK_GE) {
1698 op = 0x93; /* setae */
1699 } else {
1700 op = 0x97; /* seta */
1701 }
1702 }
1703
1704 if (swapped) {
1705 o(0x7e0ff3); /* movq */
1706 gen_modrm(1, r, vtop->sym, fc);
1707
1708 if ((vtop->type.t & VT_BTYPE) == VT_DOUBLE) {
1709 o(0x66);
1710 }
1711 o(0x2e0f); /* ucomisd %xmm0, %xmm1 */
1712 o(0xc8);
1713 } else {
1714 if ((vtop->type.t & VT_BTYPE) == VT_DOUBLE) {
1715 o(0x66);
1716 }
1717 o(0x2e0f); /* ucomisd */
1718 gen_modrm(0, r, vtop->sym, fc);
1719 }
1720
1721 vtop--;
1722 vtop->r = VT_CMP;
1723 vtop->c.i = op | 0x100;
1724 } else {
1725 /* no memory reference possible for long double operations */
1726 if ((vtop->type.t & VT_BTYPE) == VT_LDOUBLE) {
1727 load(TREG_XMM0, vtop);
1728 swapped = !swapped;
1729 }
1730 switch(op) {
1731 default:
1732 case '+':
1733 a = 0;
1734 break;
1735 case '-':
1736 a = 4;
1737 break;
1738 case '*':
1739 a = 1;
1740 break;
1741 case '/':
1742 a = 6;
1743 break;
1744 }
1745 ft = vtop->type.t;
1746 fc = vtop->c.ul;
1747 if ((ft & VT_BTYPE) == VT_LDOUBLE) {
1748 o(0xde); /* fxxxp %st, %st(1) */
1749 o(0xc1 + (a << 3));
1750 } else {
1751 /* if saved lvalue, then we must reload it */
1752 r = vtop->r;
1753 if ((r & VT_VALMASK) == VT_LLOCAL) {
1754 SValue v1;
1755 r = get_reg(RC_INT);
1756 v1.type.t = VT_PTR;
1757 v1.r = VT_LOCAL | VT_LVAL;
1758 v1.c.ul = fc;
1759 load(r, &v1);
1760 fc = 0;
1761 }
1762 if (swapped) {
1763 /* movq %xmm0,%xmm1 */
1764 o(0x7e0ff3);
1765 o(0xc8);
1766 load(TREG_XMM0, vtop);
1767 /* subsd %xmm1,%xmm0 (f2 0f 5c c1) */
1768 if ((ft & VT_BTYPE) == VT_DOUBLE) {
1769 o(0xf2);
1770 } else {
1771 o(0xf3);
1772 }
1773 o(0x0f);
1774 o(0x58 + a);
1775 o(0xc1);
1776 } else {
1777 if ((ft & VT_BTYPE) == VT_DOUBLE) {
1778 o(0xf2);
1779 } else {
1780 o(0xf3);
1781 }
1782 o(0x0f);
1783 o(0x58 + a);
1784 gen_modrm(0, r, vtop->sym, fc);
1785 }
1786 }
1787 vtop--;
1788 }
1789 }
1790 }
1791
1792 /* convert integers to fp 't' type. Must handle 'int', 'unsigned int'
1793 and 'long long' cases. */
1794 void gen_cvt_itof(int t)
1795 {
1796 if ((t & VT_BTYPE) == VT_LDOUBLE) {
1797 save_reg(TREG_ST0);
1798 gv(RC_INT);
1799 if ((vtop->type.t & VT_BTYPE) == VT_LLONG) {
1800 /* signed long long to float/double/long double (unsigned case
1801 is handled generically) */
1802 o(0x50 + (vtop->r & VT_VALMASK)); /* push r */
1803 o(0x242cdf); /* fildll (%rsp) */
1804 o(0x08c48348); /* add $8, %rsp */
1805 } else if ((vtop->type.t & (VT_BTYPE | VT_UNSIGNED)) ==
1806 (VT_INT | VT_UNSIGNED)) {
1807 /* unsigned int to float/double/long double */
1808 o(0x6a); /* push $0 */
1809 g(0x00);
1810 o(0x50 + (vtop->r & VT_VALMASK)); /* push r */
1811 o(0x242cdf); /* fildll (%rsp) */
1812 o(0x10c48348); /* add $16, %rsp */
1813 } else {
1814 /* int to float/double/long double */
1815 o(0x50 + (vtop->r & VT_VALMASK)); /* push r */
1816 o(0x2404db); /* fildl (%rsp) */
1817 o(0x08c48348); /* add $8, %rsp */
1818 }
1819 vtop->r = TREG_ST0;
1820 } else {
1821 save_reg(TREG_XMM0);
1822 gv(RC_INT);
1823 o(0xf2 + ((t & VT_BTYPE) == VT_FLOAT));
1824 if ((vtop->type.t & (VT_BTYPE | VT_UNSIGNED)) ==
1825 (VT_INT | VT_UNSIGNED) ||
1826 (vtop->type.t & VT_BTYPE) == VT_LLONG) {
1827 o(0x48); /* REX */
1828 }
1829 o(0x2a0f);
1830 o(0xc0 + (vtop->r & VT_VALMASK)); /* cvtsi2sd */
1831 vtop->r = TREG_XMM0;
1832 }
1833 }
1834
1835 /* convert from one floating point type to another */
1836 void gen_cvt_ftof(int t)
1837 {
1838 int ft, bt, tbt;
1839
1840 ft = vtop->type.t;
1841 bt = ft & VT_BTYPE;
1842 tbt = t & VT_BTYPE;
1843
1844 if (bt == VT_FLOAT) {
1845 gv(RC_XMM0); /* to avoid rewriting to handle xmm1 for now */
1846 if (tbt == VT_DOUBLE) {
1847 o(0xc0140f); /* unpcklps */
1848 o(0xc05a0f); /* cvtps2pd */
1849 } else if (tbt == VT_LDOUBLE) {
1850 /* movss %xmm0,-0x10(%rsp) */
1851 o(0x44110ff3);
1852 o(0xf024);
1853 o(0xf02444d9); /* flds -0x10(%rsp) */
1854 vtop->r = TREG_ST0;
1855 }
1856 } else if (bt == VT_DOUBLE) {
1857 gv(RC_XMM0); /* to avoid rewriting to handle xmm1 for now */
1858 if (tbt == VT_FLOAT) {
1859 o(0xc0140f66); /* unpcklpd */
1860 o(0xc05a0f66); /* cvtpd2ps */
1861 } else if (tbt == VT_LDOUBLE) {
1862 /* movsd %xmm0,-0x10(%rsp) */
1863 o(0x44110ff2);
1864 o(0xf024);
1865 o(0xf02444dd); /* fldl -0x10(%rsp) */
1866 vtop->r = TREG_ST0;
1867 }
1868 } else {
1869 gv(RC_ST0);
1870 if (tbt == VT_DOUBLE) {
1871 o(0xf0245cdd); /* fstpl -0x10(%rsp) */
1872 /* movsd -0x10(%rsp),%xmm0 */
1873 o(0x44100ff2);
1874 o(0xf024);
1875 vtop->r = TREG_XMM0;
1876 } else if (tbt == VT_FLOAT) {
1877 o(0xf0245cd9); /* fstps -0x10(%rsp) */
1878 /* movss -0x10(%rsp),%xmm0 */
1879 o(0x44100ff3);
1880 o(0xf024);
1881 vtop->r = TREG_XMM0;
1882 }
1883 }
1884 }
1885
1886 /* convert fp to int 't' type */
1887 void gen_cvt_ftoi(int t)
1888 {
1889 int ft, bt, size, r;
1890 ft = vtop->type.t;
1891 bt = ft & VT_BTYPE;
1892 if (bt == VT_LDOUBLE) {
1893 gen_cvt_ftof(VT_DOUBLE);
1894 bt = VT_DOUBLE;
1895 }
1896
1897 gv(RC_XMM0);
1898 if (t != VT_INT)
1899 size = 8;
1900 else
1901 size = 4;
1902
1903 r = get_reg(RC_INT);
1904 if (bt == VT_FLOAT) {
1905 o(0xf3);
1906 } else if (bt == VT_DOUBLE) {
1907 o(0xf2);
1908 } else {
1909 assert(0);
1910 }
1911 orex(size == 8, r, 0, 0x2c0f); /* cvttss2si or cvttsd2si */
1912 o(0xc0 + (REG_VALUE(r) << 3));
1913 vtop->r = r;
1914 }
1915
1916 /* computed goto support */
1917 void ggoto(void)
1918 {
1919 gcall_or_jmp(1);
1920 vtop--;
1921 }
1922
1923 /* end of x86-64 code generator */
1924 /*************************************************************/
1925 #endif /* ! TARGET_DEFS_ONLY */
1926 /******************************************************/
Tiny C Compiler main repository