| blob | 9db903d47ab78e531aaa22f81ce71a686d0e6391 |
1 ;;;; a bunch of handy macros for the x86
3 ;;;; This software is part of the SBCL system. See the README file for
4 ;;;; more information.
5 ;;;;
6 ;;;; This software is derived from the CMU CL system, which was
7 ;;;; written at Carnegie Mellon University and released into the
8 ;;;; public domain. The software is in the public domain and is
9 ;;;; provided with absolutely no warranty. See the COPYING and CREDITS
10 ;;;; files for more information.
14 ;;; We can load/store into fp registers through the top of stack
15 ;;; %st(0) (fr0 here). Loads imply a push to an empty register which
16 ;;; then changes all the reg numbers. These macros help manage that.
18 ;;; Use this when we don't have to load anything. It preserves old tos
19 ;;; value, but probably destroys tn with operation.
24 ,@body
28 ;;; Use this to prepare for load of new value from memory. This
29 ;;; changes the register numbering so the next instruction had better
30 ;;; be a FP load from memory; a register load from another register
31 ;;; will probably be loading the wrong register!
35 ,@body
38 \f
39 ;;;; instruction-like macros
42 #!+sb-doc
43 "Move SRC into DST unless they are location=."
64 \f
65 ;;;; macros to generate useful values
89 #!+sb-doc
90 "Loads the type bits of a pointer into target independent of
91 byte-ordering issues."
96 (:little-endian
99 (:big-endian
102 \f
103 ;;;; allocation helpers
105 ;;; Two allocation approaches are implemented. A call into C can be
106 ;;; used, and in that case special care can be taken to disable
107 ;;; interrupts. Alternatively with gencgc inline allocation is possible
108 ;;; although it isn't interrupt safe.
110 ;;; For GENCGC it is possible to inline object allocation, to permit
111 ;;; this set the following variable to True.
112 ;;;
113 ;;; FIXME: The comment above says that this isn't interrupt safe. Is that
114 ;;; right? If so, do we want to do this? And surely we don't want to do this by
115 ;;; default? How much time does it save to do this? Is it any different in the
116 ;;; current CMU CL version instead of the one that I grabbed in 1998?
117 ;;; (Later observation: In order to be interrupt safe, it'd probably
118 ;;; have to use PSEUDO-ATOMIC, so it's probably not -- yuck. Try benchmarks
119 ;;; with and without inline allocation, and unless the inline allocation
120 ;;; wins by a whole lot, it's not likely to be worth messing with. If
121 ;;; we want to hack up memory allocation for performance, effort spent
122 ;;; on DYNAMIC-EXTENT would probably give a better payoff.)
125 ;;; Emit code to allocate an object with a size in bytes given by
126 ;;; Size. The size may be an integer of a TN. If Inline is a VOP
127 ;;; node-var then it is used to make an appropriate speed vs size
128 ;;; decision.
129 ;;;
130 ;;; FIXME: We call into C.. except when inline allocation is enabled..?
131 ;;;
132 ;;; FIXME: Also, calls to
133 ;;; ALLOCATION are always wrapped with PSEUDO-ATOMIC -- why? Is it to
134 ;;; make sure that no GC happens between the time of allocation and the
135 ;;; time that the allocated memory has its tag bits set correctly?
136 ;;; If so, then ALLOCATION itself might as well set the PSEUDO-ATOMIC
137 ;;; bits, so that the caller need only clear them. Check whether it's
138 ;;; true that every ALLOCATION is surrounded by PSEUDO-ATOMIC, and
139 ;;; that every PSEUDO-ATOMIC contains a single ALLOCATION, which is
140 ;;; its first instruction. If so, the connection should probably be
141 ;;; formalized, in documentation and in macro definition,
142 ;;; with the macro becoming e.g. PSEUDO-ATOMIC-ALLOCATION.
148 ;; C call to allocate via dispatch routines. Each
149 ;; destination has a special entry point. The size may be a
150 ;; register or a constant.
152 (#.eax-offset
162 (#.ecx-offset
172 (#.edx-offset
182 (#.ebx-offset
192 (#.esi-offset
202 (#.edi-offset
214 ;;; Allocate an other-pointer object of fixed SIZE with a single word
215 ;;; header having the specified WIDETAG value. The result is placed in
216 ;;; RESULT-TN.
226 \f
227 ;;;; error code
232 ;; The return PC points here; note the location for the debugger.
241 ;; classic CMU CL comment:
242 ;; zzzzz jrd here. tn-offset is zero for constant
243 ;; tns.
249 values)
255 #!+sb-doc
256 "Cause an error. ERROR-CODE is the error to cause."
260 ;;; not used in SBCL
261 #|
263 #!+sb-doc
264 "Cause a continuable error. If the error is continued, execution resumes
265 at LABEL."
269 |#
272 #!+sb-doc
273 "Generate-Error-Code Error-code Value*
274 Emit code for an error with the specified Error-Code and context Values."
279 start-lab)))
281 ;;; not used in SBCL
282 #|
284 #!+sb-doc
285 "Generate-CError-Code Error-code Value*
286 Emit code for a continuable error with the specified Error-Code and
287 context Values. If the error is continued, execution resumes after
288 the GENERATE-CERROR-CODE form."
298 |#
299 \f
300 ;;;; PSEUDO-ATOMIC
302 ;;; FIXME: *PSEUDO-ATOMIC-FOO* could be made into *PSEUDO-ATOMIC-BITS*,
303 ;;; set with a single operation and cleared with SHR *PSEUDO-ATOMIC-BITS*,-2;
304 ;;; the ATOMIC bit is bit 0, the INTERRUPTED bit is bit 1, and you check
305 ;;; the C flag after the shift to see whether you were interrupted.
307 ;;; FIXME: It appears that PSEUDO-ATOMIC is used to wrap operations which leave
308 ;;; untagged memory lying around, but some documentation would be nice.
312 ;; FIXME: The MAKE-EA noise should become a MACROLET macro or
313 ;; something. (perhaps SVLB, for static variable low byte)
318 ;; FIXME: Use mask, not minus, to
319 ;; take out type bits.
328 ,@forms
335 ;; KLUDGE: Is there any requirement for interrupts to be
336 ;; handled in order? It seems as though an interrupt coming
337 ;; in at this point will be executed before any pending interrupts.
338 ;; Or do incoming interrupts check to see whether any interrupts
339 ;; are pending? I wish I could find the documentation for
340 ;; pseudo-atomics.. -- WHN 19991130
349 ;; if PAI was set, interrupts were disabled at the same time
350 ;; using the process signal mask.
353 \f
354 ;;;; indexed references
400 value)
416 value)