src/runtime/x86-64-arch.c

   1 /*
   2  * This software is part of the SBCL system. See the README file for
   3  * more information.
   4  *
   5  * This software is derived from the CMU CL system, which was
   6  * written at Carnegie Mellon University and released into the
   7  * public domain. The software is in the public domain and is
   8  * provided with absolutely no warranty. See the COPYING and CREDITS
   9  * files for more information.
  10  */
  11
  12 #include <stdio.h>
  13
  14 #include "sbcl.h"
  15 #include "runtime.h"
  16 #include "globals.h"
  17 #include "validate.h"
  18 #include "os.h"
  19 #include "sbcl.h"
  20 #include "arch.h"
  21 #include "lispregs.h"
  22 #include "signal.h"
  23 #include "alloc.h"
  24 #include "interrupt.h"
  25 #include "interr.h"
  26 #include "breakpoint.h"
  27 #include "thread.h"
  28 #include "pseudo-atomic.h"
  29
  30 #include "genesis/static-symbols.h"
  31 #include "genesis/symbol.h"
  32
  33 #define BREAKPOINT_INST 0xcc    /* INT3 */
  34 #define UD2_INST 0x0b0f         /* UD2 */
  35
  36 #ifndef LISP_FEATURE_UD2_BREAKPOINTS
  37 #define BREAKPOINT_WIDTH 1
  38 #else
  39 #define BREAKPOINT_WIDTH 2
  40 #endif
  41
  42 unsigned long fast_random_state = 1;
  43
  44 void arch_init(void)
  45 {}
  46
  47 os_vm_address_t
  48 arch_get_bad_addr(int sig, siginfo_t *code, os_context_t *context)
  49 {
  50     return (os_vm_address_t)code->si_addr;
  51 }
  52
  53 \f
  54 /*
  55  * hacking signal contexts
  56  *
  57  * (This depends both on architecture, which determines what we might
  58  * want to get to, and on OS, which determines how we get to it.)
  59  */
  60
  61 os_context_register_t *
  62 context_eflags_addr(os_context_t *context)
  63 {
  64 #if defined __linux__ || defined __sun
  65     /* KLUDGE: As of kernel 2.2.14 on Red Hat 6.2, there's code in the
  66      * <sys/ucontext.h> file to define symbolic names for offsets into
  67      * gregs[], but it's conditional on __USE_GNU and not defined, so
  68      * we need to do this nasty absolute index magic number thing
  69      * instead. */
  70     return &context->uc_mcontext.gregs[17];
  71 #elif defined __FreeBSD__
  72     return &context->uc_mcontext.mc_rflags;
  73 #elif defined LISP_FEATURE_DARWIN
  74     return CONTEXT_ADDR_FROM_STEM(rflags);
  75 #elif defined __OpenBSD__
  76     return &context->sc_rflags;
  77 #elif defined __NetBSD__
  78     return CONTEXT_ADDR_FROM_STEM(RFLAGS);
  79 #else
  80 #error unsupported OS
  81 #endif
  82 }
  83 \f
  84 void arch_skip_instruction(os_context_t *context)
  85 {
  86     /* Assuming we get here via an INT3 xxx instruction, the PC now
  87      * points to the interrupt code (a Lisp value) so we just move
  88      * past it. Skip the code; after that, if the code is an
  89      * error-trap or cerror-trap then skip the data bytes that follow. */
  90
  91     int vlen;
  92     long code;
  93
  94
  95     /* Get and skip the Lisp interrupt code. */
  96     code = *(char*)(*os_context_pc_addr(context))++;
  97     switch (code)
  98         {
  99         case trap_Error:
 100         case trap_Cerror:
 101             /* Lisp error arg vector length */
 102             vlen = *(char*)(*os_context_pc_addr(context))++;
 103             /* Skip Lisp error arg data bytes. */
 104             while (vlen-- > 0) {
 105                 ++*os_context_pc_addr(context);
 106             }
 107             break;
 108
 109         case trap_Breakpoint:           /* not tested */
 110         case trap_FunEndBreakpoint: /* not tested */
 111             break;
 112
 113 #ifdef LISP_FEATURE_SB_SAFEPOINT
 114         case trap_GlobalSafepoint:
 115         case trap_CspSafepoint:
 116 #endif
 117         case trap_PendingInterrupt:
 118         case trap_Halt:
 119         case trap_SingleStepAround:
 120         case trap_SingleStepBefore:
 121             /* only needed to skip the Code */
 122             break;
 123
 124         default:
 125             fprintf(stderr,"[arch_skip_inst invalid code %ld\n]\n",code);
 126             break;
 127         }
 128
 129     FSHOW((stderr,
 130            "/[arch_skip_inst resuming at %x]\n",
 131            *os_context_pc_addr(context)));
 132 }
 133
 134 unsigned char *
 135 arch_internal_error_arguments(os_context_t *context)
 136 {
 137     return 1 + (unsigned char *)(*os_context_pc_addr(context));
 138 }
 139
 140 boolean
 141 arch_pseudo_atomic_atomic(os_context_t *context)
 142 {
 143     return get_pseudo_atomic_atomic(arch_os_get_current_thread());
 144 }
 145
 146 void
 147 arch_set_pseudo_atomic_interrupted(os_context_t *context)
 148 {
 149     struct thread *thread = arch_os_get_current_thread();
 150     set_pseudo_atomic_interrupted(thread);
 151 }
 152
 153 void
 154 arch_clear_pseudo_atomic_interrupted(os_context_t *context)
 155 {
 156     struct thread *thread = arch_os_get_current_thread();
 157     clear_pseudo_atomic_interrupted(thread);
 158 }
 159 \f
 160 /*
 161  * This stuff seems to get called for TRACE and debug activity.
 162  */
 163
 164 unsigned int
 165 arch_install_breakpoint(void *pc)
 166 {
 167     unsigned int result = *(unsigned int*)pc;
 168
 169 #ifndef LISP_FEATURE_UD2_BREAKPOINTS
 170     *(char*)pc = BREAKPOINT_INST;               /* x86 INT3       */
 171     *((char*)pc+1) = trap_Breakpoint;           /* Lisp trap code */
 172 #else
 173     *(char*)pc = UD2_INST & 0xff;
 174     *((char*)pc+1) = UD2_INST >> 8;
 175     *((char*)pc+2) = trap_Breakpoint;
 176 #endif
 177
 178     return result;
 179 }
 180
 181 void
 182 arch_remove_breakpoint(void *pc, unsigned int orig_inst)
 183 {
 184     *((char *)pc) = orig_inst & 0xff;
 185     *((char *)pc + 1) = (orig_inst & 0xff00) >> 8;
 186 #if BREAKPOINT_WIDTH > 1
 187     *((char *)pc + 2) = (orig_inst & 0xff0000) >> 16;
 188 #endif
 189 }
 190 \f
 191 /* When single stepping, single_stepping holds the original instruction
 192  * PC location. */
 193 unsigned int *single_stepping = NULL;
 194 #ifdef CANNOT_GET_TO_SINGLE_STEP_FLAG
 195 unsigned int  single_step_save1;
 196 unsigned int  single_step_save2;
 197 unsigned int  single_step_save3;
 198 #endif
 199
 200 void
 201 arch_do_displaced_inst(os_context_t *context, unsigned int orig_inst)
 202 {
 203     unsigned int *pc = (unsigned int*)(*os_context_pc_addr(context));
 204
 205     /* Put the original instruction back. */
 206     arch_remove_breakpoint(pc, orig_inst);
 207
 208 #ifdef CANNOT_GET_TO_SINGLE_STEP_FLAG
 209     /* Install helper instructions for the single step:
 210      * pushf; or [esp],0x100; popf. */
 211     single_step_save1 = *(pc-3);
 212     single_step_save2 = *(pc-2);
 213     single_step_save3 = *(pc-1);
 214     *(pc-3) = 0x9c909090;
 215     *(pc-2) = 0x00240c81;
 216     *(pc-1) = 0x9d000001;
 217 #else
 218     *context_eflags_addr(context) |= 0x100;
 219 #endif
 220
 221     single_stepping = pc;
 222
 223 #ifdef CANNOT_GET_TO_SINGLE_STEP_FLAG
 224     *os_context_pc_addr(context) = (os_context_register_t)((char *)pc - 9);
 225 #endif
 226 }
 227
 228 void
 229 arch_handle_breakpoint(os_context_t *context)
 230 {
 231     *os_context_pc_addr(context) -= BREAKPOINT_WIDTH;
 232     handle_breakpoint(context);
 233 }
 234
 235 void
 236 arch_handle_fun_end_breakpoint(os_context_t *context)
 237 {
 238     *os_context_pc_addr(context) -= BREAKPOINT_WIDTH;
 239     *os_context_pc_addr(context) =
 240         (unsigned long)handle_fun_end_breakpoint(context);
 241 }
 242
 243 void
 244 arch_handle_single_step_trap(os_context_t *context, int trap)
 245 {
 246     arch_skip_instruction(context);
 247     /* On x86-64 the fdefn / function is always in RAX, so we pass
 248      * 0 as the register_offset. */
 249     handle_single_step_trap(context, trap, 0);
 250 }
 251
 252 \f
 253 void
 254 sigtrap_handler(int signal, siginfo_t *info, os_context_t *context)
 255 {
 256     unsigned int trap;
 257
 258     if (single_stepping) {
 259 #ifdef CANNOT_GET_TO_SINGLE_STEP_FLAG
 260         /* Un-install single step helper instructions. */
 261         *(single_stepping-3) = single_step_save1;
 262         *(single_stepping-2) = single_step_save2;
 263         *(single_stepping-1) = single_step_save3;
 264 #else
 265         *context_eflags_addr(context) ^= 0x100;
 266 #endif
 267         /* Re-install the breakpoint if possible. */
 268         if (((char *)*os_context_pc_addr(context) >
 269              (char *)single_stepping) &&
 270             ((char *)*os_context_pc_addr(context) <=
 271              (char *)single_stepping + BREAKPOINT_WIDTH)) {
 272             fprintf(stderr, "warning: couldn't reinstall breakpoint\n");
 273         } else {
 274             arch_install_breakpoint(single_stepping);
 275         }
 276
 277         single_stepping = NULL;
 278         return;
 279     }
 280
 281     /* This is just for info in case the monitor wants to print an
 282      * approximation. */
 283     access_control_stack_pointer(arch_os_get_current_thread()) =
 284         (lispobj *)*os_context_sp_addr(context);
 285
 286     /* On entry %eip points just after the INT3 byte and aims at the
 287      * 'kind' value (eg trap_Cerror). For error-trap and Cerror-trap a
 288      * number of bytes will follow, the first is the length of the byte
 289      * arguments to follow. */
 290     trap = *(unsigned char *)(*os_context_pc_addr(context));
 291
 292     handle_trap(context, trap);
 293 }
 294
 295 void
 296 sigill_handler(int signal, siginfo_t *siginfo, os_context_t *context) {
 297     /* Triggering SIGTRAP using int3 is unreliable on OS X/x86, so
 298      * we need to use illegal instructions for traps.
 299      */
 300 #if defined(LISP_FEATURE_UD2_BREAKPOINTS) && !defined(LISP_FEATURE_MACH_EXCEPTION_HANDLER)
 301     if (*((unsigned short *)*os_context_pc_addr(context)) == UD2_INST) {
 302         *os_context_pc_addr(context) += 2;
 303         return sigtrap_handler(signal, siginfo, context);
 304     }
 305 #endif
 306
 307     fake_foreign_function_call(context);
 308     lose("Unhandled SIGILL.");
 309 }
 310
 311 #ifdef X86_64_SIGFPE_FIXUP
 312 #define MXCSR_IE (0x01)         /* Invalid Operation */
 313 #define MXCSR_DE (0x02)         /* Denormal */
 314 #define MXCSR_ZE (0x04)         /* Devide-by-Zero */
 315 #define MXCSR_OE (0x08)         /* Overflow */
 316 #define MXCSR_UE (0x10)         /* Underflow */
 317 #define MXCSR_PE (0x20)         /* Precision */
 318
 319 static inline int
 320 mxcsr_to_code(unsigned int mxcsr)
 321 {
 322     /* Extract unmasked exception bits. */
 323     mxcsr &= ~(mxcsr >> 7) & 0x3F;
 324
 325     /* This order is defined at "Intel 64 and IA-32 Architectures
 326      * Software Developerfs Manual" Volume 1: "Basic Architecture",
 327      * 4.9.2 "Floating-Point Exception Priority". */
 328     if (mxcsr & MXCSR_IE)
 329         return FPE_FLTINV;
 330     else if (mxcsr & MXCSR_ZE)
 331         return FPE_FLTDIV;
 332     else if (mxcsr & MXCSR_DE)
 333         return FPE_FLTUND;
 334     else if (mxcsr & MXCSR_OE)
 335         return FPE_FLTOVF;
 336     else if (mxcsr & MXCSR_UE)
 337         return FPE_FLTUND;
 338     else if (mxcsr & MXCSR_PE)
 339         return FPE_FLTRES;
 340
 341     return 0;
 342 }
 343
 344 static void
 345 sigfpe_handler(int signal, siginfo_t *siginfo, os_context_t *context)
 346 {
 347     unsigned int *mxcsr = arch_os_context_mxcsr_addr(context);
 348
 349     if (siginfo->si_code == 0) { /* XMM exception */
 350         siginfo->si_code = mxcsr_to_code(*mxcsr);
 351
 352         /* Clear sticky exception flag. */
 353         *mxcsr &= ~0x3F;
 354     }
 355
 356     interrupt_handle_now(signal, siginfo, context);
 357 }
 358 #endif
 359
 360 void
 361 arch_install_interrupt_handlers()
 362 {
 363     SHOW("entering arch_install_interrupt_handlers()");
 364
 365     /* Note: The old CMU CL code here used sigtrap_handler() to handle
 366      * SIGILL as well as SIGTRAP. I couldn't see any reason to do
 367      * things that way. So, I changed to separate handlers when
 368      * debugging a problem on OpenBSD, where SBCL wasn't catching
 369      * SIGILL properly, but was instead letting the process be
 370      * terminated with an "Illegal instruction" output. If this change
 371      * turns out to break something (maybe breakpoint handling on some
 372      * OS I haven't tested on?) and we have to go back to the old CMU
 373      * CL way, I hope there will at least be a comment to explain
 374      * why.. -- WHN 2001-06-07 */
 375 #if !defined(LISP_FEATURE_MACH_EXCEPTION_HANDLER)
 376     undoably_install_low_level_interrupt_handler(SIGILL , sigill_handler);
 377     undoably_install_low_level_interrupt_handler(SIGTRAP, sigtrap_handler);
 378 #endif
 379
 380 #ifdef X86_64_SIGFPE_FIXUP
 381     undoably_install_low_level_interrupt_handler(SIGFPE, sigfpe_handler);
 382 #endif
 383
 384     SHOW("returning from arch_install_interrupt_handlers()");
 385 }
 386 \f
 387 #ifdef LISP_FEATURE_LINKAGE_TABLE
 388 /* FIXME: It might be cleaner to generate these from the lisp side of
 389  * things.
 390  */
 391
 392 void
 393 arch_write_linkage_table_jmp(char * reloc, void * fun)
 394 {
 395     unsigned long addr = (unsigned long) fun;
 396     int i;
 397
 398     *reloc++ = 0xFF; /* Opcode for near jump to absolute reg/mem64. */
 399     *reloc++ = 0x25; /* ModRM #b00 100 101, i.e. RIP-relative. */
 400     *reloc++ = 0x00; /* 32-bit displacement field = 0 */
 401     *reloc++ = 0x00; /* ... */
 402     *reloc++ = 0x00; /* ... */
 403     *reloc++ = 0x00; /* ... */
 404
 405     for (i = 0; i < 8; i++) {
 406         *reloc++ = addr & 0xff;
 407         addr >>= 8;
 408     }
 409
 410     /* write a nop for good measure. */
 411     *reloc = 0x90;
 412 }
 413
 414 void
 415 arch_write_linkage_table_ref(void * reloc, void * data)
 416 {
 417     *(unsigned long *)reloc = (unsigned long)data;
 418 }
 419
 420 #endif
 421
 422 /* These setup and check *both* the sse2 and x87 FPUs. While lisp code
 423    only uses the sse2 FPU, other code (such as libc) may use the x87 FPU.
 424  */
 425
 426 unsigned int
 427 arch_get_fp_modes()
 428 {
 429     unsigned int temp;
 430     unsigned int result;
 431     /* return the x87 exception flags ored in with the sse2
 432      * control+status flags */
 433     asm ("fnstsw %0" : "=m" (temp));
 434     result = temp;
 435     result &= 0x3F;
 436     asm ("stmxcsr %0" : "=m" (temp));
 437     result |= temp;
 438     /* flip exception mask bits */
 439     return result ^ (0x3F << 7);
 440 }
 441
 442 struct fpenv
 443 {
 444     unsigned short cw;
 445     unsigned short unused1;
 446     unsigned short sw;
 447     unsigned short unused2;
 448     unsigned int other_regs[5];
 449 };
 450
 451 void
 452 arch_set_fp_modes(unsigned int mxcsr)
 453 {
 454     struct fpenv f_env;
 455     unsigned int temp;
 456
 457     /* turn trap enable bits into exception mask */
 458     mxcsr ^= 0x3F << 7;
 459
 460     /* set x87 modes */
 461     asm ("fnstenv %0" : "=m" (f_env));
 462     /* set control word: always long double precision
 463      * get traps and rounding from mxcsr word */
 464     f_env.cw = 0x300 | ((mxcsr >> 7) & 0x3F) | (((mxcsr >> 13) & 0x3) << 10);
 465     /* set status word: only override exception flags, from mxcsr */
 466     f_env.sw &= ~0x3F;
 467     f_env.sw |= (mxcsr & 0x3F);
 468
 469     asm ("fldenv %0" : : "m" (f_env));
 470
 471     /* now, simply, load up the mxcsr register */
 472     temp = mxcsr;
 473     asm ("ldmxcsr %0" : : "m" (temp));
 474 }