?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
change debug_out format of addr to JZ_FMT_plx
[qemu/qemu-JZ.git] / linux-user / vm86.c
blob80ee25b601c95d734bd1ab2c9f4f9ddb808487e2
1 /*
2 * vm86 linux syscall support
3 *
4 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 * MA 02110-1301, USA.
20 */
21 #include <stdlib.h>
22 #include <stdio.h>
23 #include <stdarg.h>
24 #include <string.h>
25 #include <errno.h>
26 #include <unistd.h>
27
28 #include "qemu.h"
29
30 //#define DEBUG_VM86
31
32 #define set_flags(X,new,mask) \
33 ((X) = ((X) & ~(mask)) | ((new) & (mask)))
34
35 #define SAFE_MASK (0xDD5)
36 #define RETURN_MASK (0xDFF)
37
38 static inline int is_revectored(int nr, struct target_revectored_struct *bitmap)
39 {
40 return (((uint8_t *)bitmap)[nr >> 3] >> (nr & 7)) & 1;
41 }
42
43 static inline void vm_putw(uint32_t segptr, unsigned int reg16, unsigned int val)
44 {
45 stw(segptr + (reg16 & 0xffff), val);
46 }
47
48 static inline void vm_putl(uint32_t segptr, unsigned int reg16, unsigned int val)
49 {
50 stl(segptr + (reg16 & 0xffff), val);
51 }
52
53 static inline unsigned int vm_getb(uint32_t segptr, unsigned int reg16)
54 {
55 return ldub(segptr + (reg16 & 0xffff));
56 }
57
58 static inline unsigned int vm_getw(uint32_t segptr, unsigned int reg16)
59 {
60 return lduw(segptr + (reg16 & 0xffff));
61 }
62
63 static inline unsigned int vm_getl(uint32_t segptr, unsigned int reg16)
64 {
65 return ldl(segptr + (reg16 & 0xffff));
66 }
67
68 void save_v86_state(CPUX86State *env)
69 {
70 TaskState *ts = env->opaque;
71 struct target_vm86plus_struct * target_v86;
72
73 if (!lock_user_struct(VERIFY_WRITE, target_v86, ts->target_v86, 0))
74 /* FIXME - should return an error */
75 return;
76 /* put the VM86 registers in the userspace register structure */
77 target_v86->regs.eax = tswap32(env->regs[R_EAX]);
78 target_v86->regs.ebx = tswap32(env->regs[R_EBX]);
79 target_v86->regs.ecx = tswap32(env->regs[R_ECX]);
80 target_v86->regs.edx = tswap32(env->regs[R_EDX]);
81 target_v86->regs.esi = tswap32(env->regs[R_ESI]);
82 target_v86->regs.edi = tswap32(env->regs[R_EDI]);
83 target_v86->regs.ebp = tswap32(env->regs[R_EBP]);
84 target_v86->regs.esp = tswap32(env->regs[R_ESP]);
85 target_v86->regs.eip = tswap32(env->eip);
86 target_v86->regs.cs = tswap16(env->segs[R_CS].selector);
87 target_v86->regs.ss = tswap16(env->segs[R_SS].selector);
88 target_v86->regs.ds = tswap16(env->segs[R_DS].selector);
89 target_v86->regs.es = tswap16(env->segs[R_ES].selector);
90 target_v86->regs.fs = tswap16(env->segs[R_FS].selector);
91 target_v86->regs.gs = tswap16(env->segs[R_GS].selector);
92 set_flags(env->eflags, ts->v86flags, VIF_MASK | ts->v86mask);
93 target_v86->regs.eflags = tswap32(env->eflags);
94 unlock_user_struct(target_v86, ts->target_v86, 1);
95 #ifdef DEBUG_VM86
96 fprintf(logfile, "save_v86_state: eflags=%08x cs:ip=%04x:%04x\n",
97 env->eflags, env->segs[R_CS].selector, env->eip);
98 #endif
99
100 /* restore 32 bit registers */
101 env->regs[R_EAX] = ts->vm86_saved_regs.eax;
102 env->regs[R_EBX] = ts->vm86_saved_regs.ebx;
103 env->regs[R_ECX] = ts->vm86_saved_regs.ecx;
104 env->regs[R_EDX] = ts->vm86_saved_regs.edx;
105 env->regs[R_ESI] = ts->vm86_saved_regs.esi;
106 env->regs[R_EDI] = ts->vm86_saved_regs.edi;
107 env->regs[R_EBP] = ts->vm86_saved_regs.ebp;
108 env->regs[R_ESP] = ts->vm86_saved_regs.esp;
109 env->eflags = ts->vm86_saved_regs.eflags;
110 env->eip = ts->vm86_saved_regs.eip;
111
112 cpu_x86_load_seg(env, R_CS, ts->vm86_saved_regs.cs);
113 cpu_x86_load_seg(env, R_SS, ts->vm86_saved_regs.ss);
114 cpu_x86_load_seg(env, R_DS, ts->vm86_saved_regs.ds);
115 cpu_x86_load_seg(env, R_ES, ts->vm86_saved_regs.es);
116 cpu_x86_load_seg(env, R_FS, ts->vm86_saved_regs.fs);
117 cpu_x86_load_seg(env, R_GS, ts->vm86_saved_regs.gs);
118 }
119
120 /* return from vm86 mode to 32 bit. The vm86() syscall will return
121 'retval' */
122 static inline void return_to_32bit(CPUX86State *env, int retval)
123 {
124 #ifdef DEBUG_VM86
125 fprintf(logfile, "return_to_32bit: ret=0x%x\n", retval);
126 #endif
127 save_v86_state(env);
128 env->regs[R_EAX] = retval;
129 }
130
131 static inline int set_IF(CPUX86State *env)
132 {
133 TaskState *ts = env->opaque;
134
135 ts->v86flags |= VIF_MASK;
136 if (ts->v86flags & VIP_MASK) {
137 return_to_32bit(env, TARGET_VM86_STI);
138 return 1;
139 }
140 return 0;
141 }
142
143 static inline void clear_IF(CPUX86State *env)
144 {
145 TaskState *ts = env->opaque;
146
147 ts->v86flags &= ~VIF_MASK;
148 }
149
150 static inline void clear_TF(CPUX86State *env)
151 {
152 env->eflags &= ~TF_MASK;
153 }
154
155 static inline void clear_AC(CPUX86State *env)
156 {
157 env->eflags &= ~AC_MASK;
158 }
159
160 static inline int set_vflags_long(unsigned long eflags, CPUX86State *env)
161 {
162 TaskState *ts = env->opaque;
163
164 set_flags(ts->v86flags, eflags, ts->v86mask);
165 set_flags(env->eflags, eflags, SAFE_MASK);
166 if (eflags & IF_MASK)
167 return set_IF(env);
168 else
169 clear_IF(env);
170 return 0;
171 }
172
173 static inline int set_vflags_short(unsigned short flags, CPUX86State *env)
174 {
175 TaskState *ts = env->opaque;
176
177 set_flags(ts->v86flags, flags, ts->v86mask & 0xffff);
178 set_flags(env->eflags, flags, SAFE_MASK);
179 if (flags & IF_MASK)
180 return set_IF(env);
181 else
182 clear_IF(env);
183 return 0;
184 }
185
186 static inline unsigned int get_vflags(CPUX86State *env)
187 {
188 TaskState *ts = env->opaque;
189 unsigned int flags;
190
191 flags = env->eflags & RETURN_MASK;
192 if (ts->v86flags & VIF_MASK)
193 flags |= IF_MASK;
194 flags |= IOPL_MASK;
195 return flags | (ts->v86flags & ts->v86mask);
196 }
197
198 #define ADD16(reg, val) reg = (reg & ~0xffff) | ((reg + (val)) & 0xffff)
199
200 /* handle VM86 interrupt (NOTE: the CPU core currently does not
201 support TSS interrupt revectoring, so this code is always executed) */
202 static void do_int(CPUX86State *env, int intno)
203 {
204 TaskState *ts = env->opaque;
205 uint32_t int_addr, segoffs, ssp;
206 unsigned int sp;
207
208 if (env->segs[R_CS].selector == TARGET_BIOSSEG)
209 goto cannot_handle;
210 if (is_revectored(intno, &ts->vm86plus.int_revectored))
211 goto cannot_handle;
212 if (intno == 0x21 && is_revectored((env->regs[R_EAX] >> 8) & 0xff,
213 &ts->vm86plus.int21_revectored))
214 goto cannot_handle;
215 int_addr = (intno << 2);
216 segoffs = ldl(int_addr);
217 if ((segoffs >> 16) == TARGET_BIOSSEG)
218 goto cannot_handle;
219 #if defined(DEBUG_VM86)
220 fprintf(logfile, "VM86: emulating int 0x%x. CS:IP=%04x:%04x\n",
221 intno, segoffs >> 16, segoffs & 0xffff);
222 #endif
223 /* save old state */
224 ssp = env->segs[R_SS].selector << 4;
225 sp = env->regs[R_ESP] & 0xffff;
226 vm_putw(ssp, sp - 2, get_vflags(env));
227 vm_putw(ssp, sp - 4, env->segs[R_CS].selector);
228 vm_putw(ssp, sp - 6, env->eip);
229 ADD16(env->regs[R_ESP], -6);
230 /* goto interrupt handler */
231 env->eip = segoffs & 0xffff;
232 cpu_x86_load_seg(env, R_CS, segoffs >> 16);
233 clear_TF(env);
234 clear_IF(env);
235 clear_AC(env);
236 return;
237 cannot_handle:
238 #if defined(DEBUG_VM86)
239 fprintf(logfile, "VM86: return to 32 bits int 0x%x\n", intno);
240 #endif
241 return_to_32bit(env, TARGET_VM86_INTx | (intno << 8));
242 }
243
244 void handle_vm86_trap(CPUX86State *env, int trapno)
245 {
246 if (trapno == 1 || trapno == 3) {
247 return_to_32bit(env, TARGET_VM86_TRAP + (trapno << 8));
248 } else {
249 do_int(env, trapno);
250 }
251 }
252
253 #define CHECK_IF_IN_TRAP() \
254 if ((ts->vm86plus.vm86plus.flags & TARGET_vm86dbg_active) && \
255 (ts->vm86plus.vm86plus.flags & TARGET_vm86dbg_TFpendig)) \
256 newflags |= TF_MASK
257
258 #define VM86_FAULT_RETURN \
259 if ((ts->vm86plus.vm86plus.flags & TARGET_force_return_for_pic) && \
260 (ts->v86flags & (IF_MASK | VIF_MASK))) \
261 return_to_32bit(env, TARGET_VM86_PICRETURN); \
262 return
263
264 void handle_vm86_fault(CPUX86State *env)
265 {
266 TaskState *ts = env->opaque;
267 uint32_t csp, ssp;
268 unsigned int ip, sp, newflags, newip, newcs, opcode, intno;
269 int data32, pref_done;
270
271 csp = env->segs[R_CS].selector << 4;
272 ip = env->eip & 0xffff;
273
274 ssp = env->segs[R_SS].selector << 4;
275 sp = env->regs[R_ESP] & 0xffff;
276
277 #if defined(DEBUG_VM86)
278 fprintf(logfile, "VM86 exception %04x:%08x\n",
279 env->segs[R_CS].selector, env->eip);
280 #endif
281
282 data32 = 0;
283 pref_done = 0;
284 do {
285 opcode = vm_getb(csp, ip);
286 ADD16(ip, 1);
287 switch (opcode) {
288 case 0x66: /* 32-bit data */ data32=1; break;
289 case 0x67: /* 32-bit address */ break;
290 case 0x2e: /* CS */ break;
291 case 0x3e: /* DS */ break;
292 case 0x26: /* ES */ break;
293 case 0x36: /* SS */ break;
294 case 0x65: /* GS */ break;
295 case 0x64: /* FS */ break;
296 case 0xf2: /* repnz */ break;
297 case 0xf3: /* rep */ break;
298 default: pref_done = 1;
299 }
300 } while (!pref_done);
301
302 /* VM86 mode */
303 switch(opcode) {
304 case 0x9c: /* pushf */
305 if (data32) {
306 vm_putl(ssp, sp - 4, get_vflags(env));
307 ADD16(env->regs[R_ESP], -4);
308 } else {
309 vm_putw(ssp, sp - 2, get_vflags(env));
310 ADD16(env->regs[R_ESP], -2);
311 }
312 env->eip = ip;
313 VM86_FAULT_RETURN;
314
315 case 0x9d: /* popf */
316 if (data32) {
317 newflags = vm_getl(ssp, sp);
318 ADD16(env->regs[R_ESP], 4);
319 } else {
320 newflags = vm_getw(ssp, sp);
321 ADD16(env->regs[R_ESP], 2);
322 }
323 env->eip = ip;
324 CHECK_IF_IN_TRAP();
325 if (data32) {
326 if (set_vflags_long(newflags, env))
327 return;
328 } else {
329 if (set_vflags_short(newflags, env))
330 return;
331 }
332 VM86_FAULT_RETURN;
333
334 case 0xcd: /* int */
335 intno = vm_getb(csp, ip);
336 ADD16(ip, 1);
337 env->eip = ip;
338 if (ts->vm86plus.vm86plus.flags & TARGET_vm86dbg_active) {
339 if ( (ts->vm86plus.vm86plus.vm86dbg_intxxtab[intno >> 3] >>
340 (intno &7)) & 1) {
341 return_to_32bit(env, TARGET_VM86_INTx + (intno << 8));
342 return;
343 }
344 }
345 do_int(env, intno);
346 break;
347
348 case 0xcf: /* iret */
349 if (data32) {
350 newip = vm_getl(ssp, sp) & 0xffff;
351 newcs = vm_getl(ssp, sp + 4) & 0xffff;
352 newflags = vm_getl(ssp, sp + 8);
353 ADD16(env->regs[R_ESP], 12);
354 } else {
355 newip = vm_getw(ssp, sp);
356 newcs = vm_getw(ssp, sp + 2);
357 newflags = vm_getw(ssp, sp + 4);
358 ADD16(env->regs[R_ESP], 6);
359 }
360 env->eip = newip;
361 cpu_x86_load_seg(env, R_CS, newcs);
362 CHECK_IF_IN_TRAP();
363 if (data32) {
364 if (set_vflags_long(newflags, env))
365 return;
366 } else {
367 if (set_vflags_short(newflags, env))
368 return;
369 }
370 VM86_FAULT_RETURN;
371
372 case 0xfa: /* cli */
373 env->eip = ip;
374 clear_IF(env);
375 VM86_FAULT_RETURN;
376
377 case 0xfb: /* sti */
378 env->eip = ip;
379 if (set_IF(env))
380 return;
381 VM86_FAULT_RETURN;
382
383 default:
384 /* real VM86 GPF exception */
385 return_to_32bit(env, TARGET_VM86_UNKNOWN);
386 break;
387 }
388 }
389
390 int do_vm86(CPUX86State *env, long subfunction, abi_ulong vm86_addr)
391 {
392 TaskState *ts = env->opaque;
393 struct target_vm86plus_struct * target_v86;
394 int ret;
395
396 switch (subfunction) {
397 case TARGET_VM86_REQUEST_IRQ:
398 case TARGET_VM86_FREE_IRQ:
399 case TARGET_VM86_GET_IRQ_BITS:
400 case TARGET_VM86_GET_AND_RESET_IRQ:
401 gemu_log("qemu: unsupported vm86 subfunction (%ld)\n", subfunction);
402 ret = -TARGET_EINVAL;
403 goto out;
404 case TARGET_VM86_PLUS_INSTALL_CHECK:
405 /* NOTE: on old vm86 stuff this will return the error
406 from verify_area(), because the subfunction is
407 interpreted as (invalid) address to vm86_struct.
408 So the installation check works.
409 */
410 ret = 0;
411 goto out;
412 }
413
414 /* save current CPU regs */
415 ts->vm86_saved_regs.eax = 0; /* default vm86 syscall return code */
416 ts->vm86_saved_regs.ebx = env->regs[R_EBX];
417 ts->vm86_saved_regs.ecx = env->regs[R_ECX];
418 ts->vm86_saved_regs.edx = env->regs[R_EDX];
419 ts->vm86_saved_regs.esi = env->regs[R_ESI];
420 ts->vm86_saved_regs.edi = env->regs[R_EDI];
421 ts->vm86_saved_regs.ebp = env->regs[R_EBP];
422 ts->vm86_saved_regs.esp = env->regs[R_ESP];
423 ts->vm86_saved_regs.eflags = env->eflags;
424 ts->vm86_saved_regs.eip = env->eip;
425 ts->vm86_saved_regs.cs = env->segs[R_CS].selector;
426 ts->vm86_saved_regs.ss = env->segs[R_SS].selector;
427 ts->vm86_saved_regs.ds = env->segs[R_DS].selector;
428 ts->vm86_saved_regs.es = env->segs[R_ES].selector;
429 ts->vm86_saved_regs.fs = env->segs[R_FS].selector;
430 ts->vm86_saved_regs.gs = env->segs[R_GS].selector;
431
432 ts->target_v86 = vm86_addr;
433 if (!lock_user_struct(VERIFY_READ, target_v86, vm86_addr, 1))
434 return -TARGET_EFAULT;
435 /* build vm86 CPU state */
436 ts->v86flags = tswap32(target_v86->regs.eflags);
437 env->eflags = (env->eflags & ~SAFE_MASK) |
438 (tswap32(target_v86->regs.eflags) & SAFE_MASK) | VM_MASK;
439
440 ts->vm86plus.cpu_type = tswapl(target_v86->cpu_type);
441 switch (ts->vm86plus.cpu_type) {
442 case TARGET_CPU_286:
443 ts->v86mask = 0;
444 break;
445 case TARGET_CPU_386:
446 ts->v86mask = NT_MASK | IOPL_MASK;
447 break;
448 case TARGET_CPU_486:
449 ts->v86mask = AC_MASK | NT_MASK | IOPL_MASK;
450 break;
451 default:
452 ts->v86mask = ID_MASK | AC_MASK | NT_MASK | IOPL_MASK;
453 break;
454 }
455
456 env->regs[R_EBX] = tswap32(target_v86->regs.ebx);
457 env->regs[R_ECX] = tswap32(target_v86->regs.ecx);
458 env->regs[R_EDX] = tswap32(target_v86->regs.edx);
459 env->regs[R_ESI] = tswap32(target_v86->regs.esi);
460 env->regs[R_EDI] = tswap32(target_v86->regs.edi);
461 env->regs[R_EBP] = tswap32(target_v86->regs.ebp);
462 env->regs[R_ESP] = tswap32(target_v86->regs.esp);
463 env->eip = tswap32(target_v86->regs.eip);
464 cpu_x86_load_seg(env, R_CS, tswap16(target_v86->regs.cs));
465 cpu_x86_load_seg(env, R_SS, tswap16(target_v86->regs.ss));
466 cpu_x86_load_seg(env, R_DS, tswap16(target_v86->regs.ds));
467 cpu_x86_load_seg(env, R_ES, tswap16(target_v86->regs.es));
468 cpu_x86_load_seg(env, R_FS, tswap16(target_v86->regs.fs));
469 cpu_x86_load_seg(env, R_GS, tswap16(target_v86->regs.gs));
470 ret = tswap32(target_v86->regs.eax); /* eax will be restored at
471 the end of the syscall */
472 memcpy(&ts->vm86plus.int_revectored,
473 &target_v86->int_revectored, 32);
474 memcpy(&ts->vm86plus.int21_revectored,
475 &target_v86->int21_revectored, 32);
476 ts->vm86plus.vm86plus.flags = tswapl(target_v86->vm86plus.flags);
477 memcpy(&ts->vm86plus.vm86plus.vm86dbg_intxxtab,
478 target_v86->vm86plus.vm86dbg_intxxtab, 32);
479 unlock_user_struct(target_v86, vm86_addr, 0);
480
481 #ifdef DEBUG_VM86
482 fprintf(logfile, "do_vm86: cs:ip=%04x:%04x\n",
483 env->segs[R_CS].selector, env->eip);
484 #endif
485 /* now the virtual CPU is ready for vm86 execution ! */
486 out:
487 return ret;
488 }
jz4740 based target emulation