hw/flash.h

   1 /* NOR flash devices */
   2 typedef struct pflash_t pflash_t;
   3
   4 /* pflash_cfi01.c */
   5 pflash_t *pflash_cfi01_register(target_phys_addr_t base, ram_addr_t off,
   6                                 BlockDriverState *bs,
   7                                 uint32_t sector_len, int nb_blocs, int width,
   8                                 uint16_t id0, uint16_t id1,
   9                                 uint16_t id2, uint16_t id3);
  10
  11 /* pflash_cfi02.c */
  12 pflash_t *pflash_cfi02_register(target_phys_addr_t base, ram_addr_t off,
  13                                 BlockDriverState *bs, uint32_t sector_len,
  14                                 int nb_blocs, int nb_mappings, int width,
  15                                 uint16_t id0, uint16_t id1,
  16                                 uint16_t id2, uint16_t id3,
  17                                 uint16_t unlock_addr0, uint16_t unlock_addr1);
  18
  19 /* nand.c */
  20 struct nand_flash_s;
  21 struct nand_flash_s *nand_init(int manf_id, int chip_id);
  22 void nand_done(struct nand_flash_s *s);
  23 void nand_setpins(struct nand_flash_s *s,
  24                 int cle, int ale, int ce, int wp, int gnd);
  25 void nand_getpins(struct nand_flash_s *s, int *rb);
  26 void nand_setio(struct nand_flash_s *s, uint8_t value);
  27 uint8_t nand_getio(struct nand_flash_s *s);
  28
  29 /* nand_bpage.c */
  30 struct nand_bflash_s;
  31 struct nand_bflash_s *nandb_init(int manf_id, int chip_id);
  32 void nandb_write_data16(struct nand_bflash_s *s, uint16_t value);
  33 uint16_t nandb_read_data16(struct nand_bflash_s *s);
  34 void nandb_write_data8(struct nand_bflash_s *s, uint8_t value);
  35 uint8_t nandb_read_data8(struct nand_bflash_s *s);
  36 void nandb_write_address(struct nand_bflash_s *s, uint16_t value);
  37 void nandb_write_command(struct nand_bflash_s *s, uint16_t value);
  38
  39
  40
  41 #define NAND_MFR_TOSHIBA        0x98
  42 #define NAND_MFR_SAMSUNG        0xec
  43 #define NAND_MFR_FUJITSU        0x04
  44 #define NAND_MFR_NATIONAL       0x8f
  45 #define NAND_MFR_RENESAS        0x07
  46 #define NAND_MFR_STMICRO        0x20
  47 #define NAND_MFR_HYNIX          0xad
  48 #define NAND_MFR_MICRON         0x2c
  49
  50 /* onenand.c */
  51 void onenand_base_update(void *opaque, target_phys_addr_t new);
  52 void onenand_base_unmap(void *opaque);
  53 void *onenand_init(uint32_t id, int regshift, qemu_irq irq);
  54 void *onenand_raw_otp(void *opaque);
  55
  56 /* ecc.c */
  57 struct ecc_state_s {
  58     uint8_t cp;         /* Column parity */
  59     uint16_t lp[2];     /* Line parity */
  60     uint16_t count;
  61 };
  62
  63 uint8_t ecc_digest(struct ecc_state_s *s, uint8_t sample);
  64 void ecc_reset(struct ecc_state_s *s);
  65 void ecc_put(QEMUFile *f, struct ecc_state_s *s);
  66 void ecc_get(QEMUFile *f, struct ecc_state_s *s);