hw/ppc_mac.h

   1 /*
   2  * QEMU PowerMac emulation shared definitions and prototypes
   3  *
   4  * Copyright (c) 2004-2007 Fabrice Bellard
   5  * Copyright (c) 2007 Jocelyn Mayer
   6  *
   7  * Permission is hereby granted, free of charge, to any person obtaining a copy
   8  * of this software and associated documentation files (the "Software"), to deal
   9  * in the Software without restriction, including without limitation the rights
  10  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  11  * copies of the Software, and to permit persons to whom the Software is
  12  * furnished to do so, subject to the following conditions:
  13  *
  14  * The above copyright notice and this permission notice shall be included in
  15  * all copies or substantial portions of the Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  22  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  23  * THE SOFTWARE.
  24  */
  25 #if !defined(__PPC_MAC_H__)
  26 #define __PPC_MAC_H__
  27
  28 /* SMP is not enabled, for now */
  29 #define MAX_CPUS 1
  30
  31 #define BIOS_FILENAME "ppc_rom.bin"
  32 #define VGABIOS_FILENAME "video.x"
  33 #define NVRAM_SIZE        0x2000
  34 #define PROM_FILENAME    "openbios-ppc32"
  35 #define PROM_ADDR         0xfff00000
  36
  37 #define KERNEL_LOAD_ADDR 0x01000000
  38 #define INITRD_LOAD_ADDR 0x01800000
  39
  40 /* DBDMA */
  41 void dbdma_init (int *dbdma_mem_index);
  42
  43 /* Cuda */
  44 void cuda_init (int *cuda_mem_index, qemu_irq irq);
  45
  46 /* MacIO */
  47 void macio_init (PCIBus *bus, int device_id, int is_oldworld, int pic_mem_index,
  48                  int dbdma_mem_index, int cuda_mem_index, void *nvram,
  49                  int nb_ide, int *ide_mem_index);
  50
  51 /* NewWorld PowerMac IDE */
  52 int pmac_ide_init (BlockDriverState **hd_table, qemu_irq irq);
  53
  54 /* Heathrow PIC */
  55 qemu_irq *heathrow_pic_init(int *pmem_index,
  56                             int nb_cpus, qemu_irq **irqs);
  57
  58 /* Grackle PCI */
  59 PCIBus *pci_grackle_init(uint32_t base, qemu_irq *pic);
  60
  61 /* UniNorth PCI */
  62 PCIBus *pci_pmac_init(qemu_irq *pic);
  63
  64 /* Mac NVRAM */
  65 typedef struct MacIONVRAMState MacIONVRAMState;
  66
  67 MacIONVRAMState *macio_nvram_init (int *mem_index, target_phys_addr_t size);
  68 void macio_nvram_map (void *opaque, target_phys_addr_t mem_base);
  69 void pmac_format_nvram_partition (MacIONVRAMState *nvr, int len);
  70 uint32_t macio_nvram_read (void *opaque, uint32_t addr);
  71 void macio_nvram_write (void *opaque, uint32_t addr, uint32_t val);
  72
  73 /* adb.c */
  74
  75 #define MAX_ADB_DEVICES 16
  76
  77 #define ADB_MAX_OUT_LEN 16
  78
  79 typedef struct ADBDevice ADBDevice;
  80
  81 /* buf = NULL means polling */
  82 typedef int ADBDeviceRequest(ADBDevice *d, uint8_t *buf_out,
  83                               const uint8_t *buf, int len);
  84 typedef int ADBDeviceReset(ADBDevice *d);
  85
  86 struct ADBDevice {
  87     struct ADBBusState *bus;
  88     int devaddr;
  89     int handler;
  90     ADBDeviceRequest *devreq;
  91     ADBDeviceReset *devreset;
  92     void *opaque;
  93 };
  94
  95 typedef struct ADBBusState {
  96     ADBDevice devices[MAX_ADB_DEVICES];
  97     int nb_devices;
  98     int poll_index;
  99 } ADBBusState;
 100
 101 int adb_request(ADBBusState *s, uint8_t *buf_out,
 102                 const uint8_t *buf, int len);
 103 int adb_poll(ADBBusState *s, uint8_t *buf_out);
 104
 105 ADBDevice *adb_register_device(ADBBusState *s, int devaddr,
 106                                ADBDeviceRequest *devreq,
 107                                ADBDeviceReset *devreset,
 108                                void *opaque);
 109 void adb_kbd_init(ADBBusState *bus);
 110 void adb_mouse_init(ADBBusState *bus);
 111
 112 extern ADBBusState adb_bus;
 113
 114 /* openpic.c */
 115 /* OpenPIC have 5 outputs per CPU connected and one IRQ out single output */
 116 enum {
 117     OPENPIC_OUTPUT_INT = 0, /* IRQ                       */
 118     OPENPIC_OUTPUT_CINT,    /* critical IRQ              */
 119     OPENPIC_OUTPUT_MCK,     /* Machine check event       */
 120     OPENPIC_OUTPUT_DEBUG,   /* Inconditional debug event */
 121     OPENPIC_OUTPUT_RESET,   /* Core reset event          */
 122     OPENPIC_OUTPUT_NB,
 123 };
 124 qemu_irq *openpic_init (PCIBus *bus, int *pmem_index, int nb_cpus,
 125                         qemu_irq **irqs, qemu_irq irq_out);
 126
 127 #endif /* !defined(__PPC_MAC_H__) */