target-i386: Use mulu2 and muls2
[qemu/pbrook.git] / hw / debugcon.c
blob81b2bb00fd0da132f479fa180c069ec8ba01fab5
1 /*
2 * QEMU Bochs-style debug console ("port E9") emulation
4 * Copyright (c) 2003-2004 Fabrice Bellard
5 * Copyright (c) 2008 Citrix Systems, Inc.
6 * Copyright (c) Intel Corporation; author: H. Peter Anvin
8 * Permission is hereby granted, free of charge, to any person obtaining a copy
9 * of this software and associated documentation files (the "Software"), to deal
10 * in the Software without restriction, including without limitation the rights
11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
12 * copies of the Software, and to permit persons to whom the Software is
13 * furnished to do so, subject to the following conditions:
15 * The above copyright notice and this permission notice shall be included in
16 * all copies or substantial portions of the Software.
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
23 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
24 * THE SOFTWARE.
27 #include "hw.h"
28 #include "char/char.h"
29 #include "isa.h"
30 #include "pc.h"
32 #define TYPE_ISA_DEBUGCON_DEVICE "isa-debugcon"
33 #define ISA_DEBUGCON_DEVICE(obj) \
34 OBJECT_CHECK(ISADebugconState, (obj), TYPE_ISA_DEBUGCON_DEVICE)
36 //#define DEBUG_DEBUGCON
38 typedef struct DebugconState {
39 MemoryRegion io;
40 CharDriverState *chr;
41 uint32_t readback;
42 } DebugconState;
44 typedef struct ISADebugconState {
45 ISADevice parent_obj;
47 uint32_t iobase;
48 DebugconState state;
49 } ISADebugconState;
51 static void debugcon_ioport_write(void *opaque, hwaddr addr, uint64_t val,
52 unsigned width)
54 DebugconState *s = opaque;
55 unsigned char ch = val;
57 #ifdef DEBUG_DEBUGCON
58 printf("debugcon: write addr=0x%04x val=0x%02x\n", addr, val);
59 #endif
61 qemu_chr_fe_write(s->chr, &ch, 1);
65 static uint64_t debugcon_ioport_read(void *opaque, hwaddr addr, unsigned width)
67 DebugconState *s = opaque;
69 #ifdef DEBUG_DEBUGCON
70 printf("debugcon: read addr=0x%04x\n", addr);
71 #endif
73 return s->readback;
76 static const MemoryRegionOps debugcon_ops = {
77 .read = debugcon_ioport_read,
78 .write = debugcon_ioport_write,
79 .valid.min_access_size = 1,
80 .valid.max_access_size = 1,
81 .endianness = DEVICE_LITTLE_ENDIAN,
84 static void debugcon_init_core(DebugconState *s)
86 if (!s->chr) {
87 fprintf(stderr, "Can't create debugcon device, empty char device\n");
88 exit(1);
91 qemu_chr_add_handlers(s->chr, NULL, NULL, NULL, s);
94 static int debugcon_isa_initfn(ISADevice *dev)
96 ISADebugconState *isa = ISA_DEBUGCON_DEVICE(dev);
97 DebugconState *s = &isa->state;
99 debugcon_init_core(s);
100 memory_region_init_io(&s->io, &debugcon_ops, s,
101 TYPE_ISA_DEBUGCON_DEVICE, 1);
102 memory_region_add_subregion(isa_address_space_io(dev),
103 isa->iobase, &s->io);
104 return 0;
107 static Property debugcon_isa_properties[] = {
108 DEFINE_PROP_HEX32("iobase", ISADebugconState, iobase, 0xe9),
109 DEFINE_PROP_CHR("chardev", ISADebugconState, state.chr),
110 DEFINE_PROP_HEX32("readback", ISADebugconState, state.readback, 0xe9),
111 DEFINE_PROP_END_OF_LIST(),
114 static void debugcon_isa_class_initfn(ObjectClass *klass, void *data)
116 DeviceClass *dc = DEVICE_CLASS(klass);
117 ISADeviceClass *ic = ISA_DEVICE_CLASS(klass);
118 ic->init = debugcon_isa_initfn;
119 dc->props = debugcon_isa_properties;
122 static const TypeInfo debugcon_isa_info = {
123 .name = TYPE_ISA_DEBUGCON_DEVICE,
124 .parent = TYPE_ISA_DEVICE,
125 .instance_size = sizeof(ISADebugconState),
126 .class_init = debugcon_isa_class_initfn,
129 static void debugcon_register_types(void)
131 type_register_static(&debugcon_isa_info);
134 type_init(debugcon_register_types)